diff options
Diffstat (limited to 'arch/arm/kernel/head.S')
-rw-r--r-- | arch/arm/kernel/head.S | 50 |
1 files changed, 31 insertions, 19 deletions
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index dd6b369ac69c..359e54e83bd5 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S | |||
@@ -89,6 +89,11 @@ ENTRY(stext) | |||
89 | bl __lookup_machine_type @ r5=machinfo | 89 | bl __lookup_machine_type @ r5=machinfo |
90 | movs r8, r5 @ invalid machine (r5=0)? | 90 | movs r8, r5 @ invalid machine (r5=0)? |
91 | beq __error_a @ yes, error 'a' | 91 | beq __error_a @ yes, error 'a' |
92 | |||
93 | /* | ||
94 | * r1 = machine no, r2 = atags, | ||
95 | * r8 = machinfo, r9 = cpuid, r10 = procinfo | ||
96 | */ | ||
92 | bl __vet_atags | 97 | bl __vet_atags |
93 | #ifdef CONFIG_SMP_ON_UP | 98 | #ifdef CONFIG_SMP_ON_UP |
94 | bl __fixup_smp | 99 | bl __fixup_smp |
@@ -381,19 +386,19 @@ ENDPROC(__turn_mmu_on) | |||
381 | 386 | ||
382 | #ifdef CONFIG_SMP_ON_UP | 387 | #ifdef CONFIG_SMP_ON_UP |
383 | __fixup_smp: | 388 | __fixup_smp: |
384 | mov r7, #0x00070000 | 389 | mov r4, #0x00070000 |
385 | orr r6, r7, #0xff000000 @ mask 0xff070000 | 390 | orr r3, r4, #0xff000000 @ mask 0xff070000 |
386 | orr r7, r7, #0x41000000 @ val 0x41070000 | 391 | orr r4, r4, #0x41000000 @ val 0x41070000 |
387 | and r0, r9, r6 | 392 | and r0, r9, r3 |
388 | teq r0, r7 @ ARM CPU and ARMv6/v7? | 393 | teq r0, r4 @ ARM CPU and ARMv6/v7? |
389 | bne __fixup_smp_on_up @ no, assume UP | 394 | bne __fixup_smp_on_up @ no, assume UP |
390 | 395 | ||
391 | orr r6, r6, #0x0000ff00 | 396 | orr r3, r3, #0x0000ff00 |
392 | orr r6, r6, #0x000000f0 @ mask 0xff07fff0 | 397 | orr r3, r3, #0x000000f0 @ mask 0xff07fff0 |
393 | orr r7, r7, #0x0000b000 | 398 | orr r4, r4, #0x0000b000 |
394 | orr r7, r7, #0x00000020 @ val 0x4107b020 | 399 | orr r4, r4, #0x00000020 @ val 0x4107b020 |
395 | and r0, r9, r6 | 400 | and r0, r9, r3 |
396 | teq r0, r7 @ ARM 11MPCore? | 401 | teq r0, r4 @ ARM 11MPCore? |
397 | moveq pc, lr @ yes, assume SMP | 402 | moveq pc, lr @ yes, assume SMP |
398 | 403 | ||
399 | mrc p15, 0, r0, c0, c0, 5 @ read MPIDR | 404 | mrc p15, 0, r0, c0, c0, 5 @ read MPIDR |
@@ -402,15 +407,22 @@ __fixup_smp: | |||
402 | 407 | ||
403 | __fixup_smp_on_up: | 408 | __fixup_smp_on_up: |
404 | adr r0, 1f | 409 | adr r0, 1f |
405 | ldmia r0, {r3, r6, r7} | 410 | ldmia r0, {r3 - r5} |
406 | sub r3, r0, r3 | 411 | sub r3, r0, r3 |
407 | add r6, r6, r3 | 412 | add r4, r4, r3 |
408 | add r7, r7, r3 | 413 | add r5, r5, r3 |
409 | 2: cmp r6, r7 | 414 | 2: cmp r4, r5 |
410 | ldmia r6!, {r0, r4} | 415 | movhs pc, lr |
411 | strlo r4, [r0, r3] | 416 | ldmia r4!, {r0, r6} |
412 | blo 2b | 417 | ARM( str r6, [r0, r3] ) |
413 | mov pc, lr | 418 | THUMB( add r0, r0, r3 ) |
419 | #ifdef __ARMEB__ | ||
420 | THUMB( mov r6, r6, ror #16 ) @ Convert word order for big-endian. | ||
421 | #endif | ||
422 | THUMB( strh r6, [r0], #2 ) @ For Thumb-2, store as two halfwords | ||
423 | THUMB( mov r6, r6, lsr #16 ) @ to be robust against misaligned r3. | ||
424 | THUMB( strh r6, [r0] ) | ||
425 | b 2b | ||
414 | ENDPROC(__fixup_smp) | 426 | ENDPROC(__fixup_smp) |
415 | 427 | ||
416 | 1: .word . | 428 | 1: .word . |