diff options
Diffstat (limited to 'arch/arm/kernel/head-nommu.S')
-rw-r--r-- | arch/arm/kernel/head-nommu.S | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S index ac9eb3d30518..f359a189dcf2 100644 --- a/arch/arm/kernel/head-nommu.S +++ b/arch/arm/kernel/head-nommu.S | |||
@@ -9,7 +9,6 @@ | |||
9 | * published by the Free Software Foundation. | 9 | * published by the Free Software Foundation. |
10 | * | 10 | * |
11 | * Common kernel startup code (non-paged MM) | 11 | * Common kernel startup code (non-paged MM) |
12 | * for 32-bit CPUs which has a process ID register(CP15). | ||
13 | * | 12 | * |
14 | */ | 13 | */ |
15 | #include <linux/linkage.h> | 14 | #include <linux/linkage.h> |
@@ -40,7 +39,11 @@ | |||
40 | ENTRY(stext) | 39 | ENTRY(stext) |
41 | msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode | 40 | msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode |
42 | @ and irqs disabled | 41 | @ and irqs disabled |
42 | #ifndef CONFIG_CPU_CP15 | ||
43 | ldr r9, =CONFIG_PROCESSOR_ID | ||
44 | #else | ||
43 | mrc p15, 0, r9, c0, c0 @ get processor id | 45 | mrc p15, 0, r9, c0, c0 @ get processor id |
46 | #endif | ||
44 | bl __lookup_processor_type @ r5=procinfo r9=cpuid | 47 | bl __lookup_processor_type @ r5=procinfo r9=cpuid |
45 | movs r10, r5 @ invalid processor (r5=0)? | 48 | movs r10, r5 @ invalid processor (r5=0)? |
46 | beq __error_p @ yes, error 'p' | 49 | beq __error_p @ yes, error 'p' |
@@ -58,6 +61,7 @@ ENTRY(stext) | |||
58 | */ | 61 | */ |
59 | .type __after_proc_init, %function | 62 | .type __after_proc_init, %function |
60 | __after_proc_init: | 63 | __after_proc_init: |
64 | #ifdef CONFIG_CPU_CP15 | ||
61 | mrc p15, 0, r0, c1, c0, 0 @ read control reg | 65 | mrc p15, 0, r0, c1, c0, 0 @ read control reg |
62 | #ifdef CONFIG_ALIGNMENT_TRAP | 66 | #ifdef CONFIG_ALIGNMENT_TRAP |
63 | orr r0, r0, #CR_A | 67 | orr r0, r0, #CR_A |
@@ -73,7 +77,13 @@ __after_proc_init: | |||
73 | #ifdef CONFIG_CPU_ICACHE_DISABLE | 77 | #ifdef CONFIG_CPU_ICACHE_DISABLE |
74 | bic r0, r0, #CR_I | 78 | bic r0, r0, #CR_I |
75 | #endif | 79 | #endif |
80 | #ifdef CONFIG_CPU_HIGH_VECTOR | ||
81 | orr r0, r0, #CR_V | ||
82 | #else | ||
83 | bic r0, r0, #CR_V | ||
84 | #endif | ||
76 | mcr p15, 0, r0, c1, c0, 0 @ write control reg | 85 | mcr p15, 0, r0, c1, c0, 0 @ write control reg |
86 | #endif /* CONFIG_CPU_CP15 */ | ||
77 | 87 | ||
78 | mov pc, r13 @ clear the BSS and jump | 88 | mov pc, r13 @ clear the BSS and jump |
79 | @ to start_kernel | 89 | @ to start_kernel |