diff options
Diffstat (limited to 'arch/arm/kernel/entry-armv.S')
-rw-r--r-- | arch/arm/kernel/entry-armv.S | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 1879e8dd2acc..52a949a8077d 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
@@ -344,7 +344,7 @@ ENDPROC(__pabt_svc) | |||
344 | @ | 344 | @ |
345 | @ Enable the alignment trap while in kernel mode | 345 | @ Enable the alignment trap while in kernel mode |
346 | @ | 346 | @ |
347 | alignment_trap r0 | 347 | alignment_trap r0, .LCcralign |
348 | 348 | ||
349 | @ | 349 | @ |
350 | @ Clear FP to mark the first stack frame | 350 | @ Clear FP to mark the first stack frame |
@@ -413,6 +413,11 @@ __und_usr: | |||
413 | @ | 413 | @ |
414 | adr r9, BSYM(ret_from_exception) | 414 | adr r9, BSYM(ret_from_exception) |
415 | 415 | ||
416 | @ IRQs must be enabled before attempting to read the instruction from | ||
417 | @ user space since that could cause a page/translation fault if the | ||
418 | @ page table was modified by another CPU. | ||
419 | enable_irq | ||
420 | |||
416 | tst r3, #PSR_T_BIT @ Thumb mode? | 421 | tst r3, #PSR_T_BIT @ Thumb mode? |
417 | bne __und_usr_thumb | 422 | bne __und_usr_thumb |
418 | sub r4, r2, #4 @ ARM instr at LR - 4 | 423 | sub r4, r2, #4 @ ARM instr at LR - 4 |
@@ -484,7 +489,8 @@ ENDPROC(__und_usr) | |||
484 | */ | 489 | */ |
485 | .pushsection .fixup, "ax" | 490 | .pushsection .fixup, "ax" |
486 | .align 2 | 491 | .align 2 |
487 | 4: mov pc, r9 | 492 | 4: str r4, [sp, #S_PC] @ retry current instruction |
493 | mov pc, r9 | ||
488 | .popsection | 494 | .popsection |
489 | .pushsection __ex_table,"a" | 495 | .pushsection __ex_table,"a" |
490 | .long 1b, 4b | 496 | .long 1b, 4b |
@@ -517,7 +523,7 @@ ENDPROC(__und_usr) | |||
517 | * r9 = normal "successful" return address | 523 | * r9 = normal "successful" return address |
518 | * r10 = this threads thread_info structure | 524 | * r10 = this threads thread_info structure |
519 | * lr = unrecognised instruction return address | 525 | * lr = unrecognised instruction return address |
520 | * IRQs disabled, FIQs enabled. | 526 | * IRQs enabled, FIQs enabled. |
521 | */ | 527 | */ |
522 | @ | 528 | @ |
523 | @ Fall-through from Thumb-2 __und_usr | 529 | @ Fall-through from Thumb-2 __und_usr |
@@ -624,7 +630,6 @@ call_fpe: | |||
624 | #endif | 630 | #endif |
625 | 631 | ||
626 | do_fpe: | 632 | do_fpe: |
627 | enable_irq | ||
628 | ldr r4, .LCfp | 633 | ldr r4, .LCfp |
629 | add r10, r10, #TI_FPSTATE @ r10 = workspace | 634 | add r10, r10, #TI_FPSTATE @ r10 = workspace |
630 | ldr pc, [r4] @ Call FP module USR entry point | 635 | ldr pc, [r4] @ Call FP module USR entry point |
@@ -652,8 +657,7 @@ __und_usr_fault_32: | |||
652 | b 1f | 657 | b 1f |
653 | __und_usr_fault_16: | 658 | __und_usr_fault_16: |
654 | mov r1, #2 | 659 | mov r1, #2 |
655 | 1: enable_irq | 660 | 1: mov r0, sp |
656 | mov r0, sp | ||
657 | adr lr, BSYM(ret_from_exception) | 661 | adr lr, BSYM(ret_from_exception) |
658 | b __und_fault | 662 | b __und_fault |
659 | ENDPROC(__und_usr_fault_32) | 663 | ENDPROC(__und_usr_fault_32) |
@@ -1143,11 +1147,8 @@ __vectors_start: | |||
1143 | .data | 1147 | .data |
1144 | 1148 | ||
1145 | .globl cr_alignment | 1149 | .globl cr_alignment |
1146 | .globl cr_no_alignment | ||
1147 | cr_alignment: | 1150 | cr_alignment: |
1148 | .space 4 | 1151 | .space 4 |
1149 | cr_no_alignment: | ||
1150 | .space 4 | ||
1151 | 1152 | ||
1152 | #ifdef CONFIG_MULTI_IRQ_HANDLER | 1153 | #ifdef CONFIG_MULTI_IRQ_HANDLER |
1153 | .globl handle_arch_irq | 1154 | .globl handle_arch_irq |