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-rw-r--r--arch/arm/kernel/entry-armv.S48
1 files changed, 17 insertions, 31 deletions
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 7f22a11a5105..8e2dacdbdccb 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -25,42 +25,22 @@
25#include <asm/tls.h> 25#include <asm/tls.h>
26 26
27#include "entry-header.S" 27#include "entry-header.S"
28#include <asm/entry-macro-multi.S>
28 29
29/* 30/*
30 * Interrupt handling. Preserves r7, r8, r9 31 * Interrupt handling. Preserves r7, r8, r9
31 */ 32 */
32 .macro irq_handler 33 .macro irq_handler
33 get_irqnr_preamble r5, lr 34#ifdef CONFIG_MULTI_IRQ_HANDLER
341: get_irqnr_and_base r0, r6, r5, lr 35 ldr r5, =handle_arch_irq
35 movne r1, sp 36 mov r0, sp
36 @ 37 ldr r5, [r5]
37 @ routine called with r0 = irq number, r1 = struct pt_regs * 38 adr lr, BSYM(9997f)
38 @ 39 teq r5, #0
39 adrne lr, BSYM(1b) 40 movne pc, r5
40 bne asm_do_IRQ
41
42#ifdef CONFIG_SMP
43 /*
44 * XXX
45 *
46 * this macro assumes that irqstat (r6) and base (r5) are
47 * preserved from get_irqnr_and_base above
48 */
49 ALT_SMP(test_for_ipi r0, r6, r5, lr)
50 ALT_UP_B(9997f)
51 movne r1, sp
52 adrne lr, BSYM(1b)
53 bne do_IPI
54
55#ifdef CONFIG_LOCAL_TIMERS
56 test_for_ltirq r0, r6, r5, lr
57 movne r0, sp
58 adrne lr, BSYM(1b)
59 bne do_local_timer
60#endif 41#endif
42 arch_irq_handler_default
619997: 439997:
62#endif
63
64 .endm 44 .endm
65 45
66#ifdef CONFIG_KPROBES 46#ifdef CONFIG_KPROBES
@@ -735,7 +715,7 @@ ENTRY(__switch_to)
735 THUMB( stmia ip!, {r4 - sl, fp} ) @ Store most regs on stack 715 THUMB( stmia ip!, {r4 - sl, fp} ) @ Store most regs on stack
736 THUMB( str sp, [ip], #4 ) 716 THUMB( str sp, [ip], #4 )
737 THUMB( str lr, [ip], #4 ) 717 THUMB( str lr, [ip], #4 )
738#ifdef CONFIG_MMU 718#ifdef CONFIG_CPU_USE_DOMAINS
739 ldr r6, [r2, #TI_CPU_DOMAIN] 719 ldr r6, [r2, #TI_CPU_DOMAIN]
740#endif 720#endif
741 set_tls r3, r4, r5 721 set_tls r3, r4, r5
@@ -744,7 +724,7 @@ ENTRY(__switch_to)
744 ldr r8, =__stack_chk_guard 724 ldr r8, =__stack_chk_guard
745 ldr r7, [r7, #TSK_STACK_CANARY] 725 ldr r7, [r7, #TSK_STACK_CANARY]
746#endif 726#endif
747#ifdef CONFIG_MMU 727#ifdef CONFIG_CPU_USE_DOMAINS
748 mcr p15, 0, r6, c3, c0, 0 @ Set domain register 728 mcr p15, 0, r6, c3, c0, 0 @ Set domain register
749#endif 729#endif
750 mov r5, r0 730 mov r5, r0
@@ -1245,3 +1225,9 @@ cr_alignment:
1245 .space 4 1225 .space 4
1246cr_no_alignment: 1226cr_no_alignment:
1247 .space 4 1227 .space 4
1228
1229#ifdef CONFIG_MULTI_IRQ_HANDLER
1230 .globl handle_arch_irq
1231handle_arch_irq:
1232 .space 4
1233#endif