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-rw-r--r--arch/arm/kernel/entry-armv.S9
1 files changed, 0 insertions, 9 deletions
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index bd623b73445f..2db42b18f53f 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -589,10 +589,6 @@ ENTRY(__switch_to)
589 strex r5, r4, [ip] @ Clear exclusive monitor 589 strex r5, r4, [ip] @ Clear exclusive monitor
590#endif 590#endif
591#endif 591#endif
592#if defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_IWMMXT)
593 mra r4, r5, acc0
594 stmia ip, {r4, r5}
595#endif
596#if defined(CONFIG_HAS_TLS_REG) 592#if defined(CONFIG_HAS_TLS_REG)
597 mcr p15, 0, r3, c13, c0, 3 @ set TLS register 593 mcr p15, 0, r3, c13, c0, 3 @ set TLS register
598#elif !defined(CONFIG_TLS_REG_EMUL) 594#elif !defined(CONFIG_TLS_REG_EMUL)
@@ -602,11 +598,6 @@ ENTRY(__switch_to)
602#ifdef CONFIG_MMU 598#ifdef CONFIG_MMU
603 mcr p15, 0, r6, c3, c0, 0 @ Set domain register 599 mcr p15, 0, r6, c3, c0, 0 @ Set domain register
604#endif 600#endif
605#if defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_IWMMXT)
606 add r4, r2, #TI_CPU_DOMAIN + 40 @ cpu_context_save->extra
607 ldmib r4, {r4, r5}
608 mar acc0, r4, r5
609#endif
610 mov r5, r0 601 mov r5, r0
611 add r4, r2, #TI_CPU_SAVE 602 add r4, r2, #TI_CPU_SAVE
612 ldr r0, =thread_notify_head 603 ldr r0, =thread_notify_head