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-rw-r--r--arch/arm/include/asm/bitops.h6
-rw-r--r--arch/arm/include/asm/cacheflush.h5
-rw-r--r--arch/arm/include/asm/elf.h3
-rw-r--r--arch/arm/include/asm/tlbflush.h3
-rw-r--r--arch/arm/include/asm/unistd.h9
5 files changed, 22 insertions, 4 deletions
diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h
index 63a481fbbed4..338ff19ae447 100644
--- a/arch/arm/include/asm/bitops.h
+++ b/arch/arm/include/asm/bitops.h
@@ -84,7 +84,7 @@ ____atomic_test_and_set_bit(unsigned int bit, volatile unsigned long *p)
84 *p = res | mask; 84 *p = res | mask;
85 raw_local_irq_restore(flags); 85 raw_local_irq_restore(flags);
86 86
87 return res & mask; 87 return (res & mask) != 0;
88} 88}
89 89
90static inline int 90static inline int
@@ -101,7 +101,7 @@ ____atomic_test_and_clear_bit(unsigned int bit, volatile unsigned long *p)
101 *p = res & ~mask; 101 *p = res & ~mask;
102 raw_local_irq_restore(flags); 102 raw_local_irq_restore(flags);
103 103
104 return res & mask; 104 return (res & mask) != 0;
105} 105}
106 106
107static inline int 107static inline int
@@ -118,7 +118,7 @@ ____atomic_test_and_change_bit(unsigned int bit, volatile unsigned long *p)
118 *p = res ^ mask; 118 *p = res ^ mask;
119 raw_local_irq_restore(flags); 119 raw_local_irq_restore(flags);
120 120
121 return res & mask; 121 return (res & mask) != 0;
122} 122}
123 123
124#include <asm-generic/bitops/non-atomic.h> 124#include <asm-generic/bitops/non-atomic.h>
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index fd03fb63a332..3d0cdd21b882 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -414,9 +414,14 @@ extern void __flush_dcache_page(struct address_space *mapping, struct page *page
414 414
415static inline void __flush_icache_all(void) 415static inline void __flush_icache_all(void)
416{ 416{
417#ifdef CONFIG_ARM_ERRATA_411920
418 extern void v6_icache_inval_all(void);
419 v6_icache_inval_all();
420#else
417 asm("mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache\n" 421 asm("mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache\n"
418 : 422 :
419 : "r" (0)); 423 : "r" (0));
424#endif
420} 425}
421 426
422#define ARCH_HAS_FLUSH_ANON_PAGE 427#define ARCH_HAS_FLUSH_ANON_PAGE
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h
index c3b911ee9151..6aac3f5bb2f3 100644
--- a/arch/arm/include/asm/elf.h
+++ b/arch/arm/include/asm/elf.h
@@ -98,6 +98,9 @@ extern int elf_check_arch(const struct elf32_hdr *);
98extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int); 98extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int);
99#define elf_read_implies_exec(ex,stk) arm_elf_read_implies_exec(&(ex), stk) 99#define elf_read_implies_exec(ex,stk) arm_elf_read_implies_exec(&(ex), stk)
100 100
101int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs);
102#define ELF_CORE_COPY_TASK_REGS dump_task_regs
103
101#define USE_ELF_CORE_DUMP 104#define USE_ELF_CORE_DUMP
102#define ELF_EXEC_PAGESIZE 4096 105#define ELF_EXEC_PAGESIZE 4096
103 106
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index a45ab5dd8255..c2f1605de359 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -350,7 +350,7 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
350 if (tlb_flag(TLB_WB)) 350 if (tlb_flag(TLB_WB))
351 dsb(); 351 dsb();
352 352
353 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm))) { 353 if (cpumask_test_cpu(get_cpu(), mm_cpumask(mm))) {
354 if (tlb_flag(TLB_V3_FULL)) 354 if (tlb_flag(TLB_V3_FULL))
355 asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero) : "cc"); 355 asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero) : "cc");
356 if (tlb_flag(TLB_V4_U_FULL)) 356 if (tlb_flag(TLB_V4_U_FULL))
@@ -360,6 +360,7 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
360 if (tlb_flag(TLB_V4_I_FULL)) 360 if (tlb_flag(TLB_V4_I_FULL))
361 asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc"); 361 asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
362 } 362 }
363 put_cpu();
363 364
364 if (tlb_flag(TLB_V6_U_ASID)) 365 if (tlb_flag(TLB_V6_U_ASID))
365 asm("mcr p15, 0, %0, c8, c7, 2" : : "r" (asid) : "cc"); 366 asm("mcr p15, 0, %0, c8, c7, 2" : : "r" (asid) : "cc");
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index 7020217fc49f..4e506d09e5f9 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -403,6 +403,15 @@
403#define __ARM_NR_set_tls (__ARM_NR_BASE+5) 403#define __ARM_NR_set_tls (__ARM_NR_BASE+5)
404 404
405/* 405/*
406 * *NOTE*: This is a ghost syscall private to the kernel. Only the
407 * __kuser_cmpxchg code in entry-armv.S should be aware of its
408 * existence. Don't ever use this from user code.
409 */
410#ifdef __KERNEL__
411#define __ARM_NR_cmpxchg (__ARM_NR_BASE+0x00fff0)
412#endif
413
414/*
406 * The following syscalls are obsolete and no longer available for EABI. 415 * The following syscalls are obsolete and no longer available for EABI.
407 */ 416 */
408#if defined(__ARM_EABI__) && !defined(__KERNEL__) 417#if defined(__ARM_EABI__) && !defined(__KERNEL__)