19 files changed, 135 insertions, 197 deletions

diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 65c3f2474f5e..29035e86a59d 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -293,4 +293,13 @@
         .macro  ldrusr, reg, ptr, inc, cond=al, rept=1, abort=9001f
         usracc  ldr, \reg, \ptr, \inc, \cond, \rept, \abort
         .endm
+
+/* Utility macro for declaring string literals */
+        .macro  string name:req, string
+        .type \name , #object
+\name:
+        .asciz "\string"
+        .size \name , . - \name
+        .endm
+
 #endif /* __ASM_ASSEMBLER_H__ */
diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h
index b4892a06442c..f4280593dfa3 100644
--- a/arch/arm/include/asm/bitops.h
+++ b/arch/arm/include/asm/bitops.h
@@ -26,8 +26,8 @@
 #include <linux/compiler.h>
 #include <asm/system.h>
 
-#define smp_mb__before_clear_bit()      mb()
-#define smp_mb__after_clear_bit()       mb()
+#define smp_mb__before_clear_bit()      smp_mb()
+#define smp_mb__after_clear_bit()       smp_mb()
 
 /*
  * These functions are the basis of our bit ops.
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 4fff837363ed..7a21d0bf7134 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -115,39 +115,8 @@ static inline void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
                 ___dma_page_dev_to_cpu(page, off, size, dir);
 }
 
-/*
- * Return whether the given device DMA address mask can be supported
- * properly.  For example, if your device can only drive the low 24-bits
- * during bus mastering, then you would pass 0x00ffffff as the mask
- * to this function.
- *
- * FIXME: This should really be a platform specific issue - we should
- * return false if GFP_DMA allocations may not satisfy the supplied 'mask'.
- */
-static inline int dma_supported(struct device *dev, u64 mask)
-{
-        if (mask < ISA_DMA_THRESHOLD)
-                return 0;
-        return 1;
-}
-
-static inline int dma_set_mask(struct device *dev, u64 dma_mask)
-{
-#ifdef CONFIG_DMABOUNCE
-        if (dev->archdata.dmabounce) {
-                if (dma_mask >= ISA_DMA_THRESHOLD)
-                        return 0;
-                else
-                        return -EIO;
-        }
-#endif
-        if (!dev->dma_mask || !dma_supported(dev, dma_mask))
-                return -EIO;
-
-        *dev->dma_mask = dma_mask;
-
-        return 0;
-}
+extern int dma_supported(struct device *, u64);
+extern int dma_set_mask(struct device *, u64);
 
 /*
  * DMA errors are defined by all-bits-set in the DMA address.
@@ -256,14 +225,14 @@ int dma_mmap_writecombine(struct device *, struct vm_area_struct *,
  * @dev: valid struct device pointer
  * @small_buf_size: size of buffers to use with small buffer pool
  * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
+ * @needs_bounce_fn: called to determine whether buffer needs bouncing
  *
  * This function should be called by low-level platform code to register
  * a device as requireing DMA buffer bouncing. The function will allocate
  * appropriate DMA pools for the device.
- *
  */
 extern int dmabounce_register_dev(struct device *, unsigned long,
-                unsigned long);
+                unsigned long, int (*)(struct device *, dma_addr_t, size_t));
 
 /**
  * dmabounce_unregister_dev
@@ -277,31 +246,9 @@ extern int dmabounce_register_dev(struct device *, unsigned long,
  */
 extern void dmabounce_unregister_dev(struct device *);
 
-/**
- * dma_needs_bounce
- *
- * @dev: valid struct device pointer
- * @dma_handle: dma_handle of unbounced buffer
- * @size: size of region being mapped
- *
- * Platforms that utilize the dmabounce mechanism must implement
- * this function.
- *
- * The dmabounce routines call this function whenever a dma-mapping
- * is requested to determine whether a given buffer needs to be bounced
- * or not. The function must return 0 if the buffer is OK for
- * DMA access and 1 if the buffer needs to be bounced.
- *
- */
-extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
-
 /*
  * The DMA API, implemented by dmabounce.c.  See below for descriptions.
  */
-extern dma_addr_t __dma_map_single(struct device *, void *, size_t,
-                enum dma_data_direction);
-extern void __dma_unmap_single(struct device *, dma_addr_t, size_t,
-                enum dma_data_direction);
 extern dma_addr_t __dma_map_page(struct device *, struct page *,
                 unsigned long, size_t, enum dma_data_direction);
 extern void __dma_unmap_page(struct device *, dma_addr_t, size_t,
@@ -328,13 +275,6 @@ static inline int dmabounce_sync_for_device(struct device *d, dma_addr_t addr,
 }
 
 
-static inline dma_addr_t __dma_map_single(struct device *dev, void *cpu_addr,
-                size_t size, enum dma_data_direction dir)
-{
-        __dma_single_cpu_to_dev(cpu_addr, size, dir);
-        return virt_to_dma(dev, cpu_addr);
-}
-
 static inline dma_addr_t __dma_map_page(struct device *dev, struct page *page,
              unsigned long offset, size_t size, enum dma_data_direction dir)
 {
@@ -342,12 +282,6 @@ static inline dma_addr_t __dma_map_page(struct device *dev, struct page *page,
         return pfn_to_dma(dev, page_to_pfn(page)) + offset;
 }
 
-static inline void __dma_unmap_single(struct device *dev, dma_addr_t handle,
-                size_t size, enum dma_data_direction dir)
-{
-        __dma_single_dev_to_cpu(dma_to_virt(dev, handle), size, dir);
-}
-
 static inline void __dma_unmap_page(struct device *dev, dma_addr_t handle,
                 size_t size, enum dma_data_direction dir)
 {
@@ -373,14 +307,18 @@ static inline void __dma_unmap_page(struct device *dev, dma_addr_t handle,
 static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
                 size_t size, enum dma_data_direction dir)
 {
+        unsigned long offset;
+        struct page *page;
         dma_addr_t addr;
 
+        BUG_ON(!virt_addr_valid(cpu_addr));
+        BUG_ON(!virt_addr_valid(cpu_addr + size - 1));
         BUG_ON(!valid_dma_direction(dir));
 
-        addr = __dma_map_single(dev, cpu_addr, size, dir);
-        debug_dma_map_page(dev, virt_to_page(cpu_addr),
-                        (unsigned long)cpu_addr & ~PAGE_MASK, size,
-                        dir, addr, true);
+        page = virt_to_page(cpu_addr);
+        offset = (unsigned long)cpu_addr & ~PAGE_MASK;
+        addr = __dma_map_page(dev, page, offset, size, dir);
+        debug_dma_map_page(dev, page, offset, size, dir, addr, true);
 
         return addr;
 }
@@ -430,7 +368,7 @@ static inline void dma_unmap_single(struct device *dev, dma_addr_t handle,
                 size_t size, enum dma_data_direction dir)
 {
         debug_dma_unmap_page(dev, handle, size, dir, true);
-        __dma_unmap_single(dev, handle, size, dir);
+        __dma_unmap_page(dev, handle, size, dir);
 }
 
 /**
diff --git a/arch/arm/include/asm/dma.h b/arch/arm/include/asm/dma.h
index 42005542932b..628670e9d7c9 100644
--- a/arch/arm/include/asm/dma.h
+++ b/arch/arm/include/asm/dma.h
@@ -1,15 +1,16 @@
 #ifndef __ASM_ARM_DMA_H
 #define __ASM_ARM_DMA_H
 
-#include <asm/memory.h>
-
 /*
  * This is the maximum virtual address which can be DMA'd from.
  */
-#ifndef ARM_DMA_ZONE_SIZE
-#define MAX_DMA_ADDRESS 0xffffffff
+#ifndef CONFIG_ZONE_DMA
+#define MAX_DMA_ADDRESS 0xffffffffUL
 #else
-#define MAX_DMA_ADDRESS (PAGE_OFFSET + ARM_DMA_ZONE_SIZE)
+#define MAX_DMA_ADDRESS ({ \
+        extern unsigned long arm_dma_zone_size; \
+        arm_dma_zone_size ? \
+                (PAGE_OFFSET + arm_dma_zone_size) : 0xffffffffUL; })
 #endif
 
 #ifdef CONFIG_ISA_DMA_API
diff --git a/arch/arm/include/asm/entry-macro-multi.S b/arch/arm/include/asm/entry-macro-multi.S
index 2da8547de6d6..2f1e2098dfe7 100644
--- a/arch/arm/include/asm/entry-macro-multi.S
+++ b/arch/arm/include/asm/entry-macro-multi.S
@@ -4,8 +4,8 @@
  * Interrupt handling.  Preserves r7, r8, r9
  */
         .macro  arch_irq_handler_default
-        get_irqnr_preamble r5, lr
-1:      get_irqnr_and_base r0, r6, r5, lr
+        get_irqnr_preamble r6, lr
+1:      get_irqnr_and_base r0, r2, r6, lr
         movne   r1, sp
         @
         @ routine called with r0 = irq number, r1 = struct pt_regs *
@@ -17,17 +17,17 @@
         /*
          * XXX
          *
-         * this macro assumes that irqstat (r6) and base (r5) are
+         * this macro assumes that irqstat (r2) and base (r6) are
          * preserved from get_irqnr_and_base above
          */
-        ALT_SMP(test_for_ipi r0, r6, r5, lr)
+        ALT_SMP(test_for_ipi r0, r2, r6, lr)
         ALT_UP_B(9997f)
         movne   r1, sp
         adrne   lr, BSYM(1b)
         bne     do_IPI
 
 #ifdef CONFIG_LOCAL_TIMERS
-        test_for_ltirq r0, r6, r5, lr
+        test_for_ltirq r0, r2, r6, lr
         movne   r0, sp
         adrne   lr, BSYM(1b)
         bne     do_local_timer
@@ -40,7 +40,7 @@
         .align  5
         .global \symbol_name
 \symbol_name:
-        mov     r4, lr
+        mov     r8, lr
         arch_irq_handler_default
-        mov     pc, r4
+        mov     pc, r8
         .endm
diff --git a/arch/arm/include/asm/hwcap.h b/arch/arm/include/asm/hwcap.h
index c1062c317103..c93a22a8b924 100644
--- a/arch/arm/include/asm/hwcap.h
+++ b/arch/arm/include/asm/hwcap.h
@@ -4,22 +4,26 @@
 /*
  * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP
  */
-#define HWCAP_SWP       1
-#define HWCAP_HALF      2
-#define HWCAP_THUMB     4
-#define HWCAP_26BIT     8       /* Play it safe */
-#define HWCAP_FAST_MULT 16
-#define HWCAP_FPA       32
-#define HWCAP_VFP       64
-#define HWCAP_EDSP      128
-#define HWCAP_JAVA      256
-#define HWCAP_IWMMXT    512
-#define HWCAP_CRUNCH    1024
-#define HWCAP_THUMBEE   2048
-#define HWCAP_NEON      4096
-#define HWCAP_VFPv3     8192
-#define HWCAP_VFPv3D16  16384
-#define HWCAP_TLS       32768
+#define HWCAP_SWP       (1 << 0)
+#define HWCAP_HALF      (1 << 1)
+#define HWCAP_THUMB     (1 << 2)
+#define HWCAP_26BIT     (1 << 3)        /* Play it safe */
+#define HWCAP_FAST_MULT (1 << 4)
+#define HWCAP_FPA       (1 << 5)
+#define HWCAP_VFP       (1 << 6)
+#define HWCAP_EDSP      (1 << 7)
+#define HWCAP_JAVA      (1 << 8)
+#define HWCAP_IWMMXT    (1 << 9)
+#define HWCAP_CRUNCH    (1 << 10)
+#define HWCAP_THUMBEE   (1 << 11)
+#define HWCAP_NEON      (1 << 12)
+#define HWCAP_VFPv3     (1 << 13)
+#define HWCAP_VFPv3D16  (1 << 14)
+#define HWCAP_TLS       (1 << 15)
+#define HWCAP_VFPv4     (1 << 16)
+#define HWCAP_IDIVA     (1 << 17)
+#define HWCAP_IDIVT     (1 << 18)
+#define HWCAP_IDIV      (HWCAP_IDIVA | HWCAP_IDIVT)
 
 #if defined(__KERNEL__) && !defined(__ASSEMBLY__)
 /*
diff --git a/arch/arm/include/asm/kprobes.h b/arch/arm/include/asm/kprobes.h
index e46bdd0097eb..feec86768f9c 100644
--- a/arch/arm/include/asm/kprobes.h
+++ b/arch/arm/include/asm/kprobes.h
@@ -24,12 +24,6 @@
 #define MAX_INSN_SIZE                   2
 #define MAX_STACK_SIZE                  64      /* 32 would probably be OK */
 
-/*
- * This undefined instruction must be unique and
- * reserved solely for kprobes' use.
- */
-#define KPROBE_BREAKPOINT_INSTRUCTION   0xe7f001f8
-
 #define regs_return_value(regs)         ((regs)->ARM_r0)
 #define flush_insn_slot(p)              do { } while (0)
 #define kretprobe_blacklist_size        0
@@ -38,14 +32,17 @@ typedef u32 kprobe_opcode_t;
 
 struct kprobe;
 typedef void (kprobe_insn_handler_t)(struct kprobe *, struct pt_regs *);
-
 typedef unsigned long (kprobe_check_cc)(unsigned long);
+typedef void (kprobe_insn_singlestep_t)(struct kprobe *, struct pt_regs *);
+typedef void (kprobe_insn_fn_t)(void);
 
 /* Architecture specific copy of original instruction. */
 struct arch_specific_insn {
-        kprobe_opcode_t         *insn;
-        kprobe_insn_handler_t   *insn_handler;
-        kprobe_check_cc         *insn_check_cc;
+        kprobe_opcode_t                 *insn;
+        kprobe_insn_handler_t           *insn_handler;
+        kprobe_check_cc                 *insn_check_cc;
+        kprobe_insn_singlestep_t        *insn_singlestep;
+        kprobe_insn_fn_t                *insn_fn;
 };
 
 struct prev_kprobe {
@@ -62,20 +59,9 @@ struct kprobe_ctlblk {
 };
 
 void arch_remove_kprobe(struct kprobe *);
-void kretprobe_trampoline(void);
-
 int kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr);
 int kprobe_exceptions_notify(struct notifier_block *self,
                              unsigned long val, void *data);
 
-enum kprobe_insn {
-        INSN_REJECTED,
-        INSN_GOOD,
-        INSN_GOOD_NO_SLOT
-};
-
-enum kprobe_insn arm_kprobe_decode_insn(kprobe_opcode_t,
-                                        struct arch_specific_insn *);
-void __init arm_kprobe_decode_init(void);
 
 #endif /* _ARM_KPROBES_H */
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 946f4d778f71..3281fb4b12e3 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -23,6 +23,10 @@ struct machine_desc {
 
         unsigned int            nr_irqs;        /* number of IRQs */
 
+#ifdef CONFIG_ZONE_DMA
+        unsigned long           dma_zone_size;  /* size of DMA-able area */
+#endif
+
         unsigned int            video_start;    /* start of video RAM   */
         unsigned int            video_end;      /* end of video RAM     */
 
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index af44a8fb3480..b8de516e600e 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -204,18 +204,6 @@ static inline unsigned long __phys_to_virt(unsigned long x)
 #endif
 
 /*
- * The DMA mask corresponding to the maximum bus address allocatable
- * using GFP_DMA.  The default here places no restriction on DMA
- * allocations.  This must be the smallest DMA mask in the system,
- * so a successful GFP_DMA allocation will always satisfy this.
- */
-#ifndef ARM_DMA_ZONE_SIZE
-#define ISA_DMA_THRESHOLD       (0xffffffffULL)
-#else
-#define ISA_DMA_THRESHOLD       (PHYS_OFFSET + ARM_DMA_ZONE_SIZE - 1)
-#endif
-
-/*
  * PFNs are used to describe any physical page; this means
  * PFN 0 == physical address 0.
  *
diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h
index c4aa4e8c6af9..0f8e3827a89b 100644
--- a/arch/arm/include/asm/perf_event.h
+++ b/arch/arm/include/asm/perf_event.h
@@ -24,6 +24,8 @@ enum arm_perf_pmu_ids {
         ARM_PERF_PMU_ID_V6MP,
         ARM_PERF_PMU_ID_CA8,
         ARM_PERF_PMU_ID_CA9,
+        ARM_PERF_PMU_ID_CA5,
+        ARM_PERF_PMU_ID_CA15,
         ARM_NUM_PMU_IDS,
 };
 
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index 7544ce6b481a..67c70a31a1be 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -52,7 +52,7 @@ reserve_pmu(enum arm_pmu_type device);
  * a cookie.
  */
 extern int
-release_pmu(struct platform_device *pdev);
+release_pmu(enum arm_pmu_type type);
 
 /**
  * init_pmu() - Initialise the PMU.
diff --git a/arch/arm/include/asm/proc-fns.h b/arch/arm/include/asm/proc-fns.h
index 8ec535e11fd7..633d1cb84d87 100644
--- a/arch/arm/include/asm/proc-fns.h
+++ b/arch/arm/include/asm/proc-fns.h
@@ -82,13 +82,13 @@ extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm);
 extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
 extern void cpu_reset(unsigned long addr) __attribute__((noreturn));
 #else
-#define cpu_proc_init()                 processor._proc_init()
-#define cpu_proc_fin()                  processor._proc_fin()
-#define cpu_reset(addr)                 processor.reset(addr)
-#define cpu_do_idle()                   processor._do_idle()
-#define cpu_dcache_clean_area(addr,sz)  processor.dcache_clean_area(addr,sz)
-#define cpu_set_pte_ext(ptep,pte,ext)   processor.set_pte_ext(ptep,pte,ext)
-#define cpu_do_switch_mm(pgd,mm)        processor.switch_mm(pgd,mm)
+#define cpu_proc_init                   processor._proc_init
+#define cpu_proc_fin                    processor._proc_fin
+#define cpu_reset                       processor.reset
+#define cpu_do_idle                     processor._do_idle
+#define cpu_dcache_clean_area           processor.dcache_clean_area
+#define cpu_set_pte_ext                 processor.set_pte_ext
+#define cpu_do_switch_mm                processor.switch_mm
 #endif
 
 extern void cpu_resume(void);
diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h
index 312d10877bd7..96187ff58c24 100644
--- a/arch/arm/include/asm/ptrace.h
+++ b/arch/arm/include/asm/ptrace.h
@@ -69,8 +69,9 @@
 #define PSR_c           0x000000ff      /* Control              */
 
 /*
- * ARMv7 groups of APSR bits
+ * ARMv7 groups of PSR bits
  */
+#define APSR_MASK       0xf80f0000      /* N, Z, C, V, Q and GE flags */
 #define PSR_ISET_MASK   0x01000010      /* ISA state (J, T) mask */
 #define PSR_IT_MASK     0x0600fc00      /* If-Then execution state mask */
 #define PSR_ENDIAN_MASK 0x00000200      /* Endianness state mask */
@@ -200,6 +201,14 @@ extern unsigned long profile_pc(struct pt_regs *regs);
 #define PREDICATE_ALWAYS        0xe0000000
 
 /*
+ * True if instr is a 32-bit thumb instruction. This works if instr
+ * is the first or only half-word of a thumb instruction. It also works
+ * when instr holds all 32-bits of a wide thumb instruction if stored
+ * in the form (first_half<<16)|(second_half)
+ */
+#define is_wide_instruction(instr)      ((unsigned)(instr) >= 0xe800)
+
+/*
  * kprobe-based event tracer support
  */
 #include <linux/stddef.h>
diff --git a/arch/arm/include/asm/scatterlist.h b/arch/arm/include/asm/scatterlist.h
index 2f87870d9347..cefdb8f898a1 100644
--- a/arch/arm/include/asm/scatterlist.h
+++ b/arch/arm/include/asm/scatterlist.h
@@ -1,6 +1,10 @@
 #ifndef _ASMARM_SCATTERLIST_H
 #define _ASMARM_SCATTERLIST_H
 
+#ifdef CONFIG_ARM_HAS_SG_CHAIN
+#define ARCH_HAS_SG_CHAIN
+#endif
+
 #include <asm/memory.h>
 #include <asm/types.h>
 #include <asm-generic/scatterlist.h>
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index ee2ad8ae07af..915696dd9c7c 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -187,12 +187,16 @@ struct tagtable {
 
 #define __tag __used __attribute__((__section__(".taglist.init")))
 #define __tagtable(tag, fn) \
-static struct tagtable __tagtable_##fn __tag = { tag, fn }
+static const struct tagtable __tagtable_##fn __tag = { tag, fn }
 
 /*
  * Memory map description
  */
-#define NR_BANKS 8
+#ifdef CONFIG_ARCH_EP93XX
+# define NR_BANKS 16
+#else
+# define NR_BANKS 8
+#endif
 
 struct membank {
         phys_addr_t start;
diff --git a/arch/arm/include/asm/suspend.h b/arch/arm/include/asm/suspend.h
new file mode 100644
index 000000000000..b0e4e1a02318
--- /dev/null
+++ b/arch/arm/include/asm/suspend.h
@@ -0,0 +1,22 @@
+#ifndef __ASM_ARM_SUSPEND_H
+#define __ASM_ARM_SUSPEND_H
+
+#include <asm/memory.h>
+#include <asm/tlbflush.h>
+
+extern void cpu_resume(void);
+
+/*
+ * Hide the first two arguments to __cpu_suspend - these are an implementation
+ * detail which platform code shouldn't have to know about.
+ */
+static inline int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
+{
+        extern int __cpu_suspend(int, long, unsigned long,
+                                 int (*)(unsigned long));
+        int ret = __cpu_suspend(0, PHYS_OFFSET - PAGE_OFFSET, arg, fn);
+        flush_tlb_all();
+        return ret;
+}
+
+#endif
diff --git a/arch/arm/include/asm/tcm.h b/arch/arm/include/asm/tcm.h
index 5929ef5d927a..8578d726ad78 100644
--- a/arch/arm/include/asm/tcm.h
+++ b/arch/arm/include/asm/tcm.h
@@ -27,5 +27,7 @@
 
 void *tcm_alloc(size_t len);
 void tcm_free(void *addr, size_t len);
+bool tcm_dtcm_present(void);
+bool tcm_itcm_present(void);
 
 #endif
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index d2005de383b8..8077145698ff 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -34,16 +34,12 @@
 #define TLB_V6_D_ASID   (1 << 17)
 #define TLB_V6_I_ASID   (1 << 18)
 
-#define TLB_BTB         (1 << 28)
-
 /* Unified Inner Shareable TLB operations (ARMv7 MP extensions) */
 #define TLB_V7_UIS_PAGE (1 << 19)
 #define TLB_V7_UIS_FULL (1 << 20)
 #define TLB_V7_UIS_ASID (1 << 21)
 
-/* Inner Shareable BTB operation (ARMv7 MP extensions) */
-#define TLB_V7_IS_BTB   (1 << 22)
-
+#define TLB_BARRIER     (1 << 28)
 #define TLB_L2CLEAN_FR  (1 << 29)               /* Feroceon */
 #define TLB_DCLEAN      (1 << 30)
 #define TLB_WB          (1 << 31)
@@ -58,7 +54,7 @@
  *        v4wb  - ARMv4 with write buffer without I TLB flush entry instruction
  *        v4wbi - ARMv4 with write buffer with I TLB flush entry instruction
  *        fr    - Feroceon (v4wbi with non-outer-cacheable page table walks)
- *        fa    - Faraday (v4 with write buffer with UTLB and branch target buffer (BTB))
+ *        fa    - Faraday (v4 with write buffer with UTLB)
  *        v6wbi - ARMv6 with write buffer with I TLB flush entry instruction
  *        v7wbi - identical to v6wbi
  */
@@ -99,7 +95,7 @@
 # define v4_always_flags        (-1UL)
 #endif
 
-#define fa_tlb_flags    (TLB_WB | TLB_BTB | TLB_DCLEAN | \
+#define fa_tlb_flags    (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \
                          TLB_V4_U_FULL | TLB_V4_U_PAGE)
 
 #ifdef CONFIG_CPU_TLB_FA
@@ -166,7 +162,7 @@
 # define v4wb_always_flags      (-1UL)
 #endif
 
-#define v6wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BTB | \
+#define v6wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \
                          TLB_V6_I_FULL | TLB_V6_D_FULL | \
                          TLB_V6_I_PAGE | TLB_V6_D_PAGE | \
                          TLB_V6_I_ASID | TLB_V6_D_ASID)
@@ -184,9 +180,9 @@
 # define v6wbi_always_flags     (-1UL)
 #endif
 
-#define v7wbi_tlb_flags_smp     (TLB_WB | TLB_DCLEAN | TLB_V7_IS_BTB | \
+#define v7wbi_tlb_flags_smp     (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \
                          TLB_V7_UIS_FULL | TLB_V7_UIS_PAGE | TLB_V7_UIS_ASID)
-#define v7wbi_tlb_flags_up      (TLB_WB | TLB_DCLEAN | TLB_BTB | \
+#define v7wbi_tlb_flags_up      (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \
                          TLB_V6_U_FULL | TLB_V6_U_PAGE | TLB_V6_U_ASID)
 
 #ifdef CONFIG_CPU_TLB_V7
@@ -341,15 +337,7 @@ static inline void local_flush_tlb_all(void)
         if (tlb_flag(TLB_V7_UIS_FULL))
                 asm("mcr p15, 0, %0, c8, c3, 0" : : "r" (zero) : "cc");
 
-        if (tlb_flag(TLB_BTB)) {
-                /* flush the branch target cache */
-                asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
-                dsb();
-                isb();
-        }
-        if (tlb_flag(TLB_V7_IS_BTB)) {
-                /* flush the branch target cache */
-                asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero) : "cc");
+        if (tlb_flag(TLB_BARRIER)) {
                 dsb();
                 isb();
         }
@@ -389,17 +377,8 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
                 asm("mcr p15, 0, %0, c8, c3, 2" : : "r" (asid) : "cc");
 #endif
 
-        if (tlb_flag(TLB_BTB)) {
-                /* flush the branch target cache */
-                asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
-                dsb();
-        }
-        if (tlb_flag(TLB_V7_IS_BTB)) {
-                /* flush the branch target cache */
-                asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero) : "cc");
+        if (tlb_flag(TLB_BARRIER))
                 dsb();
-                isb();
-        }
 }
 
 static inline void
@@ -439,17 +418,8 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
                 asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (uaddr) : "cc");
 #endif
 
-        if (tlb_flag(TLB_BTB)) {
-                /* flush the branch target cache */
-                asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
-                dsb();
-        }
-        if (tlb_flag(TLB_V7_IS_BTB)) {
-                /* flush the branch target cache */
-                asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero) : "cc");
+        if (tlb_flag(TLB_BARRIER))
                 dsb();
-                isb();
-        }
 }
 
 static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
@@ -482,15 +452,7 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
         if (tlb_flag(TLB_V7_UIS_PAGE))
                 asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (kaddr) : "cc");
 
-        if (tlb_flag(TLB_BTB)) {
-                /* flush the branch target cache */
-                asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
-                dsb();
-                isb();
-        }
-        if (tlb_flag(TLB_V7_IS_BTB)) {
-                /* flush the branch target cache */
-                asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero) : "cc");
+        if (tlb_flag(TLB_BARRIER)) {
                 dsb();
                 isb();
         }
diff --git a/arch/arm/include/asm/traps.h b/arch/arm/include/asm/traps.h
index f90756dc16dc..5b29a6673625 100644
--- a/arch/arm/include/asm/traps.h
+++ b/arch/arm/include/asm/traps.h
@@ -3,6 +3,9 @@
 
 #include <linux/list.h>
 
+struct pt_regs;
+struct task_struct;
+
 struct undef_hook {
         struct list_head node;
         u32 instr_mask;