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Diffstat (limited to 'arch/arm/include/uapi/asm/ptrace.h')
-rw-r--r--arch/arm/include/uapi/asm/ptrace.h35
1 files changed, 27 insertions, 8 deletions
diff --git a/arch/arm/include/uapi/asm/ptrace.h b/arch/arm/include/uapi/asm/ptrace.h
index 96ee0929790f..5af0ed1b825a 100644
--- a/arch/arm/include/uapi/asm/ptrace.h
+++ b/arch/arm/include/uapi/asm/ptrace.h
@@ -34,28 +34,47 @@
34 34
35/* 35/*
36 * PSR bits 36 * PSR bits
37 * Note on V7M there is no mode contained in the PSR
37 */ 38 */
38#define USR26_MODE 0x00000000 39#define USR26_MODE 0x00000000
39#define FIQ26_MODE 0x00000001 40#define FIQ26_MODE 0x00000001
40#define IRQ26_MODE 0x00000002 41#define IRQ26_MODE 0x00000002
41#define SVC26_MODE 0x00000003 42#define SVC26_MODE 0x00000003
43#if defined(__KERNEL__) && defined(CONFIG_CPU_V7M)
44/*
45 * Use 0 here to get code right that creates a userspace
46 * or kernel space thread.
47 */
48#define USR_MODE 0x00000000
49#define SVC_MODE 0x00000000
50#else
42#define USR_MODE 0x00000010 51#define USR_MODE 0x00000010
52#define SVC_MODE 0x00000013
53#endif
43#define FIQ_MODE 0x00000011 54#define FIQ_MODE 0x00000011
44#define IRQ_MODE 0x00000012 55#define IRQ_MODE 0x00000012
45#define SVC_MODE 0x00000013
46#define ABT_MODE 0x00000017 56#define ABT_MODE 0x00000017
47#define HYP_MODE 0x0000001a 57#define HYP_MODE 0x0000001a
48#define UND_MODE 0x0000001b 58#define UND_MODE 0x0000001b
49#define SYSTEM_MODE 0x0000001f 59#define SYSTEM_MODE 0x0000001f
50#define MODE32_BIT 0x00000010 60#define MODE32_BIT 0x00000010
51#define MODE_MASK 0x0000001f 61#define MODE_MASK 0x0000001f
52#define PSR_T_BIT 0x00000020 62
53#define PSR_F_BIT 0x00000040 63#define V4_PSR_T_BIT 0x00000020 /* >= V4T, but not V7M */
54#define PSR_I_BIT 0x00000080 64#define V7M_PSR_T_BIT 0x01000000
55#define PSR_A_BIT 0x00000100 65#if defined(__KERNEL__) && defined(CONFIG_CPU_V7M)
56#define PSR_E_BIT 0x00000200 66#define PSR_T_BIT V7M_PSR_T_BIT
57#define PSR_J_BIT 0x01000000 67#else
58#define PSR_Q_BIT 0x08000000 68/* for compatibility */
69#define PSR_T_BIT V4_PSR_T_BIT
70#endif
71
72#define PSR_F_BIT 0x00000040 /* >= V4, but not V7M */
73#define PSR_I_BIT 0x00000080 /* >= V4, but not V7M */
74#define PSR_A_BIT 0x00000100 /* >= V6, but not V7M */
75#define PSR_E_BIT 0x00000200 /* >= V6, but not V7M */
76#define PSR_J_BIT 0x01000000 /* >= V5J, but not V7M */
77#define PSR_Q_BIT 0x08000000 /* >= V5E, including V7M */
59#define PSR_V_BIT 0x10000000 78#define PSR_V_BIT 0x10000000
60#define PSR_C_BIT 0x20000000 79#define PSR_C_BIT 0x20000000
61#define PSR_Z_BIT 0x40000000 80#define PSR_Z_BIT 0x40000000