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-rw-r--r--arch/arm/include/asm/assembler.h4
-rw-r--r--arch/arm/include/asm/bitops.h4
-rw-r--r--arch/arm/include/asm/dma-mapping.h88
-rw-r--r--arch/arm/include/asm/entry-macro-multi.S16
-rw-r--r--arch/arm/include/asm/memory.h12
-rw-r--r--arch/arm/include/asm/pmu.h2
-rw-r--r--arch/arm/include/asm/proc-fns.h14
-rw-r--r--arch/arm/include/asm/scatterlist.h4
-rw-r--r--arch/arm/include/asm/setup.h8
-rw-r--r--arch/arm/include/asm/suspend.h22
-rw-r--r--arch/arm/include/asm/tcm.h2
-rw-r--r--arch/arm/include/asm/tlbflush.h58
-rw-r--r--arch/arm/include/asm/traps.h3
13 files changed, 83 insertions, 154 deletions
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index bc2d2d75f706..65c3f2474f5e 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -13,6 +13,9 @@
13 * Do not include any C declarations in this file - it is included by 13 * Do not include any C declarations in this file - it is included by
14 * assembler source. 14 * assembler source.
15 */ 15 */
16#ifndef __ASM_ASSEMBLER_H__
17#define __ASM_ASSEMBLER_H__
18
16#ifndef __ASSEMBLY__ 19#ifndef __ASSEMBLY__
17#error "Only include this from assembly code" 20#error "Only include this from assembly code"
18#endif 21#endif
@@ -290,3 +293,4 @@
290 .macro ldrusr, reg, ptr, inc, cond=al, rept=1, abort=9001f 293 .macro ldrusr, reg, ptr, inc, cond=al, rept=1, abort=9001f
291 usracc ldr, \reg, \ptr, \inc, \cond, \rept, \abort 294 usracc ldr, \reg, \ptr, \inc, \cond, \rept, \abort
292 .endm 295 .endm
296#endif /* __ASM_ASSEMBLER_H__ */
diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h
index b4892a06442c..f4280593dfa3 100644
--- a/arch/arm/include/asm/bitops.h
+++ b/arch/arm/include/asm/bitops.h
@@ -26,8 +26,8 @@
26#include <linux/compiler.h> 26#include <linux/compiler.h>
27#include <asm/system.h> 27#include <asm/system.h>
28 28
29#define smp_mb__before_clear_bit() mb() 29#define smp_mb__before_clear_bit() smp_mb()
30#define smp_mb__after_clear_bit() mb() 30#define smp_mb__after_clear_bit() smp_mb()
31 31
32/* 32/*
33 * These functions are the basis of our bit ops. 33 * These functions are the basis of our bit ops.
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 4fff837363ed..7a21d0bf7134 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -115,39 +115,8 @@ static inline void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
115 ___dma_page_dev_to_cpu(page, off, size, dir); 115 ___dma_page_dev_to_cpu(page, off, size, dir);
116} 116}
117 117
118/* 118extern int dma_supported(struct device *, u64);
119 * Return whether the given device DMA address mask can be supported 119extern int dma_set_mask(struct device *, u64);
120 * properly. For example, if your device can only drive the low 24-bits
121 * during bus mastering, then you would pass 0x00ffffff as the mask
122 * to this function.
123 *
124 * FIXME: This should really be a platform specific issue - we should
125 * return false if GFP_DMA allocations may not satisfy the supplied 'mask'.
126 */
127static inline int dma_supported(struct device *dev, u64 mask)
128{
129 if (mask < ISA_DMA_THRESHOLD)
130 return 0;
131 return 1;
132}
133
134static inline int dma_set_mask(struct device *dev, u64 dma_mask)
135{
136#ifdef CONFIG_DMABOUNCE
137 if (dev->archdata.dmabounce) {
138 if (dma_mask >= ISA_DMA_THRESHOLD)
139 return 0;
140 else
141 return -EIO;
142 }
143#endif
144 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
145 return -EIO;
146
147 *dev->dma_mask = dma_mask;
148
149 return 0;
150}
151 120
152/* 121/*
153 * DMA errors are defined by all-bits-set in the DMA address. 122 * DMA errors are defined by all-bits-set in the DMA address.
@@ -256,14 +225,14 @@ int dma_mmap_writecombine(struct device *, struct vm_area_struct *,
256 * @dev: valid struct device pointer 225 * @dev: valid struct device pointer
257 * @small_buf_size: size of buffers to use with small buffer pool 226 * @small_buf_size: size of buffers to use with small buffer pool
258 * @large_buf_size: size of buffers to use with large buffer pool (can be 0) 227 * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
228 * @needs_bounce_fn: called to determine whether buffer needs bouncing
259 * 229 *
260 * This function should be called by low-level platform code to register 230 * This function should be called by low-level platform code to register
261 * a device as requireing DMA buffer bouncing. The function will allocate 231 * a device as requireing DMA buffer bouncing. The function will allocate
262 * appropriate DMA pools for the device. 232 * appropriate DMA pools for the device.
263 *
264 */ 233 */
265extern int dmabounce_register_dev(struct device *, unsigned long, 234extern int dmabounce_register_dev(struct device *, unsigned long,
266 unsigned long); 235 unsigned long, int (*)(struct device *, dma_addr_t, size_t));
267 236
268/** 237/**
269 * dmabounce_unregister_dev 238 * dmabounce_unregister_dev
@@ -277,31 +246,9 @@ extern int dmabounce_register_dev(struct device *, unsigned long,
277 */ 246 */
278extern void dmabounce_unregister_dev(struct device *); 247extern void dmabounce_unregister_dev(struct device *);
279 248
280/**
281 * dma_needs_bounce
282 *
283 * @dev: valid struct device pointer
284 * @dma_handle: dma_handle of unbounced buffer
285 * @size: size of region being mapped
286 *
287 * Platforms that utilize the dmabounce mechanism must implement
288 * this function.
289 *
290 * The dmabounce routines call this function whenever a dma-mapping
291 * is requested to determine whether a given buffer needs to be bounced
292 * or not. The function must return 0 if the buffer is OK for
293 * DMA access and 1 if the buffer needs to be bounced.
294 *
295 */
296extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
297
298/* 249/*
299 * The DMA API, implemented by dmabounce.c. See below for descriptions. 250 * The DMA API, implemented by dmabounce.c. See below for descriptions.
300 */ 251 */
301extern dma_addr_t __dma_map_single(struct device *, void *, size_t,
302 enum dma_data_direction);
303extern void __dma_unmap_single(struct device *, dma_addr_t, size_t,
304 enum dma_data_direction);
305extern dma_addr_t __dma_map_page(struct device *, struct page *, 252extern dma_addr_t __dma_map_page(struct device *, struct page *,
306 unsigned long, size_t, enum dma_data_direction); 253 unsigned long, size_t, enum dma_data_direction);
307extern void __dma_unmap_page(struct device *, dma_addr_t, size_t, 254extern void __dma_unmap_page(struct device *, dma_addr_t, size_t,
@@ -328,13 +275,6 @@ static inline int dmabounce_sync_for_device(struct device *d, dma_addr_t addr,
328} 275}
329 276
330 277
331static inline dma_addr_t __dma_map_single(struct device *dev, void *cpu_addr,
332 size_t size, enum dma_data_direction dir)
333{
334 __dma_single_cpu_to_dev(cpu_addr, size, dir);
335 return virt_to_dma(dev, cpu_addr);
336}
337
338static inline dma_addr_t __dma_map_page(struct device *dev, struct page *page, 278static inline dma_addr_t __dma_map_page(struct device *dev, struct page *page,
339 unsigned long offset, size_t size, enum dma_data_direction dir) 279 unsigned long offset, size_t size, enum dma_data_direction dir)
340{ 280{
@@ -342,12 +282,6 @@ static inline dma_addr_t __dma_map_page(struct device *dev, struct page *page,
342 return pfn_to_dma(dev, page_to_pfn(page)) + offset; 282 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
343} 283}
344 284
345static inline void __dma_unmap_single(struct device *dev, dma_addr_t handle,
346 size_t size, enum dma_data_direction dir)
347{
348 __dma_single_dev_to_cpu(dma_to_virt(dev, handle), size, dir);
349}
350
351static inline void __dma_unmap_page(struct device *dev, dma_addr_t handle, 285static inline void __dma_unmap_page(struct device *dev, dma_addr_t handle,
352 size_t size, enum dma_data_direction dir) 286 size_t size, enum dma_data_direction dir)
353{ 287{
@@ -373,14 +307,18 @@ static inline void __dma_unmap_page(struct device *dev, dma_addr_t handle,
373static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, 307static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
374 size_t size, enum dma_data_direction dir) 308 size_t size, enum dma_data_direction dir)
375{ 309{
310 unsigned long offset;
311 struct page *page;
376 dma_addr_t addr; 312 dma_addr_t addr;
377 313
314 BUG_ON(!virt_addr_valid(cpu_addr));
315 BUG_ON(!virt_addr_valid(cpu_addr + size - 1));
378 BUG_ON(!valid_dma_direction(dir)); 316 BUG_ON(!valid_dma_direction(dir));
379 317
380 addr = __dma_map_single(dev, cpu_addr, size, dir); 318 page = virt_to_page(cpu_addr);
381 debug_dma_map_page(dev, virt_to_page(cpu_addr), 319 offset = (unsigned long)cpu_addr & ~PAGE_MASK;
382 (unsigned long)cpu_addr & ~PAGE_MASK, size, 320 addr = __dma_map_page(dev, page, offset, size, dir);
383 dir, addr, true); 321 debug_dma_map_page(dev, page, offset, size, dir, addr, true);
384 322
385 return addr; 323 return addr;
386} 324}
@@ -430,7 +368,7 @@ static inline void dma_unmap_single(struct device *dev, dma_addr_t handle,
430 size_t size, enum dma_data_direction dir) 368 size_t size, enum dma_data_direction dir)
431{ 369{
432 debug_dma_unmap_page(dev, handle, size, dir, true); 370 debug_dma_unmap_page(dev, handle, size, dir, true);
433 __dma_unmap_single(dev, handle, size, dir); 371 __dma_unmap_page(dev, handle, size, dir);
434} 372}
435 373
436/** 374/**
diff --git a/arch/arm/include/asm/entry-macro-multi.S b/arch/arm/include/asm/entry-macro-multi.S
index ec0bbf79c71f..2f1e2098dfe7 100644
--- a/arch/arm/include/asm/entry-macro-multi.S
+++ b/arch/arm/include/asm/entry-macro-multi.S
@@ -1,9 +1,11 @@
1#include <asm/assembler.h>
2
1/* 3/*
2 * Interrupt handling. Preserves r7, r8, r9 4 * Interrupt handling. Preserves r7, r8, r9
3 */ 5 */
4 .macro arch_irq_handler_default 6 .macro arch_irq_handler_default
5 get_irqnr_preamble r5, lr 7 get_irqnr_preamble r6, lr
61: get_irqnr_and_base r0, r6, r5, lr 81: get_irqnr_and_base r0, r2, r6, lr
7 movne r1, sp 9 movne r1, sp
8 @ 10 @
9 @ routine called with r0 = irq number, r1 = struct pt_regs * 11 @ routine called with r0 = irq number, r1 = struct pt_regs *
@@ -15,17 +17,17 @@
15 /* 17 /*
16 * XXX 18 * XXX
17 * 19 *
18 * this macro assumes that irqstat (r6) and base (r5) are 20 * this macro assumes that irqstat (r2) and base (r6) are
19 * preserved from get_irqnr_and_base above 21 * preserved from get_irqnr_and_base above
20 */ 22 */
21 ALT_SMP(test_for_ipi r0, r6, r5, lr) 23 ALT_SMP(test_for_ipi r0, r2, r6, lr)
22 ALT_UP_B(9997f) 24 ALT_UP_B(9997f)
23 movne r1, sp 25 movne r1, sp
24 adrne lr, BSYM(1b) 26 adrne lr, BSYM(1b)
25 bne do_IPI 27 bne do_IPI
26 28
27#ifdef CONFIG_LOCAL_TIMERS 29#ifdef CONFIG_LOCAL_TIMERS
28 test_for_ltirq r0, r6, r5, lr 30 test_for_ltirq r0, r2, r6, lr
29 movne r0, sp 31 movne r0, sp
30 adrne lr, BSYM(1b) 32 adrne lr, BSYM(1b)
31 bne do_local_timer 33 bne do_local_timer
@@ -38,7 +40,7 @@
38 .align 5 40 .align 5
39 .global \symbol_name 41 .global \symbol_name
40\symbol_name: 42\symbol_name:
41 mov r4, lr 43 mov r8, lr
42 arch_irq_handler_default 44 arch_irq_handler_default
43 mov pc, r4 45 mov pc, r8
44 .endm 46 .endm
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index af44a8fb3480..b8de516e600e 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -204,18 +204,6 @@ static inline unsigned long __phys_to_virt(unsigned long x)
204#endif 204#endif
205 205
206/* 206/*
207 * The DMA mask corresponding to the maximum bus address allocatable
208 * using GFP_DMA. The default here places no restriction on DMA
209 * allocations. This must be the smallest DMA mask in the system,
210 * so a successful GFP_DMA allocation will always satisfy this.
211 */
212#ifndef ARM_DMA_ZONE_SIZE
213#define ISA_DMA_THRESHOLD (0xffffffffULL)
214#else
215#define ISA_DMA_THRESHOLD (PHYS_OFFSET + ARM_DMA_ZONE_SIZE - 1)
216#endif
217
218/*
219 * PFNs are used to describe any physical page; this means 207 * PFNs are used to describe any physical page; this means
220 * PFN 0 == physical address 0. 208 * PFN 0 == physical address 0.
221 * 209 *
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index 7544ce6b481a..67c70a31a1be 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -52,7 +52,7 @@ reserve_pmu(enum arm_pmu_type device);
52 * a cookie. 52 * a cookie.
53 */ 53 */
54extern int 54extern int
55release_pmu(struct platform_device *pdev); 55release_pmu(enum arm_pmu_type type);
56 56
57/** 57/**
58 * init_pmu() - Initialise the PMU. 58 * init_pmu() - Initialise the PMU.
diff --git a/arch/arm/include/asm/proc-fns.h b/arch/arm/include/asm/proc-fns.h
index 8ec535e11fd7..633d1cb84d87 100644
--- a/arch/arm/include/asm/proc-fns.h
+++ b/arch/arm/include/asm/proc-fns.h
@@ -82,13 +82,13 @@ extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm);
82extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext); 82extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
83extern void cpu_reset(unsigned long addr) __attribute__((noreturn)); 83extern void cpu_reset(unsigned long addr) __attribute__((noreturn));
84#else 84#else
85#define cpu_proc_init() processor._proc_init() 85#define cpu_proc_init processor._proc_init
86#define cpu_proc_fin() processor._proc_fin() 86#define cpu_proc_fin processor._proc_fin
87#define cpu_reset(addr) processor.reset(addr) 87#define cpu_reset processor.reset
88#define cpu_do_idle() processor._do_idle() 88#define cpu_do_idle processor._do_idle
89#define cpu_dcache_clean_area(addr,sz) processor.dcache_clean_area(addr,sz) 89#define cpu_dcache_clean_area processor.dcache_clean_area
90#define cpu_set_pte_ext(ptep,pte,ext) processor.set_pte_ext(ptep,pte,ext) 90#define cpu_set_pte_ext processor.set_pte_ext
91#define cpu_do_switch_mm(pgd,mm) processor.switch_mm(pgd,mm) 91#define cpu_do_switch_mm processor.switch_mm
92#endif 92#endif
93 93
94extern void cpu_resume(void); 94extern void cpu_resume(void);
diff --git a/arch/arm/include/asm/scatterlist.h b/arch/arm/include/asm/scatterlist.h
index 2f87870d9347..cefdb8f898a1 100644
--- a/arch/arm/include/asm/scatterlist.h
+++ b/arch/arm/include/asm/scatterlist.h
@@ -1,6 +1,10 @@
1#ifndef _ASMARM_SCATTERLIST_H 1#ifndef _ASMARM_SCATTERLIST_H
2#define _ASMARM_SCATTERLIST_H 2#define _ASMARM_SCATTERLIST_H
3 3
4#ifdef CONFIG_ARM_HAS_SG_CHAIN
5#define ARCH_HAS_SG_CHAIN
6#endif
7
4#include <asm/memory.h> 8#include <asm/memory.h>
5#include <asm/types.h> 9#include <asm/types.h>
6#include <asm-generic/scatterlist.h> 10#include <asm-generic/scatterlist.h>
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index ee2ad8ae07af..915696dd9c7c 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -187,12 +187,16 @@ struct tagtable {
187 187
188#define __tag __used __attribute__((__section__(".taglist.init"))) 188#define __tag __used __attribute__((__section__(".taglist.init")))
189#define __tagtable(tag, fn) \ 189#define __tagtable(tag, fn) \
190static struct tagtable __tagtable_##fn __tag = { tag, fn } 190static const struct tagtable __tagtable_##fn __tag = { tag, fn }
191 191
192/* 192/*
193 * Memory map description 193 * Memory map description
194 */ 194 */
195#define NR_BANKS 8 195#ifdef CONFIG_ARCH_EP93XX
196# define NR_BANKS 16
197#else
198# define NR_BANKS 8
199#endif
196 200
197struct membank { 201struct membank {
198 phys_addr_t start; 202 phys_addr_t start;
diff --git a/arch/arm/include/asm/suspend.h b/arch/arm/include/asm/suspend.h
new file mode 100644
index 000000000000..b0e4e1a02318
--- /dev/null
+++ b/arch/arm/include/asm/suspend.h
@@ -0,0 +1,22 @@
1#ifndef __ASM_ARM_SUSPEND_H
2#define __ASM_ARM_SUSPEND_H
3
4#include <asm/memory.h>
5#include <asm/tlbflush.h>
6
7extern void cpu_resume(void);
8
9/*
10 * Hide the first two arguments to __cpu_suspend - these are an implementation
11 * detail which platform code shouldn't have to know about.
12 */
13static inline int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
14{
15 extern int __cpu_suspend(int, long, unsigned long,
16 int (*)(unsigned long));
17 int ret = __cpu_suspend(0, PHYS_OFFSET - PAGE_OFFSET, arg, fn);
18 flush_tlb_all();
19 return ret;
20}
21
22#endif
diff --git a/arch/arm/include/asm/tcm.h b/arch/arm/include/asm/tcm.h
index 5929ef5d927a..8578d726ad78 100644
--- a/arch/arm/include/asm/tcm.h
+++ b/arch/arm/include/asm/tcm.h
@@ -27,5 +27,7 @@
27 27
28void *tcm_alloc(size_t len); 28void *tcm_alloc(size_t len);
29void tcm_free(void *addr, size_t len); 29void tcm_free(void *addr, size_t len);
30bool tcm_dtcm_present(void);
31bool tcm_itcm_present(void);
30 32
31#endif 33#endif
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index d2005de383b8..8077145698ff 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -34,16 +34,12 @@
34#define TLB_V6_D_ASID (1 << 17) 34#define TLB_V6_D_ASID (1 << 17)
35#define TLB_V6_I_ASID (1 << 18) 35#define TLB_V6_I_ASID (1 << 18)
36 36
37#define TLB_BTB (1 << 28)
38
39/* Unified Inner Shareable TLB operations (ARMv7 MP extensions) */ 37/* Unified Inner Shareable TLB operations (ARMv7 MP extensions) */
40#define TLB_V7_UIS_PAGE (1 << 19) 38#define TLB_V7_UIS_PAGE (1 << 19)
41#define TLB_V7_UIS_FULL (1 << 20) 39#define TLB_V7_UIS_FULL (1 << 20)
42#define TLB_V7_UIS_ASID (1 << 21) 40#define TLB_V7_UIS_ASID (1 << 21)
43 41
44/* Inner Shareable BTB operation (ARMv7 MP extensions) */ 42#define TLB_BARRIER (1 << 28)
45#define TLB_V7_IS_BTB (1 << 22)
46
47#define TLB_L2CLEAN_FR (1 << 29) /* Feroceon */ 43#define TLB_L2CLEAN_FR (1 << 29) /* Feroceon */
48#define TLB_DCLEAN (1 << 30) 44#define TLB_DCLEAN (1 << 30)
49#define TLB_WB (1 << 31) 45#define TLB_WB (1 << 31)
@@ -58,7 +54,7 @@
58 * v4wb - ARMv4 with write buffer without I TLB flush entry instruction 54 * v4wb - ARMv4 with write buffer without I TLB flush entry instruction
59 * v4wbi - ARMv4 with write buffer with I TLB flush entry instruction 55 * v4wbi - ARMv4 with write buffer with I TLB flush entry instruction
60 * fr - Feroceon (v4wbi with non-outer-cacheable page table walks) 56 * fr - Feroceon (v4wbi with non-outer-cacheable page table walks)
61 * fa - Faraday (v4 with write buffer with UTLB and branch target buffer (BTB)) 57 * fa - Faraday (v4 with write buffer with UTLB)
62 * v6wbi - ARMv6 with write buffer with I TLB flush entry instruction 58 * v6wbi - ARMv6 with write buffer with I TLB flush entry instruction
63 * v7wbi - identical to v6wbi 59 * v7wbi - identical to v6wbi
64 */ 60 */
@@ -99,7 +95,7 @@
99# define v4_always_flags (-1UL) 95# define v4_always_flags (-1UL)
100#endif 96#endif
101 97
102#define fa_tlb_flags (TLB_WB | TLB_BTB | TLB_DCLEAN | \ 98#define fa_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \
103 TLB_V4_U_FULL | TLB_V4_U_PAGE) 99 TLB_V4_U_FULL | TLB_V4_U_PAGE)
104 100
105#ifdef CONFIG_CPU_TLB_FA 101#ifdef CONFIG_CPU_TLB_FA
@@ -166,7 +162,7 @@
166# define v4wb_always_flags (-1UL) 162# define v4wb_always_flags (-1UL)
167#endif 163#endif
168 164
169#define v6wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BTB | \ 165#define v6wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \
170 TLB_V6_I_FULL | TLB_V6_D_FULL | \ 166 TLB_V6_I_FULL | TLB_V6_D_FULL | \
171 TLB_V6_I_PAGE | TLB_V6_D_PAGE | \ 167 TLB_V6_I_PAGE | TLB_V6_D_PAGE | \
172 TLB_V6_I_ASID | TLB_V6_D_ASID) 168 TLB_V6_I_ASID | TLB_V6_D_ASID)
@@ -184,9 +180,9 @@
184# define v6wbi_always_flags (-1UL) 180# define v6wbi_always_flags (-1UL)
185#endif 181#endif
186 182
187#define v7wbi_tlb_flags_smp (TLB_WB | TLB_DCLEAN | TLB_V7_IS_BTB | \ 183#define v7wbi_tlb_flags_smp (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \
188 TLB_V7_UIS_FULL | TLB_V7_UIS_PAGE | TLB_V7_UIS_ASID) 184 TLB_V7_UIS_FULL | TLB_V7_UIS_PAGE | TLB_V7_UIS_ASID)
189#define v7wbi_tlb_flags_up (TLB_WB | TLB_DCLEAN | TLB_BTB | \ 185#define v7wbi_tlb_flags_up (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \
190 TLB_V6_U_FULL | TLB_V6_U_PAGE | TLB_V6_U_ASID) 186 TLB_V6_U_FULL | TLB_V6_U_PAGE | TLB_V6_U_ASID)
191 187
192#ifdef CONFIG_CPU_TLB_V7 188#ifdef CONFIG_CPU_TLB_V7
@@ -341,15 +337,7 @@ static inline void local_flush_tlb_all(void)
341 if (tlb_flag(TLB_V7_UIS_FULL)) 337 if (tlb_flag(TLB_V7_UIS_FULL))
342 asm("mcr p15, 0, %0, c8, c3, 0" : : "r" (zero) : "cc"); 338 asm("mcr p15, 0, %0, c8, c3, 0" : : "r" (zero) : "cc");
343 339
344 if (tlb_flag(TLB_BTB)) { 340 if (tlb_flag(TLB_BARRIER)) {
345 /* flush the branch target cache */
346 asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
347 dsb();
348 isb();
349 }
350 if (tlb_flag(TLB_V7_IS_BTB)) {
351 /* flush the branch target cache */
352 asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero) : "cc");
353 dsb(); 341 dsb();
354 isb(); 342 isb();
355 } 343 }
@@ -389,17 +377,8 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
389 asm("mcr p15, 0, %0, c8, c3, 2" : : "r" (asid) : "cc"); 377 asm("mcr p15, 0, %0, c8, c3, 2" : : "r" (asid) : "cc");
390#endif 378#endif
391 379
392 if (tlb_flag(TLB_BTB)) { 380 if (tlb_flag(TLB_BARRIER))
393 /* flush the branch target cache */
394 asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
395 dsb();
396 }
397 if (tlb_flag(TLB_V7_IS_BTB)) {
398 /* flush the branch target cache */
399 asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero) : "cc");
400 dsb(); 381 dsb();
401 isb();
402 }
403} 382}
404 383
405static inline void 384static inline void
@@ -439,17 +418,8 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
439 asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (uaddr) : "cc"); 418 asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (uaddr) : "cc");
440#endif 419#endif
441 420
442 if (tlb_flag(TLB_BTB)) { 421 if (tlb_flag(TLB_BARRIER))
443 /* flush the branch target cache */
444 asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
445 dsb();
446 }
447 if (tlb_flag(TLB_V7_IS_BTB)) {
448 /* flush the branch target cache */
449 asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero) : "cc");
450 dsb(); 422 dsb();
451 isb();
452 }
453} 423}
454 424
455static inline void local_flush_tlb_kernel_page(unsigned long kaddr) 425static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
@@ -482,15 +452,7 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
482 if (tlb_flag(TLB_V7_UIS_PAGE)) 452 if (tlb_flag(TLB_V7_UIS_PAGE))
483 asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (kaddr) : "cc"); 453 asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (kaddr) : "cc");
484 454
485 if (tlb_flag(TLB_BTB)) { 455 if (tlb_flag(TLB_BARRIER)) {
486 /* flush the branch target cache */
487 asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
488 dsb();
489 isb();
490 }
491 if (tlb_flag(TLB_V7_IS_BTB)) {
492 /* flush the branch target cache */
493 asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero) : "cc");
494 dsb(); 456 dsb();
495 isb(); 457 isb();
496 } 458 }
diff --git a/arch/arm/include/asm/traps.h b/arch/arm/include/asm/traps.h
index f90756dc16dc..5b29a6673625 100644
--- a/arch/arm/include/asm/traps.h
+++ b/arch/arm/include/asm/traps.h
@@ -3,6 +3,9 @@
3 3
4#include <linux/list.h> 4#include <linux/list.h>
5 5
6struct pt_regs;
7struct task_struct;
8
6struct undef_hook { 9struct undef_hook {
7 struct list_head node; 10 struct list_head node;
8 u32 instr_mask; 11 u32 instr_mask;