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-rw-r--r--arch/arm/include/asm/delay.h2
-rw-r--r--arch/arm/include/asm/highmem.h7
-rw-r--r--arch/arm/include/asm/mmu_context.h2
-rw-r--r--arch/arm/include/asm/tlbflush.h15
4 files changed, 25 insertions, 1 deletions
diff --git a/arch/arm/include/asm/delay.h b/arch/arm/include/asm/delay.h
index 720799fd3a81..dff714d886d5 100644
--- a/arch/arm/include/asm/delay.h
+++ b/arch/arm/include/asm/delay.h
@@ -24,7 +24,7 @@ extern struct arm_delay_ops {
24 void (*delay)(unsigned long); 24 void (*delay)(unsigned long);
25 void (*const_udelay)(unsigned long); 25 void (*const_udelay)(unsigned long);
26 void (*udelay)(unsigned long); 26 void (*udelay)(unsigned long);
27 bool const_clock; 27 unsigned long ticks_per_jiffy;
28} arm_delay_ops; 28} arm_delay_ops;
29 29
30#define __delay(n) arm_delay_ops.delay(n) 30#define __delay(n) arm_delay_ops.delay(n)
diff --git a/arch/arm/include/asm/highmem.h b/arch/arm/include/asm/highmem.h
index 8c5e828f484d..91b99abe7a95 100644
--- a/arch/arm/include/asm/highmem.h
+++ b/arch/arm/include/asm/highmem.h
@@ -41,6 +41,13 @@ extern void kunmap_high(struct page *page);
41#endif 41#endif
42#endif 42#endif
43 43
44/*
45 * Needed to be able to broadcast the TLB invalidation for kmap.
46 */
47#ifdef CONFIG_ARM_ERRATA_798181
48#undef ARCH_NEEDS_KMAP_HIGH_GET
49#endif
50
44#ifdef ARCH_NEEDS_KMAP_HIGH_GET 51#ifdef ARCH_NEEDS_KMAP_HIGH_GET
45extern void *kmap_high_get(struct page *page); 52extern void *kmap_high_get(struct page *page);
46#else 53#else
diff --git a/arch/arm/include/asm/mmu_context.h b/arch/arm/include/asm/mmu_context.h
index 863a6611323c..a7b85e0d0cc1 100644
--- a/arch/arm/include/asm/mmu_context.h
+++ b/arch/arm/include/asm/mmu_context.h
@@ -27,6 +27,8 @@ void __check_vmalloc_seq(struct mm_struct *mm);
27void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk); 27void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk);
28#define init_new_context(tsk,mm) ({ atomic64_set(&mm->context.id, 0); 0; }) 28#define init_new_context(tsk,mm) ({ atomic64_set(&mm->context.id, 0); 0; })
29 29
30DECLARE_PER_CPU(atomic64_t, active_asids);
31
30#else /* !CONFIG_CPU_HAS_ASID */ 32#else /* !CONFIG_CPU_HAS_ASID */
31 33
32#ifdef CONFIG_MMU 34#ifdef CONFIG_MMU
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index 4db8c8820f0d..9e9c041358ca 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -450,6 +450,21 @@ static inline void local_flush_bp_all(void)
450 isb(); 450 isb();
451} 451}
452 452
453#ifdef CONFIG_ARM_ERRATA_798181
454static inline void dummy_flush_tlb_a15_erratum(void)
455{
456 /*
457 * Dummy TLBIMVAIS. Using the unmapped address 0 and ASID 0.
458 */
459 asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
460 dsb();
461}
462#else
463static inline void dummy_flush_tlb_a15_erratum(void)
464{
465}
466#endif
467
453/* 468/*
454 * flush_pmd_entry 469 * flush_pmd_entry
455 * 470 *