diff options
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r-- | arch/arm/include/asm/cacheflush.h | 23 | ||||
-rw-r--r-- | arch/arm/include/asm/cpu.h | 1 | ||||
-rw-r--r-- | arch/arm/include/asm/dma.h | 4 | ||||
-rw-r--r-- | arch/arm/include/asm/ptrace.h | 6 | ||||
-rw-r--r-- | arch/arm/include/asm/unistd.h | 1 |
5 files changed, 29 insertions, 6 deletions
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index 730aefcfbee3..8113bb5fb66e 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h | |||
@@ -42,7 +42,8 @@ | |||
42 | #endif | 42 | #endif |
43 | 43 | ||
44 | #if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \ | 44 | #if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \ |
45 | defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) | 45 | defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) || \ |
46 | defined(CONFIG_CPU_ARM1026) | ||
46 | # define MULTI_CACHE 1 | 47 | # define MULTI_CACHE 1 |
47 | #endif | 48 | #endif |
48 | 49 | ||
@@ -154,16 +155,16 @@ | |||
154 | * Please note that the implementation of these, and the required | 155 | * Please note that the implementation of these, and the required |
155 | * effects are cache-type (VIVT/VIPT/PIPT) specific. | 156 | * effects are cache-type (VIVT/VIPT/PIPT) specific. |
156 | * | 157 | * |
157 | * flush_cache_kern_all() | 158 | * flush_kern_all() |
158 | * | 159 | * |
159 | * Unconditionally clean and invalidate the entire cache. | 160 | * Unconditionally clean and invalidate the entire cache. |
160 | * | 161 | * |
161 | * flush_cache_user_mm(mm) | 162 | * flush_user_all() |
162 | * | 163 | * |
163 | * Clean and invalidate all user space cache entries | 164 | * Clean and invalidate all user space cache entries |
164 | * before a change of page tables. | 165 | * before a change of page tables. |
165 | * | 166 | * |
166 | * flush_cache_user_range(start, end, flags) | 167 | * flush_user_range(start, end, flags) |
167 | * | 168 | * |
168 | * Clean and invalidate a range of cache entries in the | 169 | * Clean and invalidate a range of cache entries in the |
169 | * specified address space before a change of page tables. | 170 | * specified address space before a change of page tables. |
@@ -179,6 +180,20 @@ | |||
179 | * - start - virtual start address | 180 | * - start - virtual start address |
180 | * - end - virtual end address | 181 | * - end - virtual end address |
181 | * | 182 | * |
183 | * coherent_user_range(start, end) | ||
184 | * | ||
185 | * Ensure coherency between the Icache and the Dcache in the | ||
186 | * region described by start, end. If you have non-snooping | ||
187 | * Harvard caches, you need to implement this function. | ||
188 | * - start - virtual start address | ||
189 | * - end - virtual end address | ||
190 | * | ||
191 | * flush_kern_dcache_area(kaddr, size) | ||
192 | * | ||
193 | * Ensure that the data held in page is written back. | ||
194 | * - kaddr - page address | ||
195 | * - size - region size | ||
196 | * | ||
182 | * DMA Cache Coherency | 197 | * DMA Cache Coherency |
183 | * =================== | 198 | * =================== |
184 | * | 199 | * |
diff --git a/arch/arm/include/asm/cpu.h b/arch/arm/include/asm/cpu.h index 634b2d7c612a..793968173bef 100644 --- a/arch/arm/include/asm/cpu.h +++ b/arch/arm/include/asm/cpu.h | |||
@@ -11,6 +11,7 @@ | |||
11 | #define __ASM_ARM_CPU_H | 11 | #define __ASM_ARM_CPU_H |
12 | 12 | ||
13 | #include <linux/percpu.h> | 13 | #include <linux/percpu.h> |
14 | #include <linux/cpu.h> | ||
14 | 15 | ||
15 | struct cpuinfo_arm { | 16 | struct cpuinfo_arm { |
16 | struct cpu cpu; | 17 | struct cpu cpu; |
diff --git a/arch/arm/include/asm/dma.h b/arch/arm/include/asm/dma.h index 7edf3536df24..ca51143f97f1 100644 --- a/arch/arm/include/asm/dma.h +++ b/arch/arm/include/asm/dma.h | |||
@@ -138,12 +138,12 @@ extern int get_dma_residue(unsigned int chan); | |||
138 | #define NO_DMA 255 | 138 | #define NO_DMA 255 |
139 | #endif | 139 | #endif |
140 | 140 | ||
141 | #endif /* CONFIG_ISA_DMA_API */ | ||
142 | |||
141 | #ifdef CONFIG_PCI | 143 | #ifdef CONFIG_PCI |
142 | extern int isa_dma_bridge_buggy; | 144 | extern int isa_dma_bridge_buggy; |
143 | #else | 145 | #else |
144 | #define isa_dma_bridge_buggy (0) | 146 | #define isa_dma_bridge_buggy (0) |
145 | #endif | 147 | #endif |
146 | 148 | ||
147 | #endif /* CONFIG_ISA_DMA_API */ | ||
148 | |||
149 | #endif /* __ASM_ARM_DMA_H */ | 149 | #endif /* __ASM_ARM_DMA_H */ |
diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h index bbecccda76d0..eec6e897ceb2 100644 --- a/arch/arm/include/asm/ptrace.h +++ b/arch/arm/include/asm/ptrace.h | |||
@@ -97,9 +97,15 @@ | |||
97 | * stack during a system call. Note that sizeof(struct pt_regs) | 97 | * stack during a system call. Note that sizeof(struct pt_regs) |
98 | * has to be a multiple of 8. | 98 | * has to be a multiple of 8. |
99 | */ | 99 | */ |
100 | #ifndef __KERNEL__ | ||
100 | struct pt_regs { | 101 | struct pt_regs { |
101 | long uregs[18]; | 102 | long uregs[18]; |
102 | }; | 103 | }; |
104 | #else /* __KERNEL__ */ | ||
105 | struct pt_regs { | ||
106 | unsigned long uregs[18]; | ||
107 | }; | ||
108 | #endif /* __KERNEL__ */ | ||
103 | 109 | ||
104 | #define ARM_cpsr uregs[16] | 110 | #define ARM_cpsr uregs[16] |
105 | #define ARM_pc uregs[15] | 111 | #define ARM_pc uregs[15] |
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h index 4e506d09e5f9..cf9cdaa2d4d4 100644 --- a/arch/arm/include/asm/unistd.h +++ b/arch/arm/include/asm/unistd.h | |||
@@ -391,6 +391,7 @@ | |||
391 | #define __NR_pwritev (__NR_SYSCALL_BASE+362) | 391 | #define __NR_pwritev (__NR_SYSCALL_BASE+362) |
392 | #define __NR_rt_tgsigqueueinfo (__NR_SYSCALL_BASE+363) | 392 | #define __NR_rt_tgsigqueueinfo (__NR_SYSCALL_BASE+363) |
393 | #define __NR_perf_event_open (__NR_SYSCALL_BASE+364) | 393 | #define __NR_perf_event_open (__NR_SYSCALL_BASE+364) |
394 | #define __NR_recvmmsg (__NR_SYSCALL_BASE+365) | ||
394 | 395 | ||
395 | /* | 396 | /* |
396 | * The following SWIs are ARM private. | 397 | * The following SWIs are ARM private. |