1 files changed, 28 insertions, 1 deletions

diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index e085e2c545eb..bd863d8608cd 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -46,6 +46,9 @@
 #define TLB_V7_UIS_FULL (1 << 20)
 #define TLB_V7_UIS_ASID (1 << 21)
 
+/* Inner Shareable BTB operation (ARMv7 MP extensions) */
+#define TLB_V7_IS_BTB   (1 << 22)
+
 #define TLB_L2CLEAN_FR  (1 << 29)               /* Feroceon */
 #define TLB_DCLEAN      (1 << 30)
 #define TLB_WB          (1 << 31)
@@ -183,7 +186,7 @@
 #endif
 
 #ifdef CONFIG_SMP
-#define v7wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BTB | \
+#define v7wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_V7_IS_BTB | \
                          TLB_V7_UIS_FULL | TLB_V7_UIS_PAGE | TLB_V7_UIS_ASID)
 #else
 #define v7wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BTB | \
@@ -339,6 +342,12 @@ static inline void local_flush_tlb_all(void)
                 dsb();
                 isb();
         }
+        if (tlb_flag(TLB_V7_IS_BTB)) {
+                /* flush the branch target cache */
+                asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero) : "cc");
+                dsb();
+                isb();
+        }
 }
 
 static inline void local_flush_tlb_mm(struct mm_struct *mm)
@@ -376,6 +385,12 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
                 asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
                 dsb();
         }
+        if (tlb_flag(TLB_V7_IS_BTB)) {
+                /* flush the branch target cache */
+                asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero) : "cc");
+                dsb();
+                isb();
+        }
 }
 
 static inline void
@@ -416,6 +431,12 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
                 asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
                 dsb();
         }
+        if (tlb_flag(TLB_V7_IS_BTB)) {
+                /* flush the branch target cache */
+                asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero) : "cc");
+                dsb();
+                isb();
+        }
 }
 
 static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
@@ -454,6 +475,12 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
                 dsb();
                 isb();
         }
+        if (tlb_flag(TLB_V7_IS_BTB)) {
+                /* flush the branch target cache */
+                asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero) : "cc");
+                dsb();
+                isb();
+        }
 }
 
 /*