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-rw-r--r--arch/arm/include/asm/io.h71
1 files changed, 33 insertions, 38 deletions
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index bae7eb6011d2..df0ac0bb39aa 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -82,6 +82,11 @@ extern void __iomem *__arm_ioremap_pfn(unsigned long, unsigned long, size_t, uns
82extern void __iomem *__arm_ioremap(unsigned long, size_t, unsigned int); 82extern void __iomem *__arm_ioremap(unsigned long, size_t, unsigned int);
83extern void __iomem *__arm_ioremap_exec(unsigned long, size_t, bool cached); 83extern void __iomem *__arm_ioremap_exec(unsigned long, size_t, bool cached);
84extern void __iounmap(volatile void __iomem *addr); 84extern void __iounmap(volatile void __iomem *addr);
85extern void __arm_iounmap(volatile void __iomem *addr);
86
87extern void __iomem * (*arch_ioremap_caller)(unsigned long, size_t,
88 unsigned int, void *);
89extern void (*arch_iounmap)(volatile void __iomem *);
85 90
86/* 91/*
87 * Bad read/write accesses... 92 * Bad read/write accesses...
@@ -96,6 +101,8 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
96 return (void __iomem *)addr; 101 return (void __iomem *)addr;
97} 102}
98 103
104#define IOMEM(x) ((void __force __iomem *)(x))
105
99/* IO barriers */ 106/* IO barriers */
100#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE 107#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
101#include <asm/barrier.h> 108#include <asm/barrier.h>
@@ -109,7 +116,11 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
109/* 116/*
110 * Now, pick up the machine-defined IO definitions 117 * Now, pick up the machine-defined IO definitions
111 */ 118 */
119#ifdef CONFIG_NEED_MACH_IO_H
112#include <mach/io.h> 120#include <mach/io.h>
121#else
122#define __io(a) ({ (void)(a); __typesafe_io(0); })
123#endif
113 124
114/* 125/*
115 * This is the limit of PC card/PCI/ISA IO space, which is by default 126 * This is the limit of PC card/PCI/ISA IO space, which is by default
@@ -211,18 +222,18 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
211 * Again, this are defined to perform little endian accesses. See the 222 * Again, this are defined to perform little endian accesses. See the
212 * IO port primitives for more information. 223 * IO port primitives for more information.
213 */ 224 */
214#ifdef __mem_pci 225#ifndef readl
215#define readb_relaxed(c) ({ u8 __r = __raw_readb(__mem_pci(c)); __r; }) 226#define readb_relaxed(c) ({ u8 __r = __raw_readb(c); __r; })
216#define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \ 227#define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \
217 __raw_readw(__mem_pci(c))); __r; }) 228 __raw_readw(c)); __r; })
218#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \ 229#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
219 __raw_readl(__mem_pci(c))); __r; }) 230 __raw_readl(c)); __r; })
220 231
221#define writeb_relaxed(v,c) ((void)__raw_writeb(v,__mem_pci(c))) 232#define writeb_relaxed(v,c) ((void)__raw_writeb(v,c))
222#define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \ 233#define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \
223 cpu_to_le16(v),__mem_pci(c))) 234 cpu_to_le16(v),c))
224#define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \ 235#define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \
225 cpu_to_le32(v),__mem_pci(c))) 236 cpu_to_le32(v),c))
226 237
227#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) 238#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
228#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) 239#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
@@ -232,30 +243,19 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
232#define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); }) 243#define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); })
233#define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); }) 244#define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); })
234 245
235#define readsb(p,d,l) __raw_readsb(__mem_pci(p),d,l) 246#define readsb(p,d,l) __raw_readsb(p,d,l)
236#define readsw(p,d,l) __raw_readsw(__mem_pci(p),d,l) 247#define readsw(p,d,l) __raw_readsw(p,d,l)
237#define readsl(p,d,l) __raw_readsl(__mem_pci(p),d,l) 248#define readsl(p,d,l) __raw_readsl(p,d,l)
238
239#define writesb(p,d,l) __raw_writesb(__mem_pci(p),d,l)
240#define writesw(p,d,l) __raw_writesw(__mem_pci(p),d,l)
241#define writesl(p,d,l) __raw_writesl(__mem_pci(p),d,l)
242 249
243#define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l)) 250#define writesb(p,d,l) __raw_writesb(p,d,l)
244#define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l)) 251#define writesw(p,d,l) __raw_writesw(p,d,l)
245#define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l)) 252#define writesl(p,d,l) __raw_writesl(p,d,l)
246 253
247#elif !defined(readb) 254#define memset_io(c,v,l) _memset_io(c,(v),(l))
255#define memcpy_fromio(a,c,l) _memcpy_fromio((a),c,(l))
256#define memcpy_toio(c,a,l) _memcpy_toio(c,(a),(l))
248 257
249#define readb(c) (__readwrite_bug("readb"),0) 258#endif /* readl */
250#define readw(c) (__readwrite_bug("readw"),0)
251#define readl(c) (__readwrite_bug("readl"),0)
252#define writeb(v,c) __readwrite_bug("writeb")
253#define writew(v,c) __readwrite_bug("writew")
254#define writel(v,c) __readwrite_bug("writel")
255
256#define check_signature(io,sig,len) (0)
257
258#endif /* __mem_pci */
259 259
260/* 260/*
261 * ioremap and friends. 261 * ioremap and friends.
@@ -264,16 +264,11 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
264 * Documentation/io-mapping.txt. 264 * Documentation/io-mapping.txt.
265 * 265 *
266 */ 266 */
267#ifndef __arch_ioremap 267#define ioremap(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE)
268#define __arch_ioremap __arm_ioremap 268#define ioremap_nocache(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE)
269#define __arch_iounmap __iounmap 269#define ioremap_cached(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE_CACHED)
270#endif 270#define ioremap_wc(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE_WC)
271 271#define iounmap __arm_iounmap
272#define ioremap(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE)
273#define ioremap_nocache(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE)
274#define ioremap_cached(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_CACHED)
275#define ioremap_wc(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_WC)
276#define iounmap __arch_iounmap
277 272
278/* 273/*
279 * io{read,write}{8,16,32} macros 274 * io{read,write}{8,16,32} macros