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-rw-r--r--arch/arm/include/asm/cacheflush.h133
1 files changed, 2 insertions, 131 deletions
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index 3acd8fa25e34..18a56640d97d 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -12,7 +12,7 @@
12 12
13#include <linux/mm.h> 13#include <linux/mm.h>
14 14
15#include <asm/glue.h> 15#include <asm/glue-cache.h>
16#include <asm/shmparam.h> 16#include <asm/shmparam.h>
17#include <asm/cachetype.h> 17#include <asm/cachetype.h>
18#include <asm/outercache.h> 18#include <asm/outercache.h>
@@ -20,123 +20,6 @@
20#define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT) 20#define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
21 21
22/* 22/*
23 * Cache Model
24 * ===========
25 */
26#undef _CACHE
27#undef MULTI_CACHE
28
29#if defined(CONFIG_CPU_CACHE_V3)
30# ifdef _CACHE
31# define MULTI_CACHE 1
32# else
33# define _CACHE v3
34# endif
35#endif
36
37#if defined(CONFIG_CPU_CACHE_V4)
38# ifdef _CACHE
39# define MULTI_CACHE 1
40# else
41# define _CACHE v4
42# endif
43#endif
44
45#if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \
46 defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) || \
47 defined(CONFIG_CPU_ARM1026)
48# define MULTI_CACHE 1
49#endif
50
51#if defined(CONFIG_CPU_FA526)
52# ifdef _CACHE
53# define MULTI_CACHE 1
54# else
55# define _CACHE fa
56# endif
57#endif
58
59#if defined(CONFIG_CPU_ARM926T)
60# ifdef _CACHE
61# define MULTI_CACHE 1
62# else
63# define _CACHE arm926
64# endif
65#endif
66
67#if defined(CONFIG_CPU_ARM940T)
68# ifdef _CACHE
69# define MULTI_CACHE 1
70# else
71# define _CACHE arm940
72# endif
73#endif
74
75#if defined(CONFIG_CPU_ARM946E)
76# ifdef _CACHE
77# define MULTI_CACHE 1
78# else
79# define _CACHE arm946
80# endif
81#endif
82
83#if defined(CONFIG_CPU_CACHE_V4WB)
84# ifdef _CACHE
85# define MULTI_CACHE 1
86# else
87# define _CACHE v4wb
88# endif
89#endif
90
91#if defined(CONFIG_CPU_XSCALE)
92# ifdef _CACHE
93# define MULTI_CACHE 1
94# else
95# define _CACHE xscale
96# endif
97#endif
98
99#if defined(CONFIG_CPU_XSC3)
100# ifdef _CACHE
101# define MULTI_CACHE 1
102# else
103# define _CACHE xsc3
104# endif
105#endif
106
107#if defined(CONFIG_CPU_MOHAWK)
108# ifdef _CACHE
109# define MULTI_CACHE 1
110# else
111# define _CACHE mohawk
112# endif
113#endif
114
115#if defined(CONFIG_CPU_FEROCEON)
116# define MULTI_CACHE 1
117#endif
118
119#if defined(CONFIG_CPU_V6)
120//# ifdef _CACHE
121# define MULTI_CACHE 1
122//# else
123//# define _CACHE v6
124//# endif
125#endif
126
127#if defined(CONFIG_CPU_V7)
128//# ifdef _CACHE
129# define MULTI_CACHE 1
130//# else
131//# define _CACHE v7
132//# endif
133#endif
134
135#if !defined(_CACHE) && !defined(MULTI_CACHE)
136#error Unknown cache maintainence model
137#endif
138
139/*
140 * This flag is used to indicate that the page pointed to by a pte is clean 23 * This flag is used to indicate that the page pointed to by a pte is clean
141 * and does not require cleaning before returning it to the user. 24 * and does not require cleaning before returning it to the user.
142 */ 25 */
@@ -249,19 +132,11 @@ extern struct cpu_cache_fns cpu_cache;
249 * visible to the CPU. 132 * visible to the CPU.
250 */ 133 */
251#define dmac_map_area cpu_cache.dma_map_area 134#define dmac_map_area cpu_cache.dma_map_area
252#define dmac_unmap_area cpu_cache.dma_unmap_area 135#define dmac_unmap_area cpu_cache.dma_unmap_area
253#define dmac_flush_range cpu_cache.dma_flush_range 136#define dmac_flush_range cpu_cache.dma_flush_range
254 137
255#else 138#else
256 139
257#define __cpuc_flush_icache_all __glue(_CACHE,_flush_icache_all)
258#define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all)
259#define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all)
260#define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range)
261#define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range)
262#define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range)
263#define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area)
264
265extern void __cpuc_flush_icache_all(void); 140extern void __cpuc_flush_icache_all(void);
266extern void __cpuc_flush_kern_all(void); 141extern void __cpuc_flush_kern_all(void);
267extern void __cpuc_flush_user_all(void); 142extern void __cpuc_flush_user_all(void);
@@ -276,10 +151,6 @@ extern void __cpuc_flush_dcache_area(void *, size_t);
276 * is visible to DMA, or data written by DMA to system memory is 151 * is visible to DMA, or data written by DMA to system memory is
277 * visible to the CPU. 152 * visible to the CPU.
278 */ 153 */
279#define dmac_map_area __glue(_CACHE,_dma_map_area)
280#define dmac_unmap_area __glue(_CACHE,_dma_unmap_area)
281#define dmac_flush_range __glue(_CACHE,_dma_flush_range)
282
283extern void dmac_map_area(const void *, size_t, int); 154extern void dmac_map_area(const void *, size_t, int);
284extern void dmac_unmap_area(const void *, size_t, int); 155extern void dmac_unmap_area(const void *, size_t, int);
285extern void dmac_flush_range(const void *, const void *); 156extern void dmac_flush_range(const void *, const void *);