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Diffstat (limited to 'arch/arm/include/asm/barrier.h')
-rw-r--r--arch/arm/include/asm/barrier.h69
1 files changed, 69 insertions, 0 deletions
diff --git a/arch/arm/include/asm/barrier.h b/arch/arm/include/asm/barrier.h
new file mode 100644
index 000000000000..44f4a09ff37b
--- /dev/null
+++ b/arch/arm/include/asm/barrier.h
@@ -0,0 +1,69 @@
1#ifndef __ASM_BARRIER_H
2#define __ASM_BARRIER_H
3
4#ifndef __ASSEMBLY__
5
6#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
7
8#if __LINUX_ARM_ARCH__ >= 7 || \
9 (__LINUX_ARM_ARCH__ == 6 && defined(CONFIG_CPU_32v6K))
10#define sev() __asm__ __volatile__ ("sev" : : : "memory")
11#define wfe() __asm__ __volatile__ ("wfe" : : : "memory")
12#define wfi() __asm__ __volatile__ ("wfi" : : : "memory")
13#endif
14
15#if __LINUX_ARM_ARCH__ >= 7
16#define isb() __asm__ __volatile__ ("isb" : : : "memory")
17#define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
18#define dmb() __asm__ __volatile__ ("dmb" : : : "memory")
19#elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6
20#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
21 : : "r" (0) : "memory")
22#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
23 : : "r" (0) : "memory")
24#define dmb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \
25 : : "r" (0) : "memory")
26#elif defined(CONFIG_CPU_FA526)
27#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
28 : : "r" (0) : "memory")
29#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
30 : : "r" (0) : "memory")
31#define dmb() __asm__ __volatile__ ("" : : : "memory")
32#else
33#define isb() __asm__ __volatile__ ("" : : : "memory")
34#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
35 : : "r" (0) : "memory")
36#define dmb() __asm__ __volatile__ ("" : : : "memory")
37#endif
38
39#ifdef CONFIG_ARCH_HAS_BARRIERS
40#include <mach/barriers.h>
41#elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)
42#include <asm/outercache.h>
43#define mb() do { dsb(); outer_sync(); } while (0)
44#define rmb() dsb()
45#define wmb() mb()
46#else
47#include <asm/memory.h>
48#define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
49#define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
50#define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
51#endif
52
53#ifndef CONFIG_SMP
54#define smp_mb() barrier()
55#define smp_rmb() barrier()
56#define smp_wmb() barrier()
57#else
58#define smp_mb() dmb()
59#define smp_rmb() dmb()
60#define smp_wmb() dmb()
61#endif
62
63#define read_barrier_depends() do { } while(0)
64#define smp_read_barrier_depends() do { } while(0)
65
66#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
67
68#endif /* !__ASSEMBLY__ */
69#endif /* __ASM_BARRIER_H */