diff options
Diffstat (limited to 'arch/arm/include/asm/assembler.h')
-rw-r--r-- | arch/arm/include/asm/assembler.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index 5c8b3bf4d825..683a1e6b6020 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h | |||
@@ -22,6 +22,7 @@ | |||
22 | 22 | ||
23 | #include <asm/ptrace.h> | 23 | #include <asm/ptrace.h> |
24 | #include <asm/domain.h> | 24 | #include <asm/domain.h> |
25 | #include <asm/opcodes-virt.h> | ||
25 | 26 | ||
26 | #define IOMEM(x) (x) | 27 | #define IOMEM(x) (x) |
27 | 28 | ||
@@ -240,6 +241,33 @@ | |||
240 | #endif | 241 | #endif |
241 | 242 | ||
242 | /* | 243 | /* |
244 | * Helper macro to enter SVC mode cleanly and mask interrupts. reg is | ||
245 | * a scratch register for the macro to overwrite. | ||
246 | * | ||
247 | * This macro is intended for forcing the CPU into SVC mode at boot time. | ||
248 | * you cannot return to the original mode. | ||
249 | * | ||
250 | * Beware, it also clobers LR. | ||
251 | */ | ||
252 | .macro safe_svcmode_maskall reg:req | ||
253 | mrs \reg , cpsr | ||
254 | mov lr , \reg | ||
255 | and lr , lr , #MODE_MASK | ||
256 | cmp lr , #HYP_MODE | ||
257 | orr \reg , \reg , #PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | ||
258 | bic \reg , \reg , #MODE_MASK | ||
259 | orr \reg , \reg , #SVC_MODE | ||
260 | THUMB( orr \reg , \reg , #PSR_T_BIT ) | ||
261 | msr spsr_cxsf, \reg | ||
262 | adr lr, BSYM(2f) | ||
263 | bne 1f | ||
264 | __MSR_ELR_HYP(14) | ||
265 | __ERET | ||
266 | 1: movs pc, lr | ||
267 | 2: | ||
268 | .endm | ||
269 | |||
270 | /* | ||
243 | * STRT/LDRT access macros with ARM and Thumb-2 variants | 271 | * STRT/LDRT access macros with ARM and Thumb-2 variants |
244 | */ | 272 | */ |
245 | #ifdef CONFIG_THUMB2_KERNEL | 273 | #ifdef CONFIG_THUMB2_KERNEL |