diff options
Diffstat (limited to 'arch/arm/include/asm/assembler.h')
-rw-r--r-- | arch/arm/include/asm/assembler.h | 133 |
1 files changed, 128 insertions, 5 deletions
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index 15f8a092b700..00f46d9ce299 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h | |||
@@ -74,23 +74,56 @@ | |||
74 | * Enable and disable interrupts | 74 | * Enable and disable interrupts |
75 | */ | 75 | */ |
76 | #if __LINUX_ARM_ARCH__ >= 6 | 76 | #if __LINUX_ARM_ARCH__ >= 6 |
77 | .macro disable_irq | 77 | .macro disable_irq_notrace |
78 | cpsid i | 78 | cpsid i |
79 | .endm | 79 | .endm |
80 | 80 | ||
81 | .macro enable_irq | 81 | .macro enable_irq_notrace |
82 | cpsie i | 82 | cpsie i |
83 | .endm | 83 | .endm |
84 | #else | 84 | #else |
85 | .macro disable_irq | 85 | .macro disable_irq_notrace |
86 | msr cpsr_c, #PSR_I_BIT | SVC_MODE | 86 | msr cpsr_c, #PSR_I_BIT | SVC_MODE |
87 | .endm | 87 | .endm |
88 | 88 | ||
89 | .macro enable_irq | 89 | .macro enable_irq_notrace |
90 | msr cpsr_c, #SVC_MODE | 90 | msr cpsr_c, #SVC_MODE |
91 | .endm | 91 | .endm |
92 | #endif | 92 | #endif |
93 | 93 | ||
94 | .macro asm_trace_hardirqs_off | ||
95 | #if defined(CONFIG_TRACE_IRQFLAGS) | ||
96 | stmdb sp!, {r0-r3, ip, lr} | ||
97 | bl trace_hardirqs_off | ||
98 | ldmia sp!, {r0-r3, ip, lr} | ||
99 | #endif | ||
100 | .endm | ||
101 | |||
102 | .macro asm_trace_hardirqs_on_cond, cond | ||
103 | #if defined(CONFIG_TRACE_IRQFLAGS) | ||
104 | /* | ||
105 | * actually the registers should be pushed and pop'd conditionally, but | ||
106 | * after bl the flags are certainly clobbered | ||
107 | */ | ||
108 | stmdb sp!, {r0-r3, ip, lr} | ||
109 | bl\cond trace_hardirqs_on | ||
110 | ldmia sp!, {r0-r3, ip, lr} | ||
111 | #endif | ||
112 | .endm | ||
113 | |||
114 | .macro asm_trace_hardirqs_on | ||
115 | asm_trace_hardirqs_on_cond al | ||
116 | .endm | ||
117 | |||
118 | .macro disable_irq | ||
119 | disable_irq_notrace | ||
120 | asm_trace_hardirqs_off | ||
121 | .endm | ||
122 | |||
123 | .macro enable_irq | ||
124 | asm_trace_hardirqs_on | ||
125 | enable_irq_notrace | ||
126 | .endm | ||
94 | /* | 127 | /* |
95 | * Save the current IRQ state and disable IRQs. Note that this macro | 128 | * Save the current IRQ state and disable IRQs. Note that this macro |
96 | * assumes FIQs are enabled, and that the processor is in SVC mode. | 129 | * assumes FIQs are enabled, and that the processor is in SVC mode. |
@@ -104,10 +137,16 @@ | |||
104 | * Restore interrupt state previously stored in a register. We don't | 137 | * Restore interrupt state previously stored in a register. We don't |
105 | * guarantee that this will preserve the flags. | 138 | * guarantee that this will preserve the flags. |
106 | */ | 139 | */ |
107 | .macro restore_irqs, oldcpsr | 140 | .macro restore_irqs_notrace, oldcpsr |
108 | msr cpsr_c, \oldcpsr | 141 | msr cpsr_c, \oldcpsr |
109 | .endm | 142 | .endm |
110 | 143 | ||
144 | .macro restore_irqs, oldcpsr | ||
145 | tst \oldcpsr, #PSR_I_BIT | ||
146 | asm_trace_hardirqs_on_cond eq | ||
147 | restore_irqs_notrace \oldcpsr | ||
148 | .endm | ||
149 | |||
111 | #define USER(x...) \ | 150 | #define USER(x...) \ |
112 | 9999: x; \ | 151 | 9999: x; \ |
113 | .section __ex_table,"a"; \ | 152 | .section __ex_table,"a"; \ |
@@ -127,3 +166,87 @@ | |||
127 | #endif | 166 | #endif |
128 | #endif | 167 | #endif |
129 | .endm | 168 | .endm |
169 | |||
170 | #ifdef CONFIG_THUMB2_KERNEL | ||
171 | .macro setmode, mode, reg | ||
172 | mov \reg, #\mode | ||
173 | msr cpsr_c, \reg | ||
174 | .endm | ||
175 | #else | ||
176 | .macro setmode, mode, reg | ||
177 | msr cpsr_c, #\mode | ||
178 | .endm | ||
179 | #endif | ||
180 | |||
181 | /* | ||
182 | * STRT/LDRT access macros with ARM and Thumb-2 variants | ||
183 | */ | ||
184 | #ifdef CONFIG_THUMB2_KERNEL | ||
185 | |||
186 | .macro usraccoff, instr, reg, ptr, inc, off, cond, abort | ||
187 | 9999: | ||
188 | .if \inc == 1 | ||
189 | \instr\cond\()bt \reg, [\ptr, #\off] | ||
190 | .elseif \inc == 4 | ||
191 | \instr\cond\()t \reg, [\ptr, #\off] | ||
192 | .else | ||
193 | .error "Unsupported inc macro argument" | ||
194 | .endif | ||
195 | |||
196 | .section __ex_table,"a" | ||
197 | .align 3 | ||
198 | .long 9999b, \abort | ||
199 | .previous | ||
200 | .endm | ||
201 | |||
202 | .macro usracc, instr, reg, ptr, inc, cond, rept, abort | ||
203 | @ explicit IT instruction needed because of the label | ||
204 | @ introduced by the USER macro | ||
205 | .ifnc \cond,al | ||
206 | .if \rept == 1 | ||
207 | itt \cond | ||
208 | .elseif \rept == 2 | ||
209 | ittt \cond | ||
210 | .else | ||
211 | .error "Unsupported rept macro argument" | ||
212 | .endif | ||
213 | .endif | ||
214 | |||
215 | @ Slightly optimised to avoid incrementing the pointer twice | ||
216 | usraccoff \instr, \reg, \ptr, \inc, 0, \cond, \abort | ||
217 | .if \rept == 2 | ||
218 | usraccoff \instr, \reg, \ptr, \inc, 4, \cond, \abort | ||
219 | .endif | ||
220 | |||
221 | add\cond \ptr, #\rept * \inc | ||
222 | .endm | ||
223 | |||
224 | #else /* !CONFIG_THUMB2_KERNEL */ | ||
225 | |||
226 | .macro usracc, instr, reg, ptr, inc, cond, rept, abort | ||
227 | .rept \rept | ||
228 | 9999: | ||
229 | .if \inc == 1 | ||
230 | \instr\cond\()bt \reg, [\ptr], #\inc | ||
231 | .elseif \inc == 4 | ||
232 | \instr\cond\()t \reg, [\ptr], #\inc | ||
233 | .else | ||
234 | .error "Unsupported inc macro argument" | ||
235 | .endif | ||
236 | |||
237 | .section __ex_table,"a" | ||
238 | .align 3 | ||
239 | .long 9999b, \abort | ||
240 | .previous | ||
241 | .endr | ||
242 | .endm | ||
243 | |||
244 | #endif /* CONFIG_THUMB2_KERNEL */ | ||
245 | |||
246 | .macro strusr, reg, ptr, inc, cond=al, rept=1, abort=9001f | ||
247 | usracc str, \reg, \ptr, \inc, \cond, \rept, \abort | ||
248 | .endm | ||
249 | |||
250 | .macro ldrusr, reg, ptr, inc, cond=al, rept=1, abort=9001f | ||
251 | usracc ldr, \reg, \ptr, \inc, \cond, \rept, \abort | ||
252 | .endm | ||