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-rw-r--r--arch/arm/common/dmabounce.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c
index b4748e3171c6..2362c498f52e 100644
--- a/arch/arm/common/dmabounce.c
+++ b/arch/arm/common/dmabounce.c
@@ -321,12 +321,12 @@ unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
321 DO_STATS ( device_info->bounce_count++ ); 321 DO_STATS ( device_info->bounce_count++ );
322 322
323 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) { 323 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) {
324 unsigned long ptr; 324 void *ptr = buf->ptr;
325 325
326 dev_dbg(dev, 326 dev_dbg(dev,
327 "%s: copy back safe %p to unsafe %p size %d\n", 327 "%s: copy back safe %p to unsafe %p size %d\n",
328 __func__, buf->safe, buf->ptr, size); 328 __func__, buf->safe, ptr, size);
329 memcpy(buf->ptr, buf->safe, size); 329 memcpy(ptr, buf->safe, size);
330 330
331 /* 331 /*
332 * DMA buffers must have the same cache properties 332 * DMA buffers must have the same cache properties
@@ -336,7 +336,6 @@ unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
336 * bidirectional case because we know the cache 336 * bidirectional case because we know the cache
337 * lines will be coherent with the data written. 337 * lines will be coherent with the data written.
338 */ 338 */
339 ptr = (unsigned long)buf->ptr;
340 dmac_clean_range(ptr, ptr + size); 339 dmac_clean_range(ptr, ptr + size);
341 outer_clean_range(__pa(ptr), __pa(ptr) + size); 340 outer_clean_range(__pa(ptr), __pa(ptr) + size);
342 } 341 }