aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/compressed/.gitignore1
-rw-r--r--arch/arm/boot/dts/bcm11351.dtsi2
-rw-r--r--arch/arm/boot/dts/imx51-apf51dev.dts11
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts26
-rw-r--r--arch/arm/boot/dts/imx51.dtsi22
-rw-r--r--arch/arm/boot/dts/imx53-m53evk.dts13
-rw-r--r--arch/arm/boot/dts/imx53-mba53.dts13
-rw-r--r--arch/arm/boot/dts/imx53-qsb.dts13
-rw-r--r--arch/arm/boot/dts/imx53.dtsi64
-rw-r--r--arch/arm/boot/dts/imx6dl.dtsi17
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi123
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi137
-rw-r--r--arch/arm/boot/dts/keystone-clocks.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-gta04.dts2
-rw-r--r--arch/arm/boot/dts/omap3-igep0020.dts2
-rw-r--r--arch/arm/boot/dts/omap3-igep0030.dts2
-rw-r--r--arch/arm/boot/dts/r8a7791.dtsi2
-rw-r--r--arch/arm/boot/dts/sama5d36.dtsi2
-rw-r--r--arch/arm/boot/dts/sun4i-a10.dtsi8
-rw-r--r--arch/arm/boot/dts/sun5i-a10s.dtsi8
-rw-r--r--arch/arm/boot/dts/sun5i-a13.dtsi8
-rw-r--r--arch/arm/boot/dts/sun6i-a31.dtsi10
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi22
-rw-r--r--arch/arm/boot/dts/zynq-7000.dtsi6
24 files changed, 460 insertions, 56 deletions
diff --git a/arch/arm/boot/compressed/.gitignore b/arch/arm/boot/compressed/.gitignore
index 47279aa96a6a..0714e0334e33 100644
--- a/arch/arm/boot/compressed/.gitignore
+++ b/arch/arm/boot/compressed/.gitignore
@@ -1,4 +1,5 @@
1ashldi3.S 1ashldi3.S
2bswapsdi2.S
2font.c 3font.c
3lib1funcs.S 4lib1funcs.S
4hyp-stub.S 5hyp-stub.S
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
index e491b82f8d67..792fde1b7f75 100644
--- a/arch/arm/boot/dts/bcm11351.dtsi
+++ b/arch/arm/boot/dts/bcm11351.dtsi
@@ -147,7 +147,7 @@
147 }; 147 };
148 148
149 pinctrl@35004800 { 149 pinctrl@35004800 {
150 compatible = "brcm,capri-pinctrl"; 150 compatible = "brcm,bcm11351-pinctrl";
151 reg = <0x35004800 0x430>; 151 reg = <0x35004800 0x430>;
152 }; 152 };
153 153
diff --git a/arch/arm/boot/dts/imx51-apf51dev.dts b/arch/arm/boot/dts/imx51-apf51dev.dts
index 5a7f552786a1..d3f98141462c 100644
--- a/arch/arm/boot/dts/imx51-apf51dev.dts
+++ b/arch/arm/boot/dts/imx51-apf51dev.dts
@@ -18,7 +18,6 @@
18 18
19 display@di1 { 19 display@di1 {
20 compatible = "fsl,imx-parallel-display"; 20 compatible = "fsl,imx-parallel-display";
21 crtcs = <&ipu 0>;
22 interface-pix-fmt = "bgr666"; 21 interface-pix-fmt = "bgr666";
23 pinctrl-names = "default"; 22 pinctrl-names = "default";
24 pinctrl-0 = <&pinctrl_ipu_disp1_1>; 23 pinctrl-0 = <&pinctrl_ipu_disp1_1>;
@@ -41,6 +40,12 @@
41 pixelclk-active = <0>; 40 pixelclk-active = <0>;
42 }; 41 };
43 }; 42 };
43
44 port {
45 display_in: endpoint {
46 remote-endpoint = <&ipu_di0_disp0>;
47 };
48 };
44 }; 49 };
45 50
46 gpio-keys { 51 gpio-keys {
@@ -122,3 +127,7 @@
122 }; 127 };
123 }; 128 };
124}; 129};
130
131&ipu_di0_disp0 {
132 remote-endpoint = <&display_in>;
133};
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index be1407cf5abd..671927145632 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -21,9 +21,8 @@
21 reg = <0x90000000 0x20000000>; 21 reg = <0x90000000 0x20000000>;
22 }; 22 };
23 23
24 display@di0 { 24 display0: display@di0 {
25 compatible = "fsl,imx-parallel-display"; 25 compatible = "fsl,imx-parallel-display";
26 crtcs = <&ipu 0>;
27 interface-pix-fmt = "rgb24"; 26 interface-pix-fmt = "rgb24";
28 pinctrl-names = "default"; 27 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_ipu_disp1_1>; 28 pinctrl-0 = <&pinctrl_ipu_disp1_1>;
@@ -41,11 +40,16 @@
41 vsync-len = <10>; 40 vsync-len = <10>;
42 }; 41 };
43 }; 42 };
43
44 port {
45 display0_in: endpoint {
46 remote-endpoint = <&ipu_di0_disp0>;
47 };
48 };
44 }; 49 };
45 50
46 display@di1 { 51 display1: display@di1 {
47 compatible = "fsl,imx-parallel-display"; 52 compatible = "fsl,imx-parallel-display";
48 crtcs = <&ipu 1>;
49 interface-pix-fmt = "rgb565"; 53 interface-pix-fmt = "rgb565";
50 pinctrl-names = "default"; 54 pinctrl-names = "default";
51 pinctrl-0 = <&pinctrl_ipu_disp2_1>; 55 pinctrl-0 = <&pinctrl_ipu_disp2_1>;
@@ -68,6 +72,12 @@
68 pixelclk-active = <0>; 72 pixelclk-active = <0>;
69 }; 73 };
70 }; 74 };
75
76 port {
77 display1_in: endpoint {
78 remote-endpoint = <&ipu_di1_disp1>;
79 };
80 };
71 }; 81 };
72 82
73 gpio-keys { 83 gpio-keys {
@@ -258,6 +268,14 @@
258 }; 268 };
259}; 269};
260 270
271&ipu_di0_disp0 {
272 remote-endpoint = <&display0_in>;
273};
274
275&ipu_di1_disp1 {
276 remote-endpoint = <&display1_in>;
277};
278
261&ssi2 { 279&ssi2 {
262 fsl,mode = "i2s-slave"; 280 fsl,mode = "i2s-slave";
263 status = "okay"; 281 status = "okay";
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 4bcdd3ad15e5..28c96aada80b 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -79,6 +79,11 @@
79 }; 79 };
80 }; 80 };
81 81
82 display-subsystem {
83 compatible = "fsl,imx-display-subsystem";
84 ports = <&ipu_di0>, <&ipu_di1>;
85 };
86
82 soc { 87 soc {
83 #address-cells = <1>; 88 #address-cells = <1>;
84 #size-cells = <1>; 89 #size-cells = <1>;
@@ -92,13 +97,28 @@
92 }; 97 };
93 98
94 ipu: ipu@40000000 { 99 ipu: ipu@40000000 {
95 #crtc-cells = <1>; 100 #address-cells = <1>;
101 #size-cells = <0>;
96 compatible = "fsl,imx51-ipu"; 102 compatible = "fsl,imx51-ipu";
97 reg = <0x40000000 0x20000000>; 103 reg = <0x40000000 0x20000000>;
98 interrupts = <11 10>; 104 interrupts = <11 10>;
99 clocks = <&clks 59>, <&clks 110>, <&clks 61>; 105 clocks = <&clks 59>, <&clks 110>, <&clks 61>;
100 clock-names = "bus", "di0", "di1"; 106 clock-names = "bus", "di0", "di1";
101 resets = <&src 2>; 107 resets = <&src 2>;
108
109 ipu_di0: port@2 {
110 reg = <2>;
111
112 ipu_di0_disp0: endpoint {
113 };
114 };
115
116 ipu_di1: port@3 {
117 reg = <3>;
118
119 ipu_di1_disp1: endpoint {
120 };
121 };
102 }; 122 };
103 123
104 aips@70000000 { /* AIPS1 */ 124 aips@70000000 { /* AIPS1 */
diff --git a/arch/arm/boot/dts/imx53-m53evk.dts b/arch/arm/boot/dts/imx53-m53evk.dts
index 7d304d02ed38..0298adc73bb7 100644
--- a/arch/arm/boot/dts/imx53-m53evk.dts
+++ b/arch/arm/boot/dts/imx53-m53evk.dts
@@ -21,9 +21,8 @@
21 }; 21 };
22 22
23 soc { 23 soc {
24 display@di1 { 24 display1: display@di1 {
25 compatible = "fsl,imx-parallel-display"; 25 compatible = "fsl,imx-parallel-display";
26 crtcs = <&ipu 1>;
27 interface-pix-fmt = "bgr666"; 26 interface-pix-fmt = "bgr666";
28 pinctrl-names = "default"; 27 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_ipu_disp2_1>; 28 pinctrl-0 = <&pinctrl_ipu_disp2_1>;
@@ -44,6 +43,12 @@
44 }; 43 };
45 }; 44 };
46 }; 45 };
46
47 port {
48 display1_in: endpoint {
49 remote-endpoint = <&ipu_di1_disp1>;
50 };
51 };
47 }; 52 };
48 53
49 backlight { 54 backlight {
@@ -221,6 +226,10 @@
221 }; 226 };
222}; 227};
223 228
229&ipu_di1_disp1 {
230 remote-endpoint = <&display1_in>;
231};
232
224&nfc { 233&nfc {
225 pinctrl-names = "default"; 234 pinctrl-names = "default";
226 pinctrl-0 = <&pinctrl_nand_1>; 235 pinctrl-0 = <&pinctrl_nand_1>;
diff --git a/arch/arm/boot/dts/imx53-mba53.dts b/arch/arm/boot/dts/imx53-mba53.dts
index a63090267941..a5b55c603591 100644
--- a/arch/arm/boot/dts/imx53-mba53.dts
+++ b/arch/arm/boot/dts/imx53-mba53.dts
@@ -38,9 +38,14 @@
38 compatible = "fsl,imx-parallel-display"; 38 compatible = "fsl,imx-parallel-display";
39 pinctrl-names = "default"; 39 pinctrl-names = "default";
40 pinctrl-0 = <&pinctrl_disp1_1>; 40 pinctrl-0 = <&pinctrl_disp1_1>;
41 crtcs = <&ipu 1>;
42 interface-pix-fmt = "rgb24"; 41 interface-pix-fmt = "rgb24";
43 status = "disabled"; 42 status = "disabled";
43
44 port {
45 display1_in: endpoint {
46 remote-endpoint = <&ipu_di1_disp1>;
47 };
48 };
44 }; 49 };
45 50
46 reg_3p2v: 3p2v { 51 reg_3p2v: 3p2v {
@@ -141,6 +146,10 @@
141 }; 146 };
142}; 147};
143 148
149&ipu_di1_disp1 {
150 remote-endpoint = <&display1_in>;
151};
152
144&cspi { 153&cspi {
145 status = "okay"; 154 status = "okay";
146}; 155};
@@ -228,7 +237,7 @@
228&tve { 237&tve {
229 pinctrl-names = "default"; 238 pinctrl-names = "default";
230 pinctrl-0 = <&pinctrl_vga_sync_1>; 239 pinctrl-0 = <&pinctrl_vga_sync_1>;
231 ddc = <&i2c3>; 240 i2c-ddc-bus = <&i2c3>;
232 fsl,tve-mode = "vga"; 241 fsl,tve-mode = "vga";
233 fsl,hsync-pin = <4>; 242 fsl,hsync-pin = <4>;
234 fsl,vsync-pin = <6>; 243 fsl,vsync-pin = <6>;
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
index 91a5935a4aac..8b254289344f 100644
--- a/arch/arm/boot/dts/imx53-qsb.dts
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -21,9 +21,8 @@
21 reg = <0x70000000 0x40000000>; 21 reg = <0x70000000 0x40000000>;
22 }; 22 };
23 23
24 display@di0 { 24 display0: display@di0 {
25 compatible = "fsl,imx-parallel-display"; 25 compatible = "fsl,imx-parallel-display";
26 crtcs = <&ipu 0>;
27 interface-pix-fmt = "rgb565"; 26 interface-pix-fmt = "rgb565";
28 pinctrl-names = "default"; 27 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_ipu_disp0_1>; 28 pinctrl-0 = <&pinctrl_ipu_disp0_1>;
@@ -46,6 +45,12 @@
46 pixelclk-active = <0>; 45 pixelclk-active = <0>;
47 }; 46 };
48 }; 47 };
48
49 port {
50 display0_in: endpoint {
51 remote-endpoint = <&ipu_di0_disp0>;
52 };
53 };
49 }; 54 };
50 55
51 gpio-keys { 56 gpio-keys {
@@ -126,6 +131,10 @@
126 status = "okay"; 131 status = "okay";
127}; 132};
128 133
134&ipu_di0_disp0 {
135 remote-endpoint = <&display0_in>;
136};
137
129&ssi2 { 138&ssi2 {
130 fsl,mode = "i2s-slave"; 139 fsl,mode = "i2s-slave";
131 status = "okay"; 140 status = "okay";
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 4307e80b2d2e..04d3127edfe1 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -45,6 +45,11 @@
45 }; 45 };
46 }; 46 };
47 47
48 display-subsystem {
49 compatible = "fsl,imx-display-subsystem";
50 ports = <&ipu_di0>, <&ipu_di1>;
51 };
52
48 tzic: tz-interrupt-controller@0fffc000 { 53 tzic: tz-interrupt-controller@0fffc000 {
49 compatible = "fsl,imx53-tzic", "fsl,tzic"; 54 compatible = "fsl,imx53-tzic", "fsl,tzic";
50 interrupt-controller; 55 interrupt-controller;
@@ -85,13 +90,49 @@
85 ranges; 90 ranges;
86 91
87 ipu: ipu@18000000 { 92 ipu: ipu@18000000 {
88 #crtc-cells = <1>; 93 #address-cells = <1>;
94 #size-cells = <0>;
89 compatible = "fsl,imx53-ipu"; 95 compatible = "fsl,imx53-ipu";
90 reg = <0x18000000 0x080000000>; 96 reg = <0x18000000 0x080000000>;
91 interrupts = <11 10>; 97 interrupts = <11 10>;
92 clocks = <&clks 59>, <&clks 110>, <&clks 61>; 98 clocks = <&clks 59>, <&clks 110>, <&clks 61>;
93 clock-names = "bus", "di0", "di1"; 99 clock-names = "bus", "di0", "di1";
94 resets = <&src 2>; 100 resets = <&src 2>;
101
102 ipu_di0: port@2 {
103 #address-cells = <1>;
104 #size-cells = <0>;
105 reg = <2>;
106
107 ipu_di0_disp0: endpoint@0 {
108 reg = <0>;
109 };
110
111 ipu_di0_lvds0: endpoint@1 {
112 reg = <1>;
113 remote-endpoint = <&lvds0_in>;
114 };
115 };
116
117 ipu_di1: port@3 {
118 #address-cells = <1>;
119 #size-cells = <0>;
120 reg = <3>;
121
122 ipu_di1_disp1: endpoint@0 {
123 reg = <0>;
124 };
125
126 ipu_di1_lvds1: endpoint@1 {
127 reg = <1>;
128 remote-endpoint = <&lvds1_in>;
129 };
130
131 ipu_di1_tve: endpoint@2 {
132 reg = <2>;
133 remote-endpoint = <&tve_in>;
134 };
135 };
95 }; 136 };
96 137
97 aips@50000000 { /* AIPS1 */ 138 aips@50000000 { /* AIPS1 */
@@ -838,14 +879,24 @@
838 879
839 lvds-channel@0 { 880 lvds-channel@0 {
840 reg = <0>; 881 reg = <0>;
841 crtcs = <&ipu 0>;
842 status = "disabled"; 882 status = "disabled";
883
884 port {
885 lvds0_in: endpoint {
886 remote-endpoint = <&ipu_di0_lvds0>;
887 };
888 };
843 }; 889 };
844 890
845 lvds-channel@1 { 891 lvds-channel@1 {
846 reg = <1>; 892 reg = <1>;
847 crtcs = <&ipu 1>;
848 status = "disabled"; 893 status = "disabled";
894
895 port {
896 lvds1_in: endpoint {
897 remote-endpoint = <&ipu_di0_lvds0>;
898 };
899 };
849 }; 900 };
850 }; 901 };
851 902
@@ -1103,8 +1154,13 @@
1103 interrupts = <92>; 1154 interrupts = <92>;
1104 clocks = <&clks 69>, <&clks 116>; 1155 clocks = <&clks 69>, <&clks 116>;
1105 clock-names = "tve", "di_sel"; 1156 clock-names = "tve", "di_sel";
1106 crtcs = <&ipu 1>;
1107 status = "disabled"; 1157 status = "disabled";
1158
1159 port {
1160 tve_in: endpoint {
1161 remote-endpoint = <&ipu_di1_tve>;
1162 };
1163 };
1108 }; 1164 };
1109 1165
1110 vpu: vpu@63ff4000 { 1166 vpu: vpu@63ff4000 {
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 9e8ae118fdd4..25bbdd6f214b 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -70,6 +70,15 @@
70 }; 70 };
71 }; 71 };
72 }; 72 };
73
74 display-subsystem {
75 compatible = "fsl,imx-display-subsystem";
76 ports = <&ipu1_di0>, <&ipu1_di1>;
77 };
78};
79
80&hdmi {
81 compatible = "fsl,imx6dl-hdmi";
73}; 82};
74 83
75&ldb { 84&ldb {
@@ -79,12 +88,4 @@
79 clock-names = "di0_pll", "di1_pll", 88 clock-names = "di0_pll", "di1_pll",
80 "di0_sel", "di1_sel", 89 "di0_sel", "di1_sel",
81 "di0", "di1"; 90 "di0", "di1";
82
83 lvds-channel@0 {
84 crtcs = <&ipu1 0>, <&ipu1 1>;
85 };
86
87 lvds-channel@1 {
88 crtcs = <&ipu1 0>, <&ipu1 1>;
89 };
90}; 91};
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index f024ef28b34b..2a8d9de666c9 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -132,13 +132,84 @@
132 }; 132 };
133 133
134 ipu2: ipu@02800000 { 134 ipu2: ipu@02800000 {
135 #crtc-cells = <1>; 135 #address-cells = <1>;
136 #size-cells = <0>;
136 compatible = "fsl,imx6q-ipu"; 137 compatible = "fsl,imx6q-ipu";
137 reg = <0x02800000 0x400000>; 138 reg = <0x02800000 0x400000>;
138 interrupts = <0 8 0x4 0 7 0x4>; 139 interrupts = <0 8 0x4 0 7 0x4>;
139 clocks = <&clks 133>, <&clks 134>, <&clks 137>; 140 clocks = <&clks 133>, <&clks 134>, <&clks 137>;
140 clock-names = "bus", "di0", "di1"; 141 clock-names = "bus", "di0", "di1";
141 resets = <&src 4>; 142 resets = <&src 4>;
143
144 ipu2_di0: port@2 {
145 #address-cells = <1>;
146 #size-cells = <0>;
147 reg = <2>;
148
149 ipu2_di0_disp0: endpoint@0 {
150 };
151
152 ipu2_di0_hdmi: endpoint@1 {
153 remote-endpoint = <&hdmi_mux_2>;
154 };
155
156 ipu2_di0_mipi: endpoint@2 {
157 };
158
159 ipu2_di0_lvds0: endpoint@3 {
160 remote-endpoint = <&lvds0_mux_2>;
161 };
162
163 ipu2_di0_lvds1: endpoint@4 {
164 remote-endpoint = <&lvds1_mux_2>;
165 };
166 };
167
168 ipu2_di1: port@3 {
169 #address-cells = <1>;
170 #size-cells = <0>;
171 reg = <3>;
172
173 ipu2_di1_hdmi: endpoint@1 {
174 remote-endpoint = <&hdmi_mux_3>;
175 };
176
177 ipu2_di1_mipi: endpoint@2 {
178 };
179
180 ipu2_di1_lvds0: endpoint@3 {
181 remote-endpoint = <&lvds0_mux_3>;
182 };
183
184 ipu2_di1_lvds1: endpoint@4 {
185 remote-endpoint = <&lvds1_mux_3>;
186 };
187 };
188 };
189 };
190
191 display-subsystem {
192 compatible = "fsl,imx-display-subsystem";
193 ports = <&ipu1_di0>, <&ipu1_di1>, <&ipu2_di0>, <&ipu2_di1>;
194 };
195};
196
197&hdmi {
198 compatible = "fsl,imx6q-hdmi";
199
200 port@2 {
201 reg = <2>;
202
203 hdmi_mux_2: endpoint {
204 remote-endpoint = <&ipu2_di0_hdmi>;
205 };
206 };
207
208 port@3 {
209 reg = <3>;
210
211 hdmi_mux_3: endpoint {
212 remote-endpoint = <&ipu2_di1_hdmi>;
142 }; 213 };
143 }; 214 };
144}; 215};
@@ -152,10 +223,56 @@
152 "di0", "di1"; 223 "di0", "di1";
153 224
154 lvds-channel@0 { 225 lvds-channel@0 {
155 crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>; 226 port@2 {
227 reg = <2>;
228
229 lvds0_mux_2: endpoint {
230 remote-endpoint = <&ipu2_di0_lvds0>;
231 };
232 };
233
234 port@3 {
235 reg = <3>;
236
237 lvds0_mux_3: endpoint {
238 remote-endpoint = <&ipu2_di1_lvds0>;
239 };
240 };
156 }; 241 };
157 242
158 lvds-channel@1 { 243 lvds-channel@1 {
159 crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>; 244 port@2 {
245 reg = <2>;
246
247 lvds1_mux_2: endpoint {
248 remote-endpoint = <&ipu2_di0_lvds1>;
249 };
250 };
251
252 port@3 {
253 reg = <3>;
254
255 lvds1_mux_3: endpoint {
256 remote-endpoint = <&ipu2_di1_lvds1>;
257 };
258 };
259 };
260};
261
262&mipi_dsi {
263 port@2 {
264 reg = <2>;
265
266 mipi_mux_2: endpoint {
267 remote-endpoint = <&ipu2_di0_mipi>;
268 };
269 };
270
271 port@3 {
272 reg = <3>;
273
274 mipi_mux_3: endpoint {
275 remote-endpoint = <&ipu2_di1_mipi>;
276 };
160 }; 277 };
161}; 278};
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index fb28b2ecb1db..64a8cbe9480f 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -1358,13 +1358,76 @@
1358 status = "disabled"; 1358 status = "disabled";
1359 1359
1360 lvds-channel@0 { 1360 lvds-channel@0 {
1361 #address-cells = <1>;
1362 #size-cells = <0>;
1361 reg = <0>; 1363 reg = <0>;
1362 status = "disabled"; 1364 status = "disabled";
1365
1366 port@0 {
1367 reg = <0>;
1368
1369 lvds0_mux_0: endpoint {
1370 remote-endpoint = <&ipu1_di0_lvds0>;
1371 };
1372 };
1373
1374 port@1 {
1375 reg = <1>;
1376
1377 lvds0_mux_1: endpoint {
1378 remote-endpoint = <&ipu1_di1_lvds0>;
1379 };
1380 };
1363 }; 1381 };
1364 1382
1365 lvds-channel@1 { 1383 lvds-channel@1 {
1384 #address-cells = <1>;
1385 #size-cells = <0>;
1366 reg = <1>; 1386 reg = <1>;
1367 status = "disabled"; 1387 status = "disabled";
1388
1389 port@0 {
1390 reg = <0>;
1391
1392 lvds1_mux_0: endpoint {
1393 remote-endpoint = <&ipu1_di0_lvds1>;
1394 };
1395 };
1396
1397 port@1 {
1398 reg = <1>;
1399
1400 lvds1_mux_1: endpoint {
1401 remote-endpoint = <&ipu1_di1_lvds1>;
1402 };
1403 };
1404 };
1405 };
1406
1407 hdmi: hdmi@0120000 {
1408 #address-cells = <1>;
1409 #size-cells = <0>;
1410 reg = <0x00120000 0x9000>;
1411 interrupts = <0 115 0x04>;
1412 gpr = <&gpr>;
1413 clocks = <&clks 123>, <&clks 124>;
1414 clock-names = "iahb", "isfr";
1415 status = "disabled";
1416
1417 port@0 {
1418 reg = <0>;
1419
1420 hdmi_mux_0: endpoint {
1421 remote-endpoint = <&ipu1_di0_hdmi>;
1422 };
1423 };
1424
1425 port@1 {
1426 reg = <1>;
1427
1428 hdmi_mux_1: endpoint {
1429 remote-endpoint = <&ipu1_di1_hdmi>;
1430 };
1368 }; 1431 };
1369 }; 1432 };
1370 1433
@@ -1579,8 +1642,27 @@
1579 reg = <0x021dc000 0x4000>; 1642 reg = <0x021dc000 0x4000>;
1580 }; 1643 };
1581 1644
1582 mipi@021e0000 { /* MIPI-DSI */ 1645 mipi_dsi: mipi@021e0000 {
1646 #address-cells = <1>;
1647 #size-cells = <0>;
1583 reg = <0x021e0000 0x4000>; 1648 reg = <0x021e0000 0x4000>;
1649 status = "disabled";
1650
1651 port@0 {
1652 reg = <0>;
1653
1654 mipi_mux_0: endpoint {
1655 remote-endpoint = <&ipu1_di0_mipi>;
1656 };
1657 };
1658
1659 port@1 {
1660 reg = <1>;
1661
1662 mipi_mux_1: endpoint {
1663 remote-endpoint = <&ipu1_di1_mipi>;
1664 };
1665 };
1584 }; 1666 };
1585 1667
1586 vdoa@021e4000 { 1668 vdoa@021e4000 {
@@ -1634,13 +1716,64 @@
1634 }; 1716 };
1635 1717
1636 ipu1: ipu@02400000 { 1718 ipu1: ipu@02400000 {
1637 #crtc-cells = <1>; 1719 #address-cells = <1>;
1720 #size-cells = <0>;
1638 compatible = "fsl,imx6q-ipu"; 1721 compatible = "fsl,imx6q-ipu";
1639 reg = <0x02400000 0x400000>; 1722 reg = <0x02400000 0x400000>;
1640 interrupts = <0 6 0x4 0 5 0x4>; 1723 interrupts = <0 6 0x4 0 5 0x4>;
1641 clocks = <&clks 130>, <&clks 131>, <&clks 132>; 1724 clocks = <&clks 130>, <&clks 131>, <&clks 132>;
1642 clock-names = "bus", "di0", "di1"; 1725 clock-names = "bus", "di0", "di1";
1643 resets = <&src 2>; 1726 resets = <&src 2>;
1727
1728 ipu1_di0: port@2 {
1729 #address-cells = <1>;
1730 #size-cells = <0>;
1731 reg = <2>;
1732
1733 ipu1_di0_disp0: endpoint@0 {
1734 };
1735
1736 ipu1_di0_hdmi: endpoint@1 {
1737 remote-endpoint = <&hdmi_mux_0>;
1738 };
1739
1740 ipu1_di0_mipi: endpoint@2 {
1741 remote-endpoint = <&mipi_mux_0>;
1742 };
1743
1744 ipu1_di0_lvds0: endpoint@3 {
1745 remote-endpoint = <&lvds0_mux_0>;
1746 };
1747
1748 ipu1_di0_lvds1: endpoint@4 {
1749 remote-endpoint = <&lvds1_mux_0>;
1750 };
1751 };
1752
1753 ipu1_di1: port@3 {
1754 #address-cells = <1>;
1755 #size-cells = <0>;
1756 reg = <3>;
1757
1758 ipu1_di0_disp1: endpoint@0 {
1759 };
1760
1761 ipu1_di1_hdmi: endpoint@1 {
1762 remote-endpoint = <&hdmi_mux_1>;
1763 };
1764
1765 ipu1_di1_mipi: endpoint@2 {
1766 remote-endpoint = <&mipi_mux_1>;
1767 };
1768
1769 ipu1_di1_lvds0: endpoint@3 {
1770 remote-endpoint = <&lvds0_mux_1>;
1771 };
1772
1773 ipu1_di1_lvds1: endpoint@4 {
1774 remote-endpoint = <&lvds1_mux_1>;
1775 };
1776 };
1644 }; 1777 };
1645 }; 1778 };
1646}; 1779};
diff --git a/arch/arm/boot/dts/keystone-clocks.dtsi b/arch/arm/boot/dts/keystone-clocks.dtsi
index 2363593e1050..ef58d1c24313 100644
--- a/arch/arm/boot/dts/keystone-clocks.dtsi
+++ b/arch/arm/boot/dts/keystone-clocks.dtsi
@@ -612,7 +612,7 @@ clocks {
612 compatible = "ti,keystone,psc-clock"; 612 compatible = "ti,keystone,psc-clock";
613 clocks = <&chipclk13>; 613 clocks = <&chipclk13>;
614 clock-output-names = "vcp-3"; 614 clock-output-names = "vcp-3";
615 reg = <0x0235000a8 0xb00>, <0x02350060 0x400>; 615 reg = <0x023500a8 0xb00>, <0x02350060 0x400>;
616 reg-names = "control", "domain"; 616 reg-names = "control", "domain";
617 domain-id = <24>; 617 domain-id = <24>;
618 }; 618 };
diff --git a/arch/arm/boot/dts/omap3-gta04.dts b/arch/arm/boot/dts/omap3-gta04.dts
index c551e4af4d83..d3b253bbc885 100644
--- a/arch/arm/boot/dts/omap3-gta04.dts
+++ b/arch/arm/boot/dts/omap3-gta04.dts
@@ -13,7 +13,7 @@
13 13
14/ { 14/ {
15 model = "OMAP3 GTA04"; 15 model = "OMAP3 GTA04";
16 compatible = "ti,omap3-gta04", "ti,omap3"; 16 compatible = "ti,omap3-gta04", "ti,omap36xx", "ti,omap3";
17 17
18 cpus { 18 cpus {
19 cpu@0 { 19 cpu@0 {
diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts
index 25a2b5f652fd..f2779ac75872 100644
--- a/arch/arm/boot/dts/omap3-igep0020.dts
+++ b/arch/arm/boot/dts/omap3-igep0020.dts
@@ -14,7 +14,7 @@
14 14
15/ { 15/ {
16 model = "IGEPv2 (TI OMAP AM/DM37x)"; 16 model = "IGEPv2 (TI OMAP AM/DM37x)";
17 compatible = "isee,omap3-igep0020", "ti,omap3"; 17 compatible = "isee,omap3-igep0020", "ti,omap36xx", "ti,omap3";
18 18
19 leds { 19 leds {
20 pinctrl-names = "default"; 20 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts
index 145c58cfc8ac..2793749eb1ba 100644
--- a/arch/arm/boot/dts/omap3-igep0030.dts
+++ b/arch/arm/boot/dts/omap3-igep0030.dts
@@ -13,7 +13,7 @@
13 13
14/ { 14/ {
15 model = "IGEP COM MODULE (TI OMAP AM/DM37x)"; 15 model = "IGEP COM MODULE (TI OMAP AM/DM37x)";
16 compatible = "isee,omap3-igep0030", "ti,omap3"; 16 compatible = "isee,omap3-igep0030", "ti,omap36xx", "ti,omap3";
17 17
18 leds { 18 leds {
19 pinctrl-names = "default"; 19 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 19c65509a22d..3b075dd19b51 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -429,7 +429,7 @@
429 R8A7791_CLK_MSIOF1 R8A7791_CLK_SCIFB2 429 R8A7791_CLK_MSIOF1 R8A7791_CLK_SCIFB2
430 >; 430 >;
431 clock-output-names = 431 clock-output-names =
432 "scifa2", "scifa1", "scifa0", "misof2", "scifb0", 432 "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
433 "scifb1", "msiof1", "scifb2"; 433 "scifb1", "msiof1", "scifb2";
434 }; 434 };
435 mstp3_clks: mstp3_clks@e615013c { 435 mstp3_clks: mstp3_clks@e615013c {
diff --git a/arch/arm/boot/dts/sama5d36.dtsi b/arch/arm/boot/dts/sama5d36.dtsi
index 6c31c26e6cc0..db58cad6acd3 100644
--- a/arch/arm/boot/dts/sama5d36.dtsi
+++ b/arch/arm/boot/dts/sama5d36.dtsi
@@ -8,8 +8,8 @@
8 */ 8 */
9#include "sama5d3.dtsi" 9#include "sama5d3.dtsi"
10#include "sama5d3_can.dtsi" 10#include "sama5d3_can.dtsi"
11#include "sama5d3_emac.dtsi"
12#include "sama5d3_gmac.dtsi" 11#include "sama5d3_gmac.dtsi"
12#include "sama5d3_emac.dtsi"
13#include "sama5d3_lcd.dtsi" 13#include "sama5d3_lcd.dtsi"
14#include "sama5d3_mci2.dtsi" 14#include "sama5d3_mci2.dtsi"
15#include "sama5d3_tcb1.dtsi" 15#include "sama5d3_tcb1.dtsi"
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 10666ca8aee1..7753be0c86d7 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -331,7 +331,7 @@
331 }; 331 };
332 332
333 intc: interrupt-controller@01c20400 { 333 intc: interrupt-controller@01c20400 {
334 compatible = "allwinner,sun4i-ic"; 334 compatible = "allwinner,sun4i-a10-ic";
335 reg = <0x01c20400 0x400>; 335 reg = <0x01c20400 0x400>;
336 interrupt-controller; 336 interrupt-controller;
337 #interrupt-cells = <1>; 337 #interrupt-cells = <1>;
@@ -403,7 +403,7 @@
403 }; 403 };
404 404
405 timer@01c20c00 { 405 timer@01c20c00 {
406 compatible = "allwinner,sun4i-timer"; 406 compatible = "allwinner,sun4i-a10-timer";
407 reg = <0x01c20c00 0x90>; 407 reg = <0x01c20c00 0x90>;
408 interrupts = <22>; 408 interrupts = <22>;
409 clocks = <&osc24M>; 409 clocks = <&osc24M>;
@@ -421,12 +421,12 @@
421 }; 421 };
422 422
423 sid: eeprom@01c23800 { 423 sid: eeprom@01c23800 {
424 compatible = "allwinner,sun4i-sid"; 424 compatible = "allwinner,sun4i-a10-sid";
425 reg = <0x01c23800 0x10>; 425 reg = <0x01c23800 0x10>;
426 }; 426 };
427 427
428 rtp: rtp@01c25000 { 428 rtp: rtp@01c25000 {
429 compatible = "allwinner,sun4i-ts"; 429 compatible = "allwinner,sun4i-a10-ts";
430 reg = <0x01c25000 0x100>; 430 reg = <0x01c25000 0x100>;
431 interrupts = <29>; 431 interrupts = <29>;
432 }; 432 };
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 64961595e8d6..ee17b1c379e3 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -294,7 +294,7 @@
294 }; 294 };
295 295
296 intc: interrupt-controller@01c20400 { 296 intc: interrupt-controller@01c20400 {
297 compatible = "allwinner,sun4i-ic"; 297 compatible = "allwinner,sun4i-a10-ic";
298 reg = <0x01c20400 0x400>; 298 reg = <0x01c20400 0x400>;
299 interrupt-controller; 299 interrupt-controller;
300 #interrupt-cells = <1>; 300 #interrupt-cells = <1>;
@@ -366,7 +366,7 @@
366 }; 366 };
367 367
368 timer@01c20c00 { 368 timer@01c20c00 {
369 compatible = "allwinner,sun4i-timer"; 369 compatible = "allwinner,sun4i-a10-timer";
370 reg = <0x01c20c00 0x90>; 370 reg = <0x01c20c00 0x90>;
371 interrupts = <22>; 371 interrupts = <22>;
372 clocks = <&osc24M>; 372 clocks = <&osc24M>;
@@ -378,12 +378,12 @@
378 }; 378 };
379 379
380 sid: eeprom@01c23800 { 380 sid: eeprom@01c23800 {
381 compatible = "allwinner,sun4i-sid"; 381 compatible = "allwinner,sun4i-a10-sid";
382 reg = <0x01c23800 0x10>; 382 reg = <0x01c23800 0x10>;
383 }; 383 };
384 384
385 rtp: rtp@01c25000 { 385 rtp: rtp@01c25000 {
386 compatible = "allwinner,sun4i-ts"; 386 compatible = "allwinner,sun4i-a10-ts";
387 reg = <0x01c25000 0x100>; 387 reg = <0x01c25000 0x100>;
388 interrupts = <29>; 388 interrupts = <29>;
389 }; 389 };
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index 320335abfccd..3490ef9ec603 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -275,7 +275,7 @@
275 ranges; 275 ranges;
276 276
277 intc: interrupt-controller@01c20400 { 277 intc: interrupt-controller@01c20400 {
278 compatible = "allwinner,sun4i-ic"; 278 compatible = "allwinner,sun4i-a10-ic";
279 reg = <0x01c20400 0x400>; 279 reg = <0x01c20400 0x400>;
280 interrupt-controller; 280 interrupt-controller;
281 #interrupt-cells = <1>; 281 #interrupt-cells = <1>;
@@ -329,7 +329,7 @@
329 }; 329 };
330 330
331 timer@01c20c00 { 331 timer@01c20c00 {
332 compatible = "allwinner,sun4i-timer"; 332 compatible = "allwinner,sun4i-a10-timer";
333 reg = <0x01c20c00 0x90>; 333 reg = <0x01c20c00 0x90>;
334 interrupts = <22>; 334 interrupts = <22>;
335 clocks = <&osc24M>; 335 clocks = <&osc24M>;
@@ -341,12 +341,12 @@
341 }; 341 };
342 342
343 sid: eeprom@01c23800 { 343 sid: eeprom@01c23800 {
344 compatible = "allwinner,sun4i-sid"; 344 compatible = "allwinner,sun4i-a10-sid";
345 reg = <0x01c23800 0x10>; 345 reg = <0x01c23800 0x10>;
346 }; 346 };
347 347
348 rtp: rtp@01c25000 { 348 rtp: rtp@01c25000 {
349 compatible = "allwinner,sun4i-ts"; 349 compatible = "allwinner,sun4i-a10-ts";
350 reg = <0x01c25000 0x100>; 350 reg = <0x01c25000 0x100>;
351 interrupts = <29>; 351 interrupts = <29>;
352 }; 352 };
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 5256ad9be52c..38d43febda4c 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -190,6 +190,14 @@
190 #size-cells = <1>; 190 #size-cells = <1>;
191 ranges; 191 ranges;
192 192
193 nmi_intc: interrupt-controller@01f00c0c {
194 compatible = "allwinner,sun6i-a31-sc-nmi";
195 interrupt-controller;
196 #interrupt-cells = <2>;
197 reg = <0x01f00c0c 0x38>;
198 interrupts = <0 32 4>;
199 };
200
193 pio: pinctrl@01c20800 { 201 pio: pinctrl@01c20800 {
194 compatible = "allwinner,sun6i-a31-pinctrl"; 202 compatible = "allwinner,sun6i-a31-pinctrl";
195 reg = <0x01c20800 0x400>; 203 reg = <0x01c20800 0x400>;
@@ -231,7 +239,7 @@
231 }; 239 };
232 240
233 timer@01c20c00 { 241 timer@01c20c00 {
234 compatible = "allwinner,sun4i-timer"; 242 compatible = "allwinner,sun4i-a10-timer";
235 reg = <0x01c20c00 0xa0>; 243 reg = <0x01c20c00 0xa0>;
236 interrupts = <0 18 4>, 244 interrupts = <0 18 4>,
237 <0 19 4>, 245 <0 19 4>,
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 9ff09484847b..cadcf2f9881d 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -339,6 +339,14 @@
339 #size-cells = <1>; 339 #size-cells = <1>;
340 ranges; 340 ranges;
341 341
342 nmi_intc: interrupt-controller@01c00030 {
343 compatible = "allwinner,sun7i-a20-sc-nmi";
344 interrupt-controller;
345 #interrupt-cells = <2>;
346 reg = <0x01c00030 0x0c>;
347 interrupts = <0 0 4>;
348 };
349
342 emac: ethernet@01c0b000 { 350 emac: ethernet@01c0b000 {
343 compatible = "allwinner,sun4i-a10-emac"; 351 compatible = "allwinner,sun4i-a10-emac";
344 reg = <0x01c0b000 0x1000>; 352 reg = <0x01c0b000 0x1000>;
@@ -435,7 +443,7 @@
435 }; 443 };
436 444
437 timer@01c20c00 { 445 timer@01c20c00 {
438 compatible = "allwinner,sun4i-timer"; 446 compatible = "allwinner,sun4i-a10-timer";
439 reg = <0x01c20c00 0x90>; 447 reg = <0x01c20c00 0x90>;
440 interrupts = <0 22 4>, 448 interrupts = <0 22 4>,
441 <0 23 4>, 449 <0 23 4>,
@@ -454,7 +462,7 @@
454 rtc: rtc@01c20d00 { 462 rtc: rtc@01c20d00 {
455 compatible = "allwinner,sun7i-a20-rtc"; 463 compatible = "allwinner,sun7i-a20-rtc";
456 reg = <0x01c20d00 0x20>; 464 reg = <0x01c20d00 0x20>;
457 interrupts = <0 24 1>; 465 interrupts = <0 24 4>;
458 }; 466 };
459 467
460 sid: eeprom@01c23800 { 468 sid: eeprom@01c23800 {
@@ -463,7 +471,7 @@
463 }; 471 };
464 472
465 rtp: rtp@01c25000 { 473 rtp: rtp@01c25000 {
466 compatible = "allwinner,sun4i-ts"; 474 compatible = "allwinner,sun4i-a10-ts";
467 reg = <0x01c25000 0x100>; 475 reg = <0x01c25000 0x100>;
468 interrupts = <0 29 4>; 476 interrupts = <0 29 4>;
469 }; 477 };
@@ -596,10 +604,10 @@
596 hstimer@01c60000 { 604 hstimer@01c60000 {
597 compatible = "allwinner,sun7i-a20-hstimer"; 605 compatible = "allwinner,sun7i-a20-hstimer";
598 reg = <0x01c60000 0x1000>; 606 reg = <0x01c60000 0x1000>;
599 interrupts = <0 81 1>, 607 interrupts = <0 81 4>,
600 <0 82 1>, 608 <0 82 4>,
601 <0 83 1>, 609 <0 83 4>,
602 <0 84 1>; 610 <0 84 4>;
603 clocks = <&ahb_gates 28>; 611 clocks = <&ahb_gates 28>;
604 }; 612 };
605 613
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 8b67b19392ec..789d0bacc110 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -24,6 +24,12 @@
24 device_type = "cpu"; 24 device_type = "cpu";
25 reg = <0>; 25 reg = <0>;
26 clocks = <&clkc 3>; 26 clocks = <&clkc 3>;
27 operating-points = <
28 /* kHz uV */
29 666667 1000000
30 333334 1000000
31 222223 1000000
32 >;
27 }; 33 };
28 34
29 cpu@1 { 35 cpu@1 {
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-15 16:29:59 -0400