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-rw-r--r--arch/arm/boot/dts/aks-cdu.dts113
-rw-r--r--arch/arm/boot/dts/am335x-bone.dts20
-rw-r--r--arch/arm/boot/dts/am335x-evm.dts20
-rw-r--r--arch/arm/boot/dts/am33xx.dtsi158
-rw-r--r--arch/arm/boot/dts/am3517-evm.dts32
-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi37
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi31
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi39
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi30
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi39
-rw-r--r--arch/arm/boot/dts/db8500.dtsi107
-rw-r--r--arch/arm/boot/dts/ea3250.dts174
-rw-r--r--arch/arm/boot/dts/evk-pro3.dts41
-rw-r--r--arch/arm/boot/dts/exynos4210-origen.dts12
-rw-r--r--arch/arm/boot/dts/exynos4210-smdkv310.dts38
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi47
-rw-r--r--arch/arm/boot/dts/exynos5250-smdk5250.dts38
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi36
-rw-r--r--arch/arm/boot/dts/ge863-pro3.dtsi52
-rw-r--r--arch/arm/boot/dts/imx23-evk.dts66
-rw-r--r--arch/arm/boot/dts/imx23-olinuxino.dts44
-rw-r--r--arch/arm/boot/dts/imx23-stmp378x_devb.dts78
-rw-r--r--arch/arm/boot/dts/imx23.dtsi169
-rw-r--r--arch/arm/boot/dts/imx27-3ds.dts41
-rw-r--r--arch/arm/boot/dts/imx27.dtsi12
-rw-r--r--arch/arm/boot/dts/imx28-apx4devkit.dts198
-rw-r--r--arch/arm/boot/dts/imx28-cfa10036.dts52
-rw-r--r--arch/arm/boot/dts/imx28-evk.dts164
-rw-r--r--arch/arm/boot/dts/imx28-m28evk.dts210
-rw-r--r--arch/arm/boot/dts/imx28-tx28.dts97
-rw-r--r--arch/arm/boot/dts/imx28.dtsi353
-rw-r--r--arch/arm/boot/dts/imx31-bug.dts31
-rw-r--r--arch/arm/boot/dts/imx31.dtsi88
-rw-r--r--arch/arm/boot/dts/imx51.dtsi8
-rw-r--r--arch/arm/boot/dts/imx53.dtsi14
-rw-r--r--arch/arm/boot/dts/imx6q-arm2.dts6
-rw-r--r--arch/arm/boot/dts/imx6q-sabrelite.dts33
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi99
-rw-r--r--arch/arm/boot/dts/lpc32xx.dtsi79
-rw-r--r--arch/arm/boot/dts/omap2420-h4.dts20
-rw-r--r--arch/arm/boot/dts/omap3-beagle.dts4
-rw-r--r--arch/arm/boot/dts/omap3-evm.dts28
-rw-r--r--arch/arm/boot/dts/omap3.dtsi5
-rw-r--r--arch/arm/boot/dts/omap4-panda.dts43
-rw-r--r--arch/arm/boot/dts/omap4-pandaES.dts24
-rw-r--r--arch/arm/boot/dts/omap4-sdp.dts72
-rw-r--r--arch/arm/boot/dts/omap4-var_som.dts96
-rw-r--r--arch/arm/boot/dts/omap4.dtsi23
-rw-r--r--arch/arm/boot/dts/phy3250.dts61
-rw-r--r--arch/arm/boot/dts/snowball.dts21
-rw-r--r--arch/arm/boot/dts/spear13xx.dtsi11
-rw-r--r--arch/arm/boot/dts/spear320-evb.dts6
-rw-r--r--arch/arm/boot/dts/spear600.dtsi1
-rw-r--r--arch/arm/boot/dts/tegra20-harmony.dts (renamed from arch/arm/boot/dts/tegra-harmony.dts)1
-rw-r--r--arch/arm/boot/dts/tegra20-paz00.dts (renamed from arch/arm/boot/dts/tegra-paz00.dts)1
-rw-r--r--arch/arm/boot/dts/tegra20-seaboard.dts (renamed from arch/arm/boot/dts/tegra-seaboard.dts)88
-rw-r--r--arch/arm/boot/dts/tegra20-trimslice.dts (renamed from arch/arm/boot/dts/tegra-trimslice.dts)0
-rw-r--r--arch/arm/boot/dts/tegra20-ventana.dts (renamed from arch/arm/boot/dts/tegra-ventana.dts)1
-rw-r--r--arch/arm/boot/dts/tegra20-whistler.dts301
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi40
-rw-r--r--arch/arm/boot/dts/tegra30-cardhu.dts (renamed from arch/arm/boot/dts/tegra-cardhu.dts)1
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi40
-rw-r--r--arch/arm/boot/dts/vexpress-v2m-rs1.dtsi11
-rw-r--r--arch/arm/boot/dts/vexpress-v2m.dtsi11
-rw-r--r--arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts36
-rw-r--r--arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts188
66 files changed, 3753 insertions, 287 deletions
diff --git a/arch/arm/boot/dts/aks-cdu.dts b/arch/arm/boot/dts/aks-cdu.dts
new file mode 100644
index 000000000000..29b9f15e7599
--- /dev/null
+++ b/arch/arm/boot/dts/aks-cdu.dts
@@ -0,0 +1,113 @@
1/*
2 * aks-cdu.dts - Device Tree file for AK signal CDU
3 *
4 * Copyright (C) 2012 AK signal Brno a.s.
5 * 2012 Jiri Prchal <jiri.prchal@aksignal.cz>
6 *
7 * Licensed under GPLv2 or later.
8 */
9
10/dts-v1/;
11
12/include/ "ge863-pro3.dtsi"
13
14/ {
15 chosen {
16 bootargs = "console=ttyS0,115200 ubi.mtd=4 root=ubi0:rootfs rootfstype=ubifs";
17 };
18
19 ahb {
20 apb {
21 usart0: serial@fffb0000 {
22 status = "okay";
23 };
24
25 usart1: serial@fffb4000 {
26 status = "okay";
27 linux,rs485-enabled-at-boot-time;
28 rs485-rts-delay = <0 0>;
29 };
30
31 usart2: serial@fffb8000 {
32 status = "okay";
33 linux,rs485-enabled-at-boot-time;
34 rs485-rts-delay = <0 0>;
35 };
36
37 usart3: serial@fffd0000 {
38 status = "okay";
39 linux,rs485-enabled-at-boot-time;
40 rs485-rts-delay = <0 0>;
41 };
42
43 macb0: ethernet@fffc4000 {
44 phy-mode = "rmii";
45 status = "okay";
46 };
47
48 usb1: gadget@fffa4000 {
49 atmel,vbus-gpio = <&pioC 15 0>;
50 status = "okay";
51 };
52 };
53
54 usb0: ohci@00500000 {
55 num-ports = <2>;
56 status = "okay";
57 };
58
59 nand0: nand@40000000 {
60 nand-bus-width = <8>;
61 nand-ecc-mode = "soft";
62 nand-on-flash-bbt;
63 status = "okay";
64
65 bootstrap@0 {
66 label = "bootstrap";
67 reg = <0x0 0x40000>;
68 };
69
70 uboot@40000 {
71 label = "uboot";
72 reg = <0x40000 0x80000>;
73 };
74 ubootenv@c0000 {
75 label = "ubootenv";
76 reg = <0xc0000 0x40000>;
77 };
78 kernel@100000 {
79 label = "kernel";
80 reg = <0x100000 0x400000>;
81 };
82 rootfs@500000 {
83 label = "rootfs";
84 reg = <0x500000 0x7b00000>;
85 };
86 };
87 };
88
89 leds {
90 compatible = "gpio-leds";
91
92 red {
93 gpios = <&pioC 10 0>;
94 linux,default-trigger = "none";
95 };
96
97 green {
98 gpios = <&pioA 5 1>;
99 linux,default-trigger = "none";
100 default-state = "on";
101 };
102
103 yellow {
104 gpios = <&pioB 20 1>;
105 linux,default-trigger = "none";
106 };
107
108 blue {
109 gpios = <&pioB 21 1>;
110 linux,default-trigger = "none";
111 };
112 };
113};
diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
new file mode 100644
index 000000000000..a9af4db7234c
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -0,0 +1,20 @@
1/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10/include/ "am33xx.dtsi"
11
12/ {
13 model = "TI AM335x BeagleBone";
14 compatible = "ti,am335x-bone", "ti,am33xx";
15
16 memory {
17 device_type = "memory";
18 reg = <0x80000000 0x10000000>; /* 256 MB */
19 };
20};
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
new file mode 100644
index 000000000000..d6a97d9eff72
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -0,0 +1,20 @@
1/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10/include/ "am33xx.dtsi"
11
12/ {
13 model = "TI AM335x EVM";
14 compatible = "ti,am335x-evm", "ti,am33xx";
15
16 memory {
17 device_type = "memory";
18 reg = <0x80000000 0x10000000>; /* 256 MB */
19 };
20};
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
new file mode 100644
index 000000000000..59509c48d7e5
--- /dev/null
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -0,0 +1,158 @@
1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/include/ "skeleton.dtsi"
12
13/ {
14 compatible = "ti,am33xx";
15
16 aliases {
17 serial0 = &uart1;
18 serial1 = &uart2;
19 serial2 = &uart3;
20 serial3 = &uart4;
21 serial4 = &uart5;
22 serial5 = &uart6;
23 };
24
25 cpus {
26 cpu@0 {
27 compatible = "arm,cortex-a8";
28 };
29 };
30
31 /*
32 * The soc node represents the soc top level view. It is uses for IPs
33 * that are not memory mapped in the MPU view or for the MPU itself.
34 */
35 soc {
36 compatible = "ti,omap-infra";
37 mpu {
38 compatible = "ti,omap3-mpu";
39 ti,hwmods = "mpu";
40 };
41 };
42
43 /*
44 * XXX: Use a flat representation of the AM33XX interconnect.
45 * The real AM33XX interconnect network is quite complex.Since
46 * that will not bring real advantage to represent that in DT
47 * for the moment, just use a fake OCP bus entry to represent
48 * the whole bus hierarchy.
49 */
50 ocp {
51 compatible = "simple-bus";
52 #address-cells = <1>;
53 #size-cells = <1>;
54 ranges;
55 ti,hwmods = "l3_main";
56
57 intc: interrupt-controller@48200000 {
58 compatible = "ti,omap2-intc";
59 interrupt-controller;
60 #interrupt-cells = <1>;
61 ti,intc-size = <128>;
62 reg = <0x48200000 0x1000>;
63 };
64
65 gpio1: gpio@44e07000 {
66 compatible = "ti,omap4-gpio";
67 ti,hwmods = "gpio1";
68 gpio-controller;
69 #gpio-cells = <2>;
70 interrupt-controller;
71 #interrupt-cells = <1>;
72 };
73
74 gpio2: gpio@4804C000 {
75 compatible = "ti,omap4-gpio";
76 ti,hwmods = "gpio2";
77 gpio-controller;
78 #gpio-cells = <2>;
79 interrupt-controller;
80 #interrupt-cells = <1>;
81 };
82
83 gpio3: gpio@481AC000 {
84 compatible = "ti,omap4-gpio";
85 ti,hwmods = "gpio3";
86 gpio-controller;
87 #gpio-cells = <2>;
88 interrupt-controller;
89 #interrupt-cells = <1>;
90 };
91
92 gpio4: gpio@481AE000 {
93 compatible = "ti,omap4-gpio";
94 ti,hwmods = "gpio4";
95 gpio-controller;
96 #gpio-cells = <2>;
97 interrupt-controller;
98 #interrupt-cells = <1>;
99 };
100
101 uart1: serial@44E09000 {
102 compatible = "ti,omap3-uart";
103 ti,hwmods = "uart1";
104 clock-frequency = <48000000>;
105 };
106
107 uart2: serial@48022000 {
108 compatible = "ti,omap3-uart";
109 ti,hwmods = "uart2";
110 clock-frequency = <48000000>;
111 };
112
113 uart3: serial@48024000 {
114 compatible = "ti,omap3-uart";
115 ti,hwmods = "uart3";
116 clock-frequency = <48000000>;
117 };
118
119 uart4: serial@481A6000 {
120 compatible = "ti,omap3-uart";
121 ti,hwmods = "uart4";
122 clock-frequency = <48000000>;
123 };
124
125 uart5: serial@481A8000 {
126 compatible = "ti,omap3-uart";
127 ti,hwmods = "uart5";
128 clock-frequency = <48000000>;
129 };
130
131 uart6: serial@481AA000 {
132 compatible = "ti,omap3-uart";
133 ti,hwmods = "uart6";
134 clock-frequency = <48000000>;
135 };
136
137 i2c1: i2c@44E0B000 {
138 compatible = "ti,omap4-i2c";
139 #address-cells = <1>;
140 #size-cells = <0>;
141 ti,hwmods = "i2c1";
142 };
143
144 i2c2: i2c@4802A000 {
145 compatible = "ti,omap4-i2c";
146 #address-cells = <1>;
147 #size-cells = <0>;
148 ti,hwmods = "i2c2";
149 };
150
151 i2c3: i2c@4819C000 {
152 compatible = "ti,omap4-i2c";
153 #address-cells = <1>;
154 #size-cells = <0>;
155 ti,hwmods = "i2c3";
156 };
157 };
158};
diff --git a/arch/arm/boot/dts/am3517-evm.dts b/arch/arm/boot/dts/am3517-evm.dts
new file mode 100644
index 000000000000..474f760ecadf
--- /dev/null
+++ b/arch/arm/boot/dts/am3517-evm.dts
@@ -0,0 +1,32 @@
1/*
2 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10/include/ "omap3.dtsi"
11
12/ {
13 model = "TI AM3517 EVM (AM3517/05)";
14 compatible = "ti,am3517-evm", "ti,omap3";
15
16 memory {
17 device_type = "memory";
18 reg = <0x80000000 0x10000000>; /* 256 MB */
19 };
20};
21
22&i2c1 {
23 clock-frequency = <400000>;
24};
25
26&i2c2 {
27 clock-frequency = <400000>;
28};
29
30&i2c3 {
31 clock-frequency = <400000>;
32};
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index f449efc9825f..66389c1c6f62 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -52,10 +52,11 @@
52 ranges; 52 ranges;
53 53
54 aic: interrupt-controller@fffff000 { 54 aic: interrupt-controller@fffff000 {
55 #interrupt-cells = <2>; 55 #interrupt-cells = <3>;
56 compatible = "atmel,at91rm9200-aic"; 56 compatible = "atmel,at91rm9200-aic";
57 interrupt-controller; 57 interrupt-controller;
58 reg = <0xfffff000 0x200>; 58 reg = <0xfffff000 0x200>;
59 atmel,external-irqs = <29 30 31>;
59 }; 60 };
60 61
61 ramc0: ramc@ffffea00 { 62 ramc0: ramc@ffffea00 {
@@ -81,25 +82,25 @@
81 pit: timer@fffffd30 { 82 pit: timer@fffffd30 {
82 compatible = "atmel,at91sam9260-pit"; 83 compatible = "atmel,at91sam9260-pit";
83 reg = <0xfffffd30 0xf>; 84 reg = <0xfffffd30 0xf>;
84 interrupts = <1 4>; 85 interrupts = <1 4 7>;
85 }; 86 };
86 87
87 tcb0: timer@fffa0000 { 88 tcb0: timer@fffa0000 {
88 compatible = "atmel,at91rm9200-tcb"; 89 compatible = "atmel,at91rm9200-tcb";
89 reg = <0xfffa0000 0x100>; 90 reg = <0xfffa0000 0x100>;
90 interrupts = <17 4 18 4 19 4>; 91 interrupts = <17 4 0 18 4 0 19 4 0>;
91 }; 92 };
92 93
93 tcb1: timer@fffdc000 { 94 tcb1: timer@fffdc000 {
94 compatible = "atmel,at91rm9200-tcb"; 95 compatible = "atmel,at91rm9200-tcb";
95 reg = <0xfffdc000 0x100>; 96 reg = <0xfffdc000 0x100>;
96 interrupts = <26 4 27 4 28 4>; 97 interrupts = <26 4 0 27 4 0 28 4 0>;
97 }; 98 };
98 99
99 pioA: gpio@fffff400 { 100 pioA: gpio@fffff400 {
100 compatible = "atmel,at91rm9200-gpio"; 101 compatible = "atmel,at91rm9200-gpio";
101 reg = <0xfffff400 0x100>; 102 reg = <0xfffff400 0x100>;
102 interrupts = <2 4>; 103 interrupts = <2 4 1>;
103 #gpio-cells = <2>; 104 #gpio-cells = <2>;
104 gpio-controller; 105 gpio-controller;
105 interrupt-controller; 106 interrupt-controller;
@@ -108,7 +109,7 @@
108 pioB: gpio@fffff600 { 109 pioB: gpio@fffff600 {
109 compatible = "atmel,at91rm9200-gpio"; 110 compatible = "atmel,at91rm9200-gpio";
110 reg = <0xfffff600 0x100>; 111 reg = <0xfffff600 0x100>;
111 interrupts = <3 4>; 112 interrupts = <3 4 1>;
112 #gpio-cells = <2>; 113 #gpio-cells = <2>;
113 gpio-controller; 114 gpio-controller;
114 interrupt-controller; 115 interrupt-controller;
@@ -117,7 +118,7 @@
117 pioC: gpio@fffff800 { 118 pioC: gpio@fffff800 {
118 compatible = "atmel,at91rm9200-gpio"; 119 compatible = "atmel,at91rm9200-gpio";
119 reg = <0xfffff800 0x100>; 120 reg = <0xfffff800 0x100>;
120 interrupts = <4 4>; 121 interrupts = <4 4 1>;
121 #gpio-cells = <2>; 122 #gpio-cells = <2>;
122 gpio-controller; 123 gpio-controller;
123 interrupt-controller; 124 interrupt-controller;
@@ -126,14 +127,14 @@
126 dbgu: serial@fffff200 { 127 dbgu: serial@fffff200 {
127 compatible = "atmel,at91sam9260-usart"; 128 compatible = "atmel,at91sam9260-usart";
128 reg = <0xfffff200 0x200>; 129 reg = <0xfffff200 0x200>;
129 interrupts = <1 4>; 130 interrupts = <1 4 7>;
130 status = "disabled"; 131 status = "disabled";
131 }; 132 };
132 133
133 usart0: serial@fffb0000 { 134 usart0: serial@fffb0000 {
134 compatible = "atmel,at91sam9260-usart"; 135 compatible = "atmel,at91sam9260-usart";
135 reg = <0xfffb0000 0x200>; 136 reg = <0xfffb0000 0x200>;
136 interrupts = <6 4>; 137 interrupts = <6 4 5>;
137 atmel,use-dma-rx; 138 atmel,use-dma-rx;
138 atmel,use-dma-tx; 139 atmel,use-dma-tx;
139 status = "disabled"; 140 status = "disabled";
@@ -142,7 +143,7 @@
142 usart1: serial@fffb4000 { 143 usart1: serial@fffb4000 {
143 compatible = "atmel,at91sam9260-usart"; 144 compatible = "atmel,at91sam9260-usart";
144 reg = <0xfffb4000 0x200>; 145 reg = <0xfffb4000 0x200>;
145 interrupts = <7 4>; 146 interrupts = <7 4 5>;
146 atmel,use-dma-rx; 147 atmel,use-dma-rx;
147 atmel,use-dma-tx; 148 atmel,use-dma-tx;
148 status = "disabled"; 149 status = "disabled";
@@ -151,7 +152,7 @@
151 usart2: serial@fffb8000 { 152 usart2: serial@fffb8000 {
152 compatible = "atmel,at91sam9260-usart"; 153 compatible = "atmel,at91sam9260-usart";
153 reg = <0xfffb8000 0x200>; 154 reg = <0xfffb8000 0x200>;
154 interrupts = <8 4>; 155 interrupts = <8 4 5>;
155 atmel,use-dma-rx; 156 atmel,use-dma-rx;
156 atmel,use-dma-tx; 157 atmel,use-dma-tx;
157 status = "disabled"; 158 status = "disabled";
@@ -160,7 +161,7 @@
160 usart3: serial@fffd0000 { 161 usart3: serial@fffd0000 {
161 compatible = "atmel,at91sam9260-usart"; 162 compatible = "atmel,at91sam9260-usart";
162 reg = <0xfffd0000 0x200>; 163 reg = <0xfffd0000 0x200>;
163 interrupts = <23 4>; 164 interrupts = <23 4 5>;
164 atmel,use-dma-rx; 165 atmel,use-dma-rx;
165 atmel,use-dma-tx; 166 atmel,use-dma-tx;
166 status = "disabled"; 167 status = "disabled";
@@ -169,7 +170,7 @@
169 usart4: serial@fffd4000 { 170 usart4: serial@fffd4000 {
170 compatible = "atmel,at91sam9260-usart"; 171 compatible = "atmel,at91sam9260-usart";
171 reg = <0xfffd4000 0x200>; 172 reg = <0xfffd4000 0x200>;
172 interrupts = <24 4>; 173 interrupts = <24 4 5>;
173 atmel,use-dma-rx; 174 atmel,use-dma-rx;
174 atmel,use-dma-tx; 175 atmel,use-dma-tx;
175 status = "disabled"; 176 status = "disabled";
@@ -178,7 +179,7 @@
178 usart5: serial@fffd8000 { 179 usart5: serial@fffd8000 {
179 compatible = "atmel,at91sam9260-usart"; 180 compatible = "atmel,at91sam9260-usart";
180 reg = <0xfffd8000 0x200>; 181 reg = <0xfffd8000 0x200>;
181 interrupts = <25 4>; 182 interrupts = <25 4 5>;
182 atmel,use-dma-rx; 183 atmel,use-dma-rx;
183 atmel,use-dma-tx; 184 atmel,use-dma-tx;
184 status = "disabled"; 185 status = "disabled";
@@ -187,21 +188,21 @@
187 macb0: ethernet@fffc4000 { 188 macb0: ethernet@fffc4000 {
188 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 189 compatible = "cdns,at32ap7000-macb", "cdns,macb";
189 reg = <0xfffc4000 0x100>; 190 reg = <0xfffc4000 0x100>;
190 interrupts = <21 4>; 191 interrupts = <21 4 3>;
191 status = "disabled"; 192 status = "disabled";
192 }; 193 };
193 194
194 usb1: gadget@fffa4000 { 195 usb1: gadget@fffa4000 {
195 compatible = "atmel,at91rm9200-udc"; 196 compatible = "atmel,at91rm9200-udc";
196 reg = <0xfffa4000 0x4000>; 197 reg = <0xfffa4000 0x4000>;
197 interrupts = <10 4>; 198 interrupts = <10 4 2>;
198 status = "disabled"; 199 status = "disabled";
199 }; 200 };
200 201
201 adc0: adc@fffe0000 { 202 adc0: adc@fffe0000 {
202 compatible = "atmel,at91sam9260-adc"; 203 compatible = "atmel,at91sam9260-adc";
203 reg = <0xfffe0000 0x100>; 204 reg = <0xfffe0000 0x100>;
204 interrupts = <5 4>; 205 interrupts = <5 4 0>;
205 atmel,adc-use-external-triggers; 206 atmel,adc-use-external-triggers;
206 atmel,adc-channels-used = <0xf>; 207 atmel,adc-channels-used = <0xf>;
207 atmel,adc-vref = <3300>; 208 atmel,adc-vref = <3300>;
@@ -253,7 +254,7 @@
253 usb0: ohci@00500000 { 254 usb0: ohci@00500000 {
254 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 255 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
255 reg = <0x00500000 0x100000>; 256 reg = <0x00500000 0x100000>;
256 interrupts = <20 4>; 257 interrupts = <20 4 2>;
257 status = "disabled"; 258 status = "disabled";
258 }; 259 };
259 }; 260 };
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 0209913a65a2..b460d6ce9eb5 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -48,10 +48,11 @@
48 ranges; 48 ranges;
49 49
50 aic: interrupt-controller@fffff000 { 50 aic: interrupt-controller@fffff000 {
51 #interrupt-cells = <2>; 51 #interrupt-cells = <3>;
52 compatible = "atmel,at91rm9200-aic"; 52 compatible = "atmel,at91rm9200-aic";
53 interrupt-controller; 53 interrupt-controller;
54 reg = <0xfffff000 0x200>; 54 reg = <0xfffff000 0x200>;
55 atmel,external-irqs = <30 31>;
55 }; 56 };
56 57
57 pmc: pmc@fffffc00 { 58 pmc: pmc@fffffc00 {
@@ -68,13 +69,13 @@
68 pit: timer@fffffd30 { 69 pit: timer@fffffd30 {
69 compatible = "atmel,at91sam9260-pit"; 70 compatible = "atmel,at91sam9260-pit";
70 reg = <0xfffffd30 0xf>; 71 reg = <0xfffffd30 0xf>;
71 interrupts = <1 4>; 72 interrupts = <1 4 7>;
72 }; 73 };
73 74
74 tcb0: timer@fff7c000 { 75 tcb0: timer@fff7c000 {
75 compatible = "atmel,at91rm9200-tcb"; 76 compatible = "atmel,at91rm9200-tcb";
76 reg = <0xfff7c000 0x100>; 77 reg = <0xfff7c000 0x100>;
77 interrupts = <19 4>; 78 interrupts = <19 4 0>;
78 }; 79 };
79 80
80 rstc@fffffd00 { 81 rstc@fffffd00 {
@@ -90,7 +91,7 @@
90 pioA: gpio@fffff200 { 91 pioA: gpio@fffff200 {
91 compatible = "atmel,at91rm9200-gpio"; 92 compatible = "atmel,at91rm9200-gpio";
92 reg = <0xfffff200 0x100>; 93 reg = <0xfffff200 0x100>;
93 interrupts = <2 4>; 94 interrupts = <2 4 1>;
94 #gpio-cells = <2>; 95 #gpio-cells = <2>;
95 gpio-controller; 96 gpio-controller;
96 interrupt-controller; 97 interrupt-controller;
@@ -99,7 +100,7 @@
99 pioB: gpio@fffff400 { 100 pioB: gpio@fffff400 {
100 compatible = "atmel,at91rm9200-gpio"; 101 compatible = "atmel,at91rm9200-gpio";
101 reg = <0xfffff400 0x100>; 102 reg = <0xfffff400 0x100>;
102 interrupts = <3 4>; 103 interrupts = <3 4 1>;
103 #gpio-cells = <2>; 104 #gpio-cells = <2>;
104 gpio-controller; 105 gpio-controller;
105 interrupt-controller; 106 interrupt-controller;
@@ -108,7 +109,7 @@
108 pioC: gpio@fffff600 { 109 pioC: gpio@fffff600 {
109 compatible = "atmel,at91rm9200-gpio"; 110 compatible = "atmel,at91rm9200-gpio";
110 reg = <0xfffff600 0x100>; 111 reg = <0xfffff600 0x100>;
111 interrupts = <4 4>; 112 interrupts = <4 4 1>;
112 #gpio-cells = <2>; 113 #gpio-cells = <2>;
113 gpio-controller; 114 gpio-controller;
114 interrupt-controller; 115 interrupt-controller;
@@ -117,7 +118,7 @@
117 pioD: gpio@fffff800 { 118 pioD: gpio@fffff800 {
118 compatible = "atmel,at91rm9200-gpio"; 119 compatible = "atmel,at91rm9200-gpio";
119 reg = <0xfffff800 0x100>; 120 reg = <0xfffff800 0x100>;
120 interrupts = <4 4>; 121 interrupts = <4 4 1>;
121 #gpio-cells = <2>; 122 #gpio-cells = <2>;
122 gpio-controller; 123 gpio-controller;
123 interrupt-controller; 124 interrupt-controller;
@@ -126,7 +127,7 @@
126 pioE: gpio@fffffa00 { 127 pioE: gpio@fffffa00 {
127 compatible = "atmel,at91rm9200-gpio"; 128 compatible = "atmel,at91rm9200-gpio";
128 reg = <0xfffffa00 0x100>; 129 reg = <0xfffffa00 0x100>;
129 interrupts = <4 4>; 130 interrupts = <4 4 1>;
130 #gpio-cells = <2>; 131 #gpio-cells = <2>;
131 gpio-controller; 132 gpio-controller;
132 interrupt-controller; 133 interrupt-controller;
@@ -135,14 +136,14 @@
135 dbgu: serial@ffffee00 { 136 dbgu: serial@ffffee00 {
136 compatible = "atmel,at91sam9260-usart"; 137 compatible = "atmel,at91sam9260-usart";
137 reg = <0xffffee00 0x200>; 138 reg = <0xffffee00 0x200>;
138 interrupts = <1 4>; 139 interrupts = <1 4 7>;
139 status = "disabled"; 140 status = "disabled";
140 }; 141 };
141 142
142 usart0: serial@fff8c000 { 143 usart0: serial@fff8c000 {
143 compatible = "atmel,at91sam9260-usart"; 144 compatible = "atmel,at91sam9260-usart";
144 reg = <0xfff8c000 0x200>; 145 reg = <0xfff8c000 0x200>;
145 interrupts = <7 4>; 146 interrupts = <7 4 5>;
146 atmel,use-dma-rx; 147 atmel,use-dma-rx;
147 atmel,use-dma-tx; 148 atmel,use-dma-tx;
148 status = "disabled"; 149 status = "disabled";
@@ -151,7 +152,7 @@
151 usart1: serial@fff90000 { 152 usart1: serial@fff90000 {
152 compatible = "atmel,at91sam9260-usart"; 153 compatible = "atmel,at91sam9260-usart";
153 reg = <0xfff90000 0x200>; 154 reg = <0xfff90000 0x200>;
154 interrupts = <8 4>; 155 interrupts = <8 4 5>;
155 atmel,use-dma-rx; 156 atmel,use-dma-rx;
156 atmel,use-dma-tx; 157 atmel,use-dma-tx;
157 status = "disabled"; 158 status = "disabled";
@@ -160,7 +161,7 @@
160 usart2: serial@fff94000 { 161 usart2: serial@fff94000 {
161 compatible = "atmel,at91sam9260-usart"; 162 compatible = "atmel,at91sam9260-usart";
162 reg = <0xfff94000 0x200>; 163 reg = <0xfff94000 0x200>;
163 interrupts = <9 4>; 164 interrupts = <9 4 5>;
164 atmel,use-dma-rx; 165 atmel,use-dma-rx;
165 atmel,use-dma-tx; 166 atmel,use-dma-tx;
166 status = "disabled"; 167 status = "disabled";
@@ -169,14 +170,14 @@
169 macb0: ethernet@fffbc000 { 170 macb0: ethernet@fffbc000 {
170 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 171 compatible = "cdns,at32ap7000-macb", "cdns,macb";
171 reg = <0xfffbc000 0x100>; 172 reg = <0xfffbc000 0x100>;
172 interrupts = <21 4>; 173 interrupts = <21 4 3>;
173 status = "disabled"; 174 status = "disabled";
174 }; 175 };
175 176
176 usb1: gadget@fff78000 { 177 usb1: gadget@fff78000 {
177 compatible = "atmel,at91rm9200-udc"; 178 compatible = "atmel,at91rm9200-udc";
178 reg = <0xfff78000 0x4000>; 179 reg = <0xfff78000 0x4000>;
179 interrupts = <24 4>; 180 interrupts = <24 4 2>;
180 status = "disabled"; 181 status = "disabled";
181 }; 182 };
182 }; 183 };
@@ -200,7 +201,7 @@
200 usb0: ohci@00a00000 { 201 usb0: ohci@00a00000 {
201 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 202 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
202 reg = <0x00a00000 0x100000>; 203 reg = <0x00a00000 0x100000>;
203 interrupts = <29 4>; 204 interrupts = <29 4 2>;
204 status = "disabled"; 205 status = "disabled";
205 }; 206 };
206 }; 207 };
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 7dbccaf199f7..bafa8806fc17 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -53,10 +53,11 @@
53 ranges; 53 ranges;
54 54
55 aic: interrupt-controller@fffff000 { 55 aic: interrupt-controller@fffff000 {
56 #interrupt-cells = <2>; 56 #interrupt-cells = <3>;
57 compatible = "atmel,at91rm9200-aic"; 57 compatible = "atmel,at91rm9200-aic";
58 interrupt-controller; 58 interrupt-controller;
59 reg = <0xfffff000 0x200>; 59 reg = <0xfffff000 0x200>;
60 atmel,external-irqs = <31>;
60 }; 61 };
61 62
62 ramc0: ramc@ffffe400 { 63 ramc0: ramc@ffffe400 {
@@ -78,7 +79,7 @@
78 pit: timer@fffffd30 { 79 pit: timer@fffffd30 {
79 compatible = "atmel,at91sam9260-pit"; 80 compatible = "atmel,at91sam9260-pit";
80 reg = <0xfffffd30 0xf>; 81 reg = <0xfffffd30 0xf>;
81 interrupts = <1 4>; 82 interrupts = <1 4 7>;
82 }; 83 };
83 84
84 85
@@ -90,25 +91,25 @@
90 tcb0: timer@fff7c000 { 91 tcb0: timer@fff7c000 {
91 compatible = "atmel,at91rm9200-tcb"; 92 compatible = "atmel,at91rm9200-tcb";
92 reg = <0xfff7c000 0x100>; 93 reg = <0xfff7c000 0x100>;
93 interrupts = <18 4>; 94 interrupts = <18 4 0>;
94 }; 95 };
95 96
96 tcb1: timer@fffd4000 { 97 tcb1: timer@fffd4000 {
97 compatible = "atmel,at91rm9200-tcb"; 98 compatible = "atmel,at91rm9200-tcb";
98 reg = <0xfffd4000 0x100>; 99 reg = <0xfffd4000 0x100>;
99 interrupts = <18 4>; 100 interrupts = <18 4 0>;
100 }; 101 };
101 102
102 dma: dma-controller@ffffec00 { 103 dma: dma-controller@ffffec00 {
103 compatible = "atmel,at91sam9g45-dma"; 104 compatible = "atmel,at91sam9g45-dma";
104 reg = <0xffffec00 0x200>; 105 reg = <0xffffec00 0x200>;
105 interrupts = <21 4>; 106 interrupts = <21 4 0>;
106 }; 107 };
107 108
108 pioA: gpio@fffff200 { 109 pioA: gpio@fffff200 {
109 compatible = "atmel,at91rm9200-gpio"; 110 compatible = "atmel,at91rm9200-gpio";
110 reg = <0xfffff200 0x100>; 111 reg = <0xfffff200 0x100>;
111 interrupts = <2 4>; 112 interrupts = <2 4 1>;
112 #gpio-cells = <2>; 113 #gpio-cells = <2>;
113 gpio-controller; 114 gpio-controller;
114 interrupt-controller; 115 interrupt-controller;
@@ -117,7 +118,7 @@
117 pioB: gpio@fffff400 { 118 pioB: gpio@fffff400 {
118 compatible = "atmel,at91rm9200-gpio"; 119 compatible = "atmel,at91rm9200-gpio";
119 reg = <0xfffff400 0x100>; 120 reg = <0xfffff400 0x100>;
120 interrupts = <3 4>; 121 interrupts = <3 4 1>;
121 #gpio-cells = <2>; 122 #gpio-cells = <2>;
122 gpio-controller; 123 gpio-controller;
123 interrupt-controller; 124 interrupt-controller;
@@ -126,7 +127,7 @@
126 pioC: gpio@fffff600 { 127 pioC: gpio@fffff600 {
127 compatible = "atmel,at91rm9200-gpio"; 128 compatible = "atmel,at91rm9200-gpio";
128 reg = <0xfffff600 0x100>; 129 reg = <0xfffff600 0x100>;
129 interrupts = <4 4>; 130 interrupts = <4 4 1>;
130 #gpio-cells = <2>; 131 #gpio-cells = <2>;
131 gpio-controller; 132 gpio-controller;
132 interrupt-controller; 133 interrupt-controller;
@@ -135,7 +136,7 @@
135 pioD: gpio@fffff800 { 136 pioD: gpio@fffff800 {
136 compatible = "atmel,at91rm9200-gpio"; 137 compatible = "atmel,at91rm9200-gpio";
137 reg = <0xfffff800 0x100>; 138 reg = <0xfffff800 0x100>;
138 interrupts = <5 4>; 139 interrupts = <5 4 1>;
139 #gpio-cells = <2>; 140 #gpio-cells = <2>;
140 gpio-controller; 141 gpio-controller;
141 interrupt-controller; 142 interrupt-controller;
@@ -144,7 +145,7 @@
144 pioE: gpio@fffffa00 { 145 pioE: gpio@fffffa00 {
145 compatible = "atmel,at91rm9200-gpio"; 146 compatible = "atmel,at91rm9200-gpio";
146 reg = <0xfffffa00 0x100>; 147 reg = <0xfffffa00 0x100>;
147 interrupts = <5 4>; 148 interrupts = <5 4 1>;
148 #gpio-cells = <2>; 149 #gpio-cells = <2>;
149 gpio-controller; 150 gpio-controller;
150 interrupt-controller; 151 interrupt-controller;
@@ -153,14 +154,14 @@
153 dbgu: serial@ffffee00 { 154 dbgu: serial@ffffee00 {
154 compatible = "atmel,at91sam9260-usart"; 155 compatible = "atmel,at91sam9260-usart";
155 reg = <0xffffee00 0x200>; 156 reg = <0xffffee00 0x200>;
156 interrupts = <1 4>; 157 interrupts = <1 4 7>;
157 status = "disabled"; 158 status = "disabled";
158 }; 159 };
159 160
160 usart0: serial@fff8c000 { 161 usart0: serial@fff8c000 {
161 compatible = "atmel,at91sam9260-usart"; 162 compatible = "atmel,at91sam9260-usart";
162 reg = <0xfff8c000 0x200>; 163 reg = <0xfff8c000 0x200>;
163 interrupts = <7 4>; 164 interrupts = <7 4 5>;
164 atmel,use-dma-rx; 165 atmel,use-dma-rx;
165 atmel,use-dma-tx; 166 atmel,use-dma-tx;
166 status = "disabled"; 167 status = "disabled";
@@ -169,7 +170,7 @@
169 usart1: serial@fff90000 { 170 usart1: serial@fff90000 {
170 compatible = "atmel,at91sam9260-usart"; 171 compatible = "atmel,at91sam9260-usart";
171 reg = <0xfff90000 0x200>; 172 reg = <0xfff90000 0x200>;
172 interrupts = <8 4>; 173 interrupts = <8 4 5>;
173 atmel,use-dma-rx; 174 atmel,use-dma-rx;
174 atmel,use-dma-tx; 175 atmel,use-dma-tx;
175 status = "disabled"; 176 status = "disabled";
@@ -178,7 +179,7 @@
178 usart2: serial@fff94000 { 179 usart2: serial@fff94000 {
179 compatible = "atmel,at91sam9260-usart"; 180 compatible = "atmel,at91sam9260-usart";
180 reg = <0xfff94000 0x200>; 181 reg = <0xfff94000 0x200>;
181 interrupts = <9 4>; 182 interrupts = <9 4 5>;
182 atmel,use-dma-rx; 183 atmel,use-dma-rx;
183 atmel,use-dma-tx; 184 atmel,use-dma-tx;
184 status = "disabled"; 185 status = "disabled";
@@ -187,7 +188,7 @@
187 usart3: serial@fff98000 { 188 usart3: serial@fff98000 {
188 compatible = "atmel,at91sam9260-usart"; 189 compatible = "atmel,at91sam9260-usart";
189 reg = <0xfff98000 0x200>; 190 reg = <0xfff98000 0x200>;
190 interrupts = <10 4>; 191 interrupts = <10 4 5>;
191 atmel,use-dma-rx; 192 atmel,use-dma-rx;
192 atmel,use-dma-tx; 193 atmel,use-dma-tx;
193 status = "disabled"; 194 status = "disabled";
@@ -196,14 +197,14 @@
196 macb0: ethernet@fffbc000 { 197 macb0: ethernet@fffbc000 {
197 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 198 compatible = "cdns,at32ap7000-macb", "cdns,macb";
198 reg = <0xfffbc000 0x100>; 199 reg = <0xfffbc000 0x100>;
199 interrupts = <25 4>; 200 interrupts = <25 4 3>;
200 status = "disabled"; 201 status = "disabled";
201 }; 202 };
202 203
203 adc0: adc@fffb0000 { 204 adc0: adc@fffb0000 {
204 compatible = "atmel,at91sam9260-adc"; 205 compatible = "atmel,at91sam9260-adc";
205 reg = <0xfffb0000 0x100>; 206 reg = <0xfffb0000 0x100>;
206 interrupts = <20 4>; 207 interrupts = <20 4 0>;
207 atmel,adc-use-external-triggers; 208 atmel,adc-use-external-triggers;
208 atmel,adc-channels-used = <0xff>; 209 atmel,adc-channels-used = <0xff>;
209 atmel,adc-vref = <3300>; 210 atmel,adc-vref = <3300>;
@@ -257,14 +258,14 @@
257 usb0: ohci@00700000 { 258 usb0: ohci@00700000 {
258 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 259 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
259 reg = <0x00700000 0x100000>; 260 reg = <0x00700000 0x100000>;
260 interrupts = <22 4>; 261 interrupts = <22 4 2>;
261 status = "disabled"; 262 status = "disabled";
262 }; 263 };
263 264
264 usb1: ehci@00800000 { 265 usb1: ehci@00800000 {
265 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 266 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
266 reg = <0x00800000 0x100000>; 267 reg = <0x00800000 0x100000>;
267 interrupts = <22 4>; 268 interrupts = <22 4 2>;
268 status = "disabled"; 269 status = "disabled";
269 }; 270 };
270 }; 271 };
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index cb84de791b5a..bfac0dfc332c 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -50,7 +50,7 @@
50 ranges; 50 ranges;
51 51
52 aic: interrupt-controller@fffff000 { 52 aic: interrupt-controller@fffff000 {
53 #interrupt-cells = <2>; 53 #interrupt-cells = <3>;
54 compatible = "atmel,at91rm9200-aic"; 54 compatible = "atmel,at91rm9200-aic";
55 interrupt-controller; 55 interrupt-controller;
56 reg = <0xfffff000 0x200>; 56 reg = <0xfffff000 0x200>;
@@ -74,7 +74,7 @@
74 pit: timer@fffffe30 { 74 pit: timer@fffffe30 {
75 compatible = "atmel,at91sam9260-pit"; 75 compatible = "atmel,at91sam9260-pit";
76 reg = <0xfffffe30 0xf>; 76 reg = <0xfffffe30 0xf>;
77 interrupts = <1 4>; 77 interrupts = <1 4 7>;
78 }; 78 };
79 79
80 shdwc@fffffe10 { 80 shdwc@fffffe10 {
@@ -85,25 +85,25 @@
85 tcb0: timer@f8008000 { 85 tcb0: timer@f8008000 {
86 compatible = "atmel,at91sam9x5-tcb"; 86 compatible = "atmel,at91sam9x5-tcb";
87 reg = <0xf8008000 0x100>; 87 reg = <0xf8008000 0x100>;
88 interrupts = <17 4>; 88 interrupts = <17 4 0>;
89 }; 89 };
90 90
91 tcb1: timer@f800c000 { 91 tcb1: timer@f800c000 {
92 compatible = "atmel,at91sam9x5-tcb"; 92 compatible = "atmel,at91sam9x5-tcb";
93 reg = <0xf800c000 0x100>; 93 reg = <0xf800c000 0x100>;
94 interrupts = <17 4>; 94 interrupts = <17 4 0>;
95 }; 95 };
96 96
97 dma: dma-controller@ffffec00 { 97 dma: dma-controller@ffffec00 {
98 compatible = "atmel,at91sam9g45-dma"; 98 compatible = "atmel,at91sam9g45-dma";
99 reg = <0xffffec00 0x200>; 99 reg = <0xffffec00 0x200>;
100 interrupts = <20 4>; 100 interrupts = <20 4 0>;
101 }; 101 };
102 102
103 pioA: gpio@fffff400 { 103 pioA: gpio@fffff400 {
104 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 104 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
105 reg = <0xfffff400 0x100>; 105 reg = <0xfffff400 0x100>;
106 interrupts = <2 4>; 106 interrupts = <2 4 1>;
107 #gpio-cells = <2>; 107 #gpio-cells = <2>;
108 gpio-controller; 108 gpio-controller;
109 interrupt-controller; 109 interrupt-controller;
@@ -112,7 +112,7 @@
112 pioB: gpio@fffff600 { 112 pioB: gpio@fffff600 {
113 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 113 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
114 reg = <0xfffff600 0x100>; 114 reg = <0xfffff600 0x100>;
115 interrupts = <2 4>; 115 interrupts = <2 4 1>;
116 #gpio-cells = <2>; 116 #gpio-cells = <2>;
117 gpio-controller; 117 gpio-controller;
118 interrupt-controller; 118 interrupt-controller;
@@ -121,7 +121,7 @@
121 pioC: gpio@fffff800 { 121 pioC: gpio@fffff800 {
122 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 122 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
123 reg = <0xfffff800 0x100>; 123 reg = <0xfffff800 0x100>;
124 interrupts = <3 4>; 124 interrupts = <3 4 1>;
125 #gpio-cells = <2>; 125 #gpio-cells = <2>;
126 gpio-controller; 126 gpio-controller;
127 interrupt-controller; 127 interrupt-controller;
@@ -130,7 +130,7 @@
130 pioD: gpio@fffffa00 { 130 pioD: gpio@fffffa00 {
131 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 131 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
132 reg = <0xfffffa00 0x100>; 132 reg = <0xfffffa00 0x100>;
133 interrupts = <3 4>; 133 interrupts = <3 4 1>;
134 #gpio-cells = <2>; 134 #gpio-cells = <2>;
135 gpio-controller; 135 gpio-controller;
136 interrupt-controller; 136 interrupt-controller;
@@ -139,14 +139,14 @@
139 dbgu: serial@fffff200 { 139 dbgu: serial@fffff200 {
140 compatible = "atmel,at91sam9260-usart"; 140 compatible = "atmel,at91sam9260-usart";
141 reg = <0xfffff200 0x200>; 141 reg = <0xfffff200 0x200>;
142 interrupts = <1 4>; 142 interrupts = <1 4 7>;
143 status = "disabled"; 143 status = "disabled";
144 }; 144 };
145 145
146 usart0: serial@f801c000 { 146 usart0: serial@f801c000 {
147 compatible = "atmel,at91sam9260-usart"; 147 compatible = "atmel,at91sam9260-usart";
148 reg = <0xf801c000 0x4000>; 148 reg = <0xf801c000 0x4000>;
149 interrupts = <5 4>; 149 interrupts = <5 4 5>;
150 atmel,use-dma-rx; 150 atmel,use-dma-rx;
151 atmel,use-dma-tx; 151 atmel,use-dma-tx;
152 status = "disabled"; 152 status = "disabled";
@@ -155,7 +155,7 @@
155 usart1: serial@f8020000 { 155 usart1: serial@f8020000 {
156 compatible = "atmel,at91sam9260-usart"; 156 compatible = "atmel,at91sam9260-usart";
157 reg = <0xf8020000 0x4000>; 157 reg = <0xf8020000 0x4000>;
158 interrupts = <6 4>; 158 interrupts = <6 4 5>;
159 atmel,use-dma-rx; 159 atmel,use-dma-rx;
160 atmel,use-dma-tx; 160 atmel,use-dma-tx;
161 status = "disabled"; 161 status = "disabled";
@@ -164,7 +164,7 @@
164 usart2: serial@f8024000 { 164 usart2: serial@f8024000 {
165 compatible = "atmel,at91sam9260-usart"; 165 compatible = "atmel,at91sam9260-usart";
166 reg = <0xf8024000 0x4000>; 166 reg = <0xf8024000 0x4000>;
167 interrupts = <7 4>; 167 interrupts = <7 4 5>;
168 atmel,use-dma-rx; 168 atmel,use-dma-rx;
169 atmel,use-dma-tx; 169 atmel,use-dma-tx;
170 status = "disabled"; 170 status = "disabled";
@@ -173,7 +173,7 @@
173 usart3: serial@f8028000 { 173 usart3: serial@f8028000 {
174 compatible = "atmel,at91sam9260-usart"; 174 compatible = "atmel,at91sam9260-usart";
175 reg = <0xf8028000 0x4000>; 175 reg = <0xf8028000 0x4000>;
176 interrupts = <8 4>; 176 interrupts = <8 4 5>;
177 atmel,use-dma-rx; 177 atmel,use-dma-rx;
178 atmel,use-dma-tx; 178 atmel,use-dma-tx;
179 status = "disabled"; 179 status = "disabled";
@@ -201,7 +201,7 @@
201 usb0: ohci@00500000 { 201 usb0: ohci@00500000 {
202 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 202 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
203 reg = <0x00500000 0x00100000>; 203 reg = <0x00500000 0x00100000>;
204 interrupts = <22 4>; 204 interrupts = <22 4 2>;
205 status = "disabled"; 205 status = "disabled";
206 }; 206 };
207 }; 207 };
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 6b3ef4339ae7..4a18c393b136 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -51,10 +51,11 @@
51 ranges; 51 ranges;
52 52
53 aic: interrupt-controller@fffff000 { 53 aic: interrupt-controller@fffff000 {
54 #interrupt-cells = <2>; 54 #interrupt-cells = <3>;
55 compatible = "atmel,at91rm9200-aic"; 55 compatible = "atmel,at91rm9200-aic";
56 interrupt-controller; 56 interrupt-controller;
57 reg = <0xfffff000 0x200>; 57 reg = <0xfffff000 0x200>;
58 atmel,external-irqs = <31>;
58 }; 59 };
59 60
60 ramc0: ramc@ffffe800 { 61 ramc0: ramc@ffffe800 {
@@ -80,37 +81,37 @@
80 pit: timer@fffffe30 { 81 pit: timer@fffffe30 {
81 compatible = "atmel,at91sam9260-pit"; 82 compatible = "atmel,at91sam9260-pit";
82 reg = <0xfffffe30 0xf>; 83 reg = <0xfffffe30 0xf>;
83 interrupts = <1 4>; 84 interrupts = <1 4 7>;
84 }; 85 };
85 86
86 tcb0: timer@f8008000 { 87 tcb0: timer@f8008000 {
87 compatible = "atmel,at91sam9x5-tcb"; 88 compatible = "atmel,at91sam9x5-tcb";
88 reg = <0xf8008000 0x100>; 89 reg = <0xf8008000 0x100>;
89 interrupts = <17 4>; 90 interrupts = <17 4 0>;
90 }; 91 };
91 92
92 tcb1: timer@f800c000 { 93 tcb1: timer@f800c000 {
93 compatible = "atmel,at91sam9x5-tcb"; 94 compatible = "atmel,at91sam9x5-tcb";
94 reg = <0xf800c000 0x100>; 95 reg = <0xf800c000 0x100>;
95 interrupts = <17 4>; 96 interrupts = <17 4 0>;
96 }; 97 };
97 98
98 dma0: dma-controller@ffffec00 { 99 dma0: dma-controller@ffffec00 {
99 compatible = "atmel,at91sam9g45-dma"; 100 compatible = "atmel,at91sam9g45-dma";
100 reg = <0xffffec00 0x200>; 101 reg = <0xffffec00 0x200>;
101 interrupts = <20 4>; 102 interrupts = <20 4 0>;
102 }; 103 };
103 104
104 dma1: dma-controller@ffffee00 { 105 dma1: dma-controller@ffffee00 {
105 compatible = "atmel,at91sam9g45-dma"; 106 compatible = "atmel,at91sam9g45-dma";
106 reg = <0xffffee00 0x200>; 107 reg = <0xffffee00 0x200>;
107 interrupts = <21 4>; 108 interrupts = <21 4 0>;
108 }; 109 };
109 110
110 pioA: gpio@fffff400 { 111 pioA: gpio@fffff400 {
111 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 112 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
112 reg = <0xfffff400 0x100>; 113 reg = <0xfffff400 0x100>;
113 interrupts = <2 4>; 114 interrupts = <2 4 1>;
114 #gpio-cells = <2>; 115 #gpio-cells = <2>;
115 gpio-controller; 116 gpio-controller;
116 interrupt-controller; 117 interrupt-controller;
@@ -119,7 +120,7 @@
119 pioB: gpio@fffff600 { 120 pioB: gpio@fffff600 {
120 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 121 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
121 reg = <0xfffff600 0x100>; 122 reg = <0xfffff600 0x100>;
122 interrupts = <2 4>; 123 interrupts = <2 4 1>;
123 #gpio-cells = <2>; 124 #gpio-cells = <2>;
124 gpio-controller; 125 gpio-controller;
125 interrupt-controller; 126 interrupt-controller;
@@ -128,7 +129,7 @@
128 pioC: gpio@fffff800 { 129 pioC: gpio@fffff800 {
129 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 130 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
130 reg = <0xfffff800 0x100>; 131 reg = <0xfffff800 0x100>;
131 interrupts = <3 4>; 132 interrupts = <3 4 1>;
132 #gpio-cells = <2>; 133 #gpio-cells = <2>;
133 gpio-controller; 134 gpio-controller;
134 interrupt-controller; 135 interrupt-controller;
@@ -137,7 +138,7 @@
137 pioD: gpio@fffffa00 { 138 pioD: gpio@fffffa00 {
138 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 139 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
139 reg = <0xfffffa00 0x100>; 140 reg = <0xfffffa00 0x100>;
140 interrupts = <3 4>; 141 interrupts = <3 4 1>;
141 #gpio-cells = <2>; 142 #gpio-cells = <2>;
142 gpio-controller; 143 gpio-controller;
143 interrupt-controller; 144 interrupt-controller;
@@ -146,14 +147,14 @@
146 dbgu: serial@fffff200 { 147 dbgu: serial@fffff200 {
147 compatible = "atmel,at91sam9260-usart"; 148 compatible = "atmel,at91sam9260-usart";
148 reg = <0xfffff200 0x200>; 149 reg = <0xfffff200 0x200>;
149 interrupts = <1 4>; 150 interrupts = <1 4 7>;
150 status = "disabled"; 151 status = "disabled";
151 }; 152 };
152 153
153 usart0: serial@f801c000 { 154 usart0: serial@f801c000 {
154 compatible = "atmel,at91sam9260-usart"; 155 compatible = "atmel,at91sam9260-usart";
155 reg = <0xf801c000 0x200>; 156 reg = <0xf801c000 0x200>;
156 interrupts = <5 4>; 157 interrupts = <5 4 5>;
157 atmel,use-dma-rx; 158 atmel,use-dma-rx;
158 atmel,use-dma-tx; 159 atmel,use-dma-tx;
159 status = "disabled"; 160 status = "disabled";
@@ -162,7 +163,7 @@
162 usart1: serial@f8020000 { 163 usart1: serial@f8020000 {
163 compatible = "atmel,at91sam9260-usart"; 164 compatible = "atmel,at91sam9260-usart";
164 reg = <0xf8020000 0x200>; 165 reg = <0xf8020000 0x200>;
165 interrupts = <6 4>; 166 interrupts = <6 4 5>;
166 atmel,use-dma-rx; 167 atmel,use-dma-rx;
167 atmel,use-dma-tx; 168 atmel,use-dma-tx;
168 status = "disabled"; 169 status = "disabled";
@@ -171,7 +172,7 @@
171 usart2: serial@f8024000 { 172 usart2: serial@f8024000 {
172 compatible = "atmel,at91sam9260-usart"; 173 compatible = "atmel,at91sam9260-usart";
173 reg = <0xf8024000 0x200>; 174 reg = <0xf8024000 0x200>;
174 interrupts = <7 4>; 175 interrupts = <7 4 5>;
175 atmel,use-dma-rx; 176 atmel,use-dma-rx;
176 atmel,use-dma-tx; 177 atmel,use-dma-tx;
177 status = "disabled"; 178 status = "disabled";
@@ -180,21 +181,21 @@
180 macb0: ethernet@f802c000 { 181 macb0: ethernet@f802c000 {
181 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 182 compatible = "cdns,at32ap7000-macb", "cdns,macb";
182 reg = <0xf802c000 0x100>; 183 reg = <0xf802c000 0x100>;
183 interrupts = <24 4>; 184 interrupts = <24 4 3>;
184 status = "disabled"; 185 status = "disabled";
185 }; 186 };
186 187
187 macb1: ethernet@f8030000 { 188 macb1: ethernet@f8030000 {
188 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 189 compatible = "cdns,at32ap7000-macb", "cdns,macb";
189 reg = <0xf8030000 0x100>; 190 reg = <0xf8030000 0x100>;
190 interrupts = <27 4>; 191 interrupts = <27 4 3>;
191 status = "disabled"; 192 status = "disabled";
192 }; 193 };
193 194
194 adc0: adc@f804c000 { 195 adc0: adc@f804c000 {
195 compatible = "atmel,at91sam9260-adc"; 196 compatible = "atmel,at91sam9260-adc";
196 reg = <0xf804c000 0x100>; 197 reg = <0xf804c000 0x100>;
197 interrupts = <19 4>; 198 interrupts = <19 4 0>;
198 atmel,adc-use-external; 199 atmel,adc-use-external;
199 atmel,adc-channels-used = <0xffff>; 200 atmel,adc-channels-used = <0xffff>;
200 atmel,adc-vref = <3300>; 201 atmel,adc-vref = <3300>;
@@ -248,14 +249,14 @@
248 usb0: ohci@00600000 { 249 usb0: ohci@00600000 {
249 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 250 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
250 reg = <0x00600000 0x100000>; 251 reg = <0x00600000 0x100000>;
251 interrupts = <22 4>; 252 interrupts = <22 4 2>;
252 status = "disabled"; 253 status = "disabled";
253 }; 254 };
254 255
255 usb1: ehci@00700000 { 256 usb1: ehci@00700000 {
256 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 257 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
257 reg = <0x00700000 0x100000>; 258 reg = <0x00700000 0x100000>;
258 interrupts = <22 4>; 259 interrupts = <22 4 2>;
259 status = "disabled"; 260 status = "disabled";
260 }; 261 };
261 }; 262 };
diff --git a/arch/arm/boot/dts/db8500.dtsi b/arch/arm/boot/dts/db8500.dtsi
index 4ad5160018cb..3180a9c588b9 100644
--- a/arch/arm/boot/dts/db8500.dtsi
+++ b/arch/arm/boot/dts/db8500.dtsi
@@ -48,7 +48,7 @@
48 }; 48 };
49 49
50 rtc@80154000 { 50 rtc@80154000 {
51 compatible = "stericsson,db8500-rtc"; 51 compatible = "arm,rtc-pl031", "arm,primecell";
52 reg = <0x80154000 0x1000>; 52 reg = <0x80154000 0x1000>;
53 interrupts = <0 18 0x4>; 53 interrupts = <0 18 0x4>;
54 }; 54 };
@@ -60,7 +60,7 @@
60 interrupts = <0 119 0x4>; 60 interrupts = <0 119 0x4>;
61 interrupt-controller; 61 interrupt-controller;
62 #interrupt-cells = <2>; 62 #interrupt-cells = <2>;
63 supports-sleepmode; 63 st,supports-sleepmode;
64 gpio-controller; 64 gpio-controller;
65 #gpio-cells = <2>; 65 #gpio-cells = <2>;
66 gpio-bank = <0>; 66 gpio-bank = <0>;
@@ -73,7 +73,7 @@
73 interrupts = <0 120 0x4>; 73 interrupts = <0 120 0x4>;
74 interrupt-controller; 74 interrupt-controller;
75 #interrupt-cells = <2>; 75 #interrupt-cells = <2>;
76 supports-sleepmode; 76 st,supports-sleepmode;
77 gpio-controller; 77 gpio-controller;
78 #gpio-cells = <2>; 78 #gpio-cells = <2>;
79 gpio-bank = <1>; 79 gpio-bank = <1>;
@@ -86,7 +86,7 @@
86 interrupts = <0 121 0x4>; 86 interrupts = <0 121 0x4>;
87 interrupt-controller; 87 interrupt-controller;
88 #interrupt-cells = <2>; 88 #interrupt-cells = <2>;
89 supports-sleepmode; 89 st,supports-sleepmode;
90 gpio-controller; 90 gpio-controller;
91 #gpio-cells = <2>; 91 #gpio-cells = <2>;
92 gpio-bank = <2>; 92 gpio-bank = <2>;
@@ -99,7 +99,7 @@
99 interrupts = <0 122 0x4>; 99 interrupts = <0 122 0x4>;
100 interrupt-controller; 100 interrupt-controller;
101 #interrupt-cells = <2>; 101 #interrupt-cells = <2>;
102 supports-sleepmode; 102 st,supports-sleepmode;
103 gpio-controller; 103 gpio-controller;
104 #gpio-cells = <2>; 104 #gpio-cells = <2>;
105 gpio-bank = <3>; 105 gpio-bank = <3>;
@@ -112,7 +112,7 @@
112 interrupts = <0 123 0x4>; 112 interrupts = <0 123 0x4>;
113 interrupt-controller; 113 interrupt-controller;
114 #interrupt-cells = <2>; 114 #interrupt-cells = <2>;
115 supports-sleepmode; 115 st,supports-sleepmode;
116 gpio-controller; 116 gpio-controller;
117 #gpio-cells = <2>; 117 #gpio-cells = <2>;
118 gpio-bank = <4>; 118 gpio-bank = <4>;
@@ -125,7 +125,7 @@
125 interrupts = <0 124 0x4>; 125 interrupts = <0 124 0x4>;
126 interrupt-controller; 126 interrupt-controller;
127 #interrupt-cells = <2>; 127 #interrupt-cells = <2>;
128 supports-sleepmode; 128 st,supports-sleepmode;
129 gpio-controller; 129 gpio-controller;
130 #gpio-cells = <2>; 130 #gpio-cells = <2>;
131 gpio-bank = <5>; 131 gpio-bank = <5>;
@@ -138,7 +138,7 @@
138 interrupts = <0 125 0x4>; 138 interrupts = <0 125 0x4>;
139 interrupt-controller; 139 interrupt-controller;
140 #interrupt-cells = <2>; 140 #interrupt-cells = <2>;
141 supports-sleepmode; 141 st,supports-sleepmode;
142 gpio-controller; 142 gpio-controller;
143 #gpio-cells = <2>; 143 #gpio-cells = <2>;
144 gpio-bank = <6>; 144 gpio-bank = <6>;
@@ -151,7 +151,7 @@
151 interrupts = <0 126 0x4>; 151 interrupts = <0 126 0x4>;
152 interrupt-controller; 152 interrupt-controller;
153 #interrupt-cells = <2>; 153 #interrupt-cells = <2>;
154 supports-sleepmode; 154 st,supports-sleepmode;
155 gpio-controller; 155 gpio-controller;
156 #gpio-cells = <2>; 156 #gpio-cells = <2>;
157 gpio-bank = <7>; 157 gpio-bank = <7>;
@@ -164,7 +164,7 @@
164 interrupts = <0 127 0x4>; 164 interrupts = <0 127 0x4>;
165 interrupt-controller; 165 interrupt-controller;
166 #interrupt-cells = <2>; 166 #interrupt-cells = <2>;
167 supports-sleepmode; 167 st,supports-sleepmode;
168 gpio-controller; 168 gpio-controller;
169 #gpio-cells = <2>; 169 #gpio-cells = <2>;
170 gpio-bank = <8>; 170 gpio-bank = <8>;
@@ -206,62 +206,74 @@
206 206
207 // DB8500_REGULATOR_VAPE 207 // DB8500_REGULATOR_VAPE
208 db8500_vape_reg: db8500_vape { 208 db8500_vape_reg: db8500_vape {
209 regulator-compatible = "db8500_vape";
209 regulator-name = "db8500-vape"; 210 regulator-name = "db8500-vape";
210 regulator-always-on; 211 regulator-always-on;
211 }; 212 };
212 213
213 // DB8500_REGULATOR_VARM 214 // DB8500_REGULATOR_VARM
214 db8500_varm_reg: db8500_varm { 215 db8500_varm_reg: db8500_varm {
216 regulator-compatible = "db8500_varm";
215 regulator-name = "db8500-varm"; 217 regulator-name = "db8500-varm";
216 }; 218 };
217 219
218 // DB8500_REGULATOR_VMODEM 220 // DB8500_REGULATOR_VMODEM
219 db8500_vmodem_reg: db8500_vmodem { 221 db8500_vmodem_reg: db8500_vmodem {
222 regulator-compatible = "db8500_vmodem";
220 regulator-name = "db8500-vmodem"; 223 regulator-name = "db8500-vmodem";
221 }; 224 };
222 225
223 // DB8500_REGULATOR_VPLL 226 // DB8500_REGULATOR_VPLL
224 db8500_vpll_reg: db8500_vpll { 227 db8500_vpll_reg: db8500_vpll {
228 regulator-compatible = "db8500_vpll";
225 regulator-name = "db8500-vpll"; 229 regulator-name = "db8500-vpll";
226 }; 230 };
227 231
228 // DB8500_REGULATOR_VSMPS1 232 // DB8500_REGULATOR_VSMPS1
229 db8500_vsmps1_reg: db8500_vsmps1 { 233 db8500_vsmps1_reg: db8500_vsmps1 {
234 regulator-compatible = "db8500_vsmps1";
230 regulator-name = "db8500-vsmps1"; 235 regulator-name = "db8500-vsmps1";
231 }; 236 };
232 237
233 // DB8500_REGULATOR_VSMPS2 238 // DB8500_REGULATOR_VSMPS2
234 db8500_vsmps2_reg: db8500_vsmps2 { 239 db8500_vsmps2_reg: db8500_vsmps2 {
240 regulator-compatible = "db8500_vsmps2";
235 regulator-name = "db8500-vsmps2"; 241 regulator-name = "db8500-vsmps2";
236 }; 242 };
237 243
238 // DB8500_REGULATOR_VSMPS3 244 // DB8500_REGULATOR_VSMPS3
239 db8500_vsmps3_reg: db8500_vsmps3 { 245 db8500_vsmps3_reg: db8500_vsmps3 {
246 regulator-compatible = "db8500_vsmps3";
240 regulator-name = "db8500-vsmps3"; 247 regulator-name = "db8500-vsmps3";
241 }; 248 };
242 249
243 // DB8500_REGULATOR_VRF1 250 // DB8500_REGULATOR_VRF1
244 db8500_vrf1_reg: db8500_vrf1 { 251 db8500_vrf1_reg: db8500_vrf1 {
252 regulator-compatible = "db8500_vrf1";
245 regulator-name = "db8500-vrf1"; 253 regulator-name = "db8500-vrf1";
246 }; 254 };
247 255
248 // DB8500_REGULATOR_SWITCH_SVAMMDSP 256 // DB8500_REGULATOR_SWITCH_SVAMMDSP
249 db8500_sva_mmdsp_reg: db8500_sva_mmdsp { 257 db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
258 regulator-compatible = "db8500_sva_mmdsp";
250 regulator-name = "db8500-sva-mmdsp"; 259 regulator-name = "db8500-sva-mmdsp";
251 }; 260 };
252 261
253 // DB8500_REGULATOR_SWITCH_SVAMMDSPRET 262 // DB8500_REGULATOR_SWITCH_SVAMMDSPRET
254 db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret { 263 db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
264 regulator-compatible = "db8500_sva_mmdsp_ret";
255 regulator-name = "db8500-sva-mmdsp-ret"; 265 regulator-name = "db8500-sva-mmdsp-ret";
256 }; 266 };
257 267
258 // DB8500_REGULATOR_SWITCH_SVAPIPE 268 // DB8500_REGULATOR_SWITCH_SVAPIPE
259 db8500_sva_pipe_reg: db8500_sva_pipe { 269 db8500_sva_pipe_reg: db8500_sva_pipe {
270 regulator-compatible = "db8500_sva_pipe";
260 regulator-name = "db8500_sva_pipe"; 271 regulator-name = "db8500_sva_pipe";
261 }; 272 };
262 273
263 // DB8500_REGULATOR_SWITCH_SIAMMDSP 274 // DB8500_REGULATOR_SWITCH_SIAMMDSP
264 db8500_sia_mmdsp_reg: db8500_sia_mmdsp { 275 db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
276 regulator-compatible = "db8500_sia_mmdsp";
265 regulator-name = "db8500_sia_mmdsp"; 277 regulator-name = "db8500_sia_mmdsp";
266 }; 278 };
267 279
@@ -272,38 +284,45 @@
272 284
273 // DB8500_REGULATOR_SWITCH_SIAPIPE 285 // DB8500_REGULATOR_SWITCH_SIAPIPE
274 db8500_sia_pipe_reg: db8500_sia_pipe { 286 db8500_sia_pipe_reg: db8500_sia_pipe {
287 regulator-compatible = "db8500_sia_pipe";
275 regulator-name = "db8500-sia-pipe"; 288 regulator-name = "db8500-sia-pipe";
276 }; 289 };
277 290
278 // DB8500_REGULATOR_SWITCH_SGA 291 // DB8500_REGULATOR_SWITCH_SGA
279 db8500_sga_reg: db8500_sga { 292 db8500_sga_reg: db8500_sga {
293 regulator-compatible = "db8500_sga";
280 regulator-name = "db8500-sga"; 294 regulator-name = "db8500-sga";
281 vin-supply = <&db8500_vape_reg>; 295 vin-supply = <&db8500_vape_reg>;
282 }; 296 };
283 297
284 // DB8500_REGULATOR_SWITCH_B2R2_MCDE 298 // DB8500_REGULATOR_SWITCH_B2R2_MCDE
285 db8500_b2r2_mcde_reg: db8500_b2r2_mcde { 299 db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
300 regulator-compatible = "db8500_b2r2_mcde";
286 regulator-name = "db8500-b2r2-mcde"; 301 regulator-name = "db8500-b2r2-mcde";
287 vin-supply = <&db8500_vape_reg>; 302 vin-supply = <&db8500_vape_reg>;
288 }; 303 };
289 304
290 // DB8500_REGULATOR_SWITCH_ESRAM12 305 // DB8500_REGULATOR_SWITCH_ESRAM12
291 db8500_esram12_reg: db8500_esram12 { 306 db8500_esram12_reg: db8500_esram12 {
307 regulator-compatible = "db8500_esram12";
292 regulator-name = "db8500-esram12"; 308 regulator-name = "db8500-esram12";
293 }; 309 };
294 310
295 // DB8500_REGULATOR_SWITCH_ESRAM12RET 311 // DB8500_REGULATOR_SWITCH_ESRAM12RET
296 db8500_esram12_ret_reg: db8500_esram12_ret { 312 db8500_esram12_ret_reg: db8500_esram12_ret {
313 regulator-compatible = "db8500_esram12_ret";
297 regulator-name = "db8500-esram12-ret"; 314 regulator-name = "db8500-esram12-ret";
298 }; 315 };
299 316
300 // DB8500_REGULATOR_SWITCH_ESRAM34 317 // DB8500_REGULATOR_SWITCH_ESRAM34
301 db8500_esram34_reg: db8500_esram34 { 318 db8500_esram34_reg: db8500_esram34 {
319 regulator-compatible = "db8500_esram34";
302 regulator-name = "db8500-esram34"; 320 regulator-name = "db8500-esram34";
303 }; 321 };
304 322
305 // DB8500_REGULATOR_SWITCH_ESRAM34RET 323 // DB8500_REGULATOR_SWITCH_ESRAM34RET
306 db8500_esram34_ret_reg: db8500_esram34_ret { 324 db8500_esram34_ret_reg: db8500_esram34_ret {
325 regulator-compatible = "db8500_esram34_ret";
307 regulator-name = "db8500-esram34-ret"; 326 regulator-name = "db8500-esram34-ret";
308 }; 327 };
309 }; 328 };
@@ -312,12 +331,70 @@
312 compatible = "stericsson,ab8500"; 331 compatible = "stericsson,ab8500";
313 reg = <5>; /* mailbox 5 is i2c */ 332 reg = <5>; /* mailbox 5 is i2c */
314 interrupts = <0 40 0x4>; 333 interrupts = <0 40 0x4>;
334 interrupt-controller;
335 #interrupt-cells = <2>;
336
337 ab8500-rtc {
338 compatible = "stericsson,ab8500-rtc";
339 interrupts = <17 0x4
340 18 0x4>;
341 interrupt-names = "60S", "ALARM";
342 };
343
344 ab8500-gpadc {
345 compatible = "stericsson,ab8500-gpadc";
346 interrupts = <32 0x4
347 39 0x4>;
348 interrupt-names = "HW_CONV_END", "SW_CONV_END";
349 vddadc-supply = <&ab8500_ldo_tvout_reg>;
350 };
351
352 ab8500-usb {
353 compatible = "stericsson,ab8500-usb";
354 interrupts = < 90 0x4
355 96 0x4
356 14 0x4
357 15 0x4
358 79 0x4
359 74 0x4
360 75 0x4>;
361 interrupt-names = "ID_WAKEUP_R",
362 "ID_WAKEUP_F",
363 "VBUS_DET_F",
364 "VBUS_DET_R",
365 "USB_LINK_STATUS",
366 "USB_ADP_PROBE_PLUG",
367 "USB_ADP_PROBE_UNPLUG";
368 vddulpivio18-supply = <&ab8500_ldo_initcore_reg>;
369 v-ape-supply = <&db8500_vape_reg>;
370 musb_1v8-supply = <&db8500_vsmps2_reg>;
371 };
372
373 ab8500-ponkey {
374 compatible = "stericsson,ab8500-ponkey";
375 interrupts = <6 0x4
376 7 0x4>;
377 interrupt-names = "ONKEY_DBF", "ONKEY_DBR";
378 };
379
380 ab8500-sysctrl {
381 compatible = "stericsson,ab8500-sysctrl";
382 };
383
384 ab8500-pwm {
385 compatible = "stericsson,ab8500-pwm";
386 };
387
388 ab8500-debugfs {
389 compatible = "stericsson,ab8500-debug";
390 };
315 391
316 ab8500-regulators { 392 ab8500-regulators {
317 compatible = "stericsson,ab8500-regulator"; 393 compatible = "stericsson,ab8500-regulator";
318 394
319 // supplies to the display/camera 395 // supplies to the display/camera
320 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { 396 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
397 regulator-compatible = "ab8500_ldo_aux1";
321 regulator-name = "V-DISPLAY"; 398 regulator-name = "V-DISPLAY";
322 regulator-min-microvolt = <2500000>; 399 regulator-min-microvolt = <2500000>;
323 regulator-max-microvolt = <2900000>; 400 regulator-max-microvolt = <2900000>;
@@ -328,6 +405,7 @@
328 405
329 // supplies to the on-board eMMC 406 // supplies to the on-board eMMC
330 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { 407 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
408 regulator-compatible = "ab8500_ldo_aux2";
331 regulator-name = "V-eMMC1"; 409 regulator-name = "V-eMMC1";
332 regulator-min-microvolt = <1100000>; 410 regulator-min-microvolt = <1100000>;
333 regulator-max-microvolt = <3300000>; 411 regulator-max-microvolt = <3300000>;
@@ -335,6 +413,7 @@
335 413
336 // supply for VAUX3; SDcard slots 414 // supply for VAUX3; SDcard slots
337 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { 415 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
416 regulator-compatible = "ab8500_ldo_aux3";
338 regulator-name = "V-MMC-SD"; 417 regulator-name = "V-MMC-SD";
339 regulator-min-microvolt = <1100000>; 418 regulator-min-microvolt = <1100000>;
340 regulator-max-microvolt = <3300000>; 419 regulator-max-microvolt = <3300000>;
@@ -342,41 +421,49 @@
342 421
343 // supply for v-intcore12; VINTCORE12 LDO 422 // supply for v-intcore12; VINTCORE12 LDO
344 ab8500_ldo_initcore_reg: ab8500_ldo_initcore { 423 ab8500_ldo_initcore_reg: ab8500_ldo_initcore {
424 regulator-compatible = "ab8500_ldo_initcore";
345 regulator-name = "V-INTCORE"; 425 regulator-name = "V-INTCORE";
346 }; 426 };
347 427
348 // supply for tvout; gpadc; TVOUT LDO 428 // supply for tvout; gpadc; TVOUT LDO
349 ab8500_ldo_tvout_reg: ab8500_ldo_tvout { 429 ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
430 regulator-compatible = "ab8500_ldo_tvout";
350 regulator-name = "V-TVOUT"; 431 regulator-name = "V-TVOUT";
351 }; 432 };
352 433
353 // supply for ab8500-usb; USB LDO 434 // supply for ab8500-usb; USB LDO
354 ab8500_ldo_usb_reg: ab8500_ldo_usb { 435 ab8500_ldo_usb_reg: ab8500_ldo_usb {
436 regulator-compatible = "ab8500_ldo_usb";
355 regulator-name = "dummy"; 437 regulator-name = "dummy";
356 }; 438 };
357 439
358 // supply for ab8500-vaudio; VAUDIO LDO 440 // supply for ab8500-vaudio; VAUDIO LDO
359 ab8500_ldo_audio_reg: ab8500_ldo_audio { 441 ab8500_ldo_audio_reg: ab8500_ldo_audio {
442 regulator-compatible = "ab8500_ldo_audio";
360 regulator-name = "V-AUD"; 443 regulator-name = "V-AUD";
361 }; 444 };
362 445
363 // supply for v-anamic1 VAMic1-LDO 446 // supply for v-anamic1 VAMic1-LDO
364 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { 447 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
448 regulator-compatible = "ab8500_ldo_anamic1";
365 regulator-name = "V-AMIC1"; 449 regulator-name = "V-AMIC1";
366 }; 450 };
367 451
368 // supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1 452 // supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1
369 ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 { 453 ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 {
454 regulator-compatible = "ab8500_ldo_amamic2";
370 regulator-name = "V-AMIC2"; 455 regulator-name = "V-AMIC2";
371 }; 456 };
372 457
373 // supply for v-dmic; VDMIC LDO 458 // supply for v-dmic; VDMIC LDO
374 ab8500_ldo_dmic_reg: ab8500_ldo_dmic { 459 ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
460 regulator-compatible = "ab8500_ldo_dmic";
375 regulator-name = "V-DMIC"; 461 regulator-name = "V-DMIC";
376 }; 462 };
377 463
378 // supply for U8500 CSI/DSI; VANA LDO 464 // supply for U8500 CSI/DSI; VANA LDO
379 ab8500_ldo_ana_reg: ab8500_ldo_ana { 465 ab8500_ldo_ana_reg: ab8500_ldo_ana {
466 regulator-compatible = "ab8500_ldo_ana";
380 regulator-name = "V-CSI/DSI"; 467 regulator-name = "V-CSI/DSI";
381 }; 468 };
382 }; 469 };
diff --git a/arch/arm/boot/dts/ea3250.dts b/arch/arm/boot/dts/ea3250.dts
new file mode 100644
index 000000000000..d79b28d9c963
--- /dev/null
+++ b/arch/arm/boot/dts/ea3250.dts
@@ -0,0 +1,174 @@
1/*
2 * Embedded Artists LPC3250 board
3 *
4 * Copyright 2012 Roland Stigge <stigge@antcom.de>
5 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/dts-v1/;
15/include/ "lpc32xx.dtsi"
16
17/ {
18 model = "Embedded Artists LPC3250 board based on NXP LPC3250";
19 compatible = "ea,ea3250", "nxp,lpc3250";
20 #address-cells = <1>;
21 #size-cells = <1>;
22
23 memory {
24 device_type = "memory";
25 reg = <0 0x4000000>;
26 };
27
28 ahb {
29 mac: ethernet@31060000 {
30 phy-mode = "rmii";
31 use-iram;
32 };
33
34 /* Here, choose exactly one from: ohci, usbd */
35 ohci@31020000 {
36 transceiver = <&isp1301>;
37 status = "okay";
38 };
39
40/*
41 usbd@31020000 {
42 transceiver = <&isp1301>;
43 status = "okay";
44 };
45*/
46
47 /* 128MB Flash via SLC NAND controller */
48 slc: flash@20020000 {
49 status = "okay";
50 #address-cells = <1>;
51 #size-cells = <1>;
52
53 nxp,wdr-clks = <14>;
54 nxp,wwidth = <260000000>;
55 nxp,whold = <104000000>;
56 nxp,wsetup = <200000000>;
57 nxp,rdr-clks = <14>;
58 nxp,rwidth = <34666666>;
59 nxp,rhold = <104000000>;
60 nxp,rsetup = <200000000>;
61 nand-on-flash-bbt;
62 gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
63
64 mtd0@00000000 {
65 label = "ea3250-boot";
66 reg = <0x00000000 0x00080000>;
67 read-only;
68 };
69
70 mtd1@00080000 {
71 label = "ea3250-uboot";
72 reg = <0x00080000 0x000c0000>;
73 read-only;
74 };
75
76 mtd2@00140000 {
77 label = "ea3250-kernel";
78 reg = <0x00140000 0x00400000>;
79 };
80
81 mtd3@00540000 {
82 label = "ea3250-rootfs";
83 reg = <0x00540000 0x07ac0000>;
84 };
85 };
86
87 apb {
88 uart5: serial@40090000 {
89 status = "okay";
90 };
91
92 uart3: serial@40080000 {
93 status = "okay";
94 };
95
96 uart6: serial@40098000 {
97 status = "okay";
98 };
99
100 i2c1: i2c@400A0000 {
101 clock-frequency = <100000>;
102
103 eeprom@50 {
104 compatible = "at,24c256";
105 reg = <0x50>;
106 };
107
108 eeprom@57 {
109 compatible = "at,24c64";
110 reg = <0x57>;
111 };
112
113 uda1380: uda1380@18 {
114 compatible = "nxp,uda1380";
115 reg = <0x18>;
116 power-gpio = <&gpio 0x59 0>;
117 reset-gpio = <&gpio 0x51 0>;
118 dac-clk = "wspll";
119 };
120
121 pca9532: pca9532@60 {
122 compatible = "nxp,pca9532";
123 gpio-controller;
124 #gpio-cells = <2>;
125 reg = <0x60>;
126 };
127 };
128
129 i2c2: i2c@400A8000 {
130 clock-frequency = <100000>;
131 };
132
133 i2cusb: i2c@31020300 {
134 clock-frequency = <100000>;
135
136 isp1301: usb-transceiver@2d {
137 compatible = "nxp,isp1301";
138 reg = <0x2d>;
139 };
140 };
141
142 sd@20098000 {
143 wp-gpios = <&pca9532 5 0>;
144 cd-gpios = <&pca9532 4 0>;
145 cd-inverted;
146 bus-width = <4>;
147 status = "okay";
148 };
149 };
150
151 fab {
152 uart1: serial@40014000 {
153 status = "okay";
154 };
155
156 /* 3-axis accelerometer X,Y,Z (or AD-IN instead of Z) */
157 adc@40048000 {
158 status = "okay";
159 };
160 };
161 };
162
163 gpio_keys {
164 compatible = "gpio-keys";
165 #address-cells = <1>;
166 #size-cells = <0>;
167 autorepeat;
168 button@21 {
169 label = "GPIO Key UP";
170 linux,code = <103>;
171 gpios = <&gpio 4 1 0>; /* GPI_P3 1 */
172 };
173 };
174};
diff --git a/arch/arm/boot/dts/evk-pro3.dts b/arch/arm/boot/dts/evk-pro3.dts
new file mode 100644
index 000000000000..b7354e6506de
--- /dev/null
+++ b/arch/arm/boot/dts/evk-pro3.dts
@@ -0,0 +1,41 @@
1/*
2 * evk-pro3.dts - Device Tree file for Telit EVK-PRO3 with Telit GE863-PRO3
3 *
4 * Copyright (C) 2012 Telit,
5 * 2012 Fabio Porcedda <fabio.porcedda@gmail.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9
10/dts-v1/;
11
12/include/ "ge863-pro3.dtsi"
13
14/ {
15 model = "Telit EVK-PRO3 for Telit GE863-PRO3";
16 compatible = "telit,evk-pro3", "atmel,at91sam9260", "atmel,at91sam9";
17
18 ahb {
19 apb {
20 macb0: ethernet@fffc4000 {
21 phy-mode = "rmii";
22 status = "okay";
23 };
24
25 usb1: gadget@fffa4000 {
26 atmel,vbus-gpio = <&pioC 5 0>;
27 status = "okay";
28 };
29 };
30
31 usb0: ohci@00500000 {
32 num-ports = <2>;
33 status = "okay";
34 };
35 };
36
37 i2c@0 {
38 status = "okay";
39 };
40
41}; \ No newline at end of file
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index b8c476384eef..0c49caa09978 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -134,4 +134,16 @@
134 i2c@138D0000 { 134 i2c@138D0000 {
135 status = "disabled"; 135 status = "disabled";
136 }; 136 };
137
138 spi_0: spi@13920000 {
139 status = "disabled";
140 };
141
142 spi_1: spi@13930000 {
143 status = "disabled";
144 };
145
146 spi_2: spi@13940000 {
147 status = "disabled";
148 };
137}; 149};
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index 27afc8e535ca..1beccc8f14ff 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -179,4 +179,42 @@
179 i2c@138D0000 { 179 i2c@138D0000 {
180 status = "disabled"; 180 status = "disabled";
181 }; 181 };
182
183 spi_0: spi@13920000 {
184 status = "disabled";
185 };
186
187 spi_1: spi@13930000 {
188 status = "disabled";
189 };
190
191 spi_2: spi@13940000 {
192 gpios = <&gpc1 1 5 3 0>,
193 <&gpc1 3 5 3 0>,
194 <&gpc1 4 5 3 0>;
195
196 w25x80@0 {
197 #address-cells = <1>;
198 #size-cells = <1>;
199 compatible = "w25x80";
200 reg = <0>;
201 spi-max-frequency = <1000000>;
202
203 controller-data {
204 cs-gpio = <&gpc1 2 1 0 3>;
205 samsung,spi-feedback-delay = <0>;
206 };
207
208 partition@0 {
209 label = "U-Boot";
210 reg = <0x0 0x40000>;
211 read-only;
212 };
213
214 partition@40000 {
215 label = "Kernel";
216 reg = <0x40000 0xc0000>;
217 };
218 };
219 };
182}; 220};
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index a1dd2ee83753..02891fe876e4 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -25,6 +25,12 @@
25 compatible = "samsung,exynos4210"; 25 compatible = "samsung,exynos4210";
26 interrupt-parent = <&gic>; 26 interrupt-parent = <&gic>;
27 27
28 aliases {
29 spi0 = &spi_0;
30 spi1 = &spi_1;
31 spi2 = &spi_2;
32 };
33
28 gic:interrupt-controller@10490000 { 34 gic:interrupt-controller@10490000 {
29 compatible = "arm,cortex-a9-gic"; 35 compatible = "arm,cortex-a9-gic";
30 #interrupt-cells = <3>; 36 #interrupt-cells = <3>;
@@ -33,6 +39,17 @@
33 reg = <0x10490000 0x1000>, <0x10480000 0x100>; 39 reg = <0x10490000 0x1000>, <0x10480000 0x100>;
34 }; 40 };
35 41
42 combiner:interrupt-controller@10440000 {
43 compatible = "samsung,exynos4210-combiner";
44 #interrupt-cells = <2>;
45 interrupt-controller;
46 reg = <0x10440000 0x1000>;
47 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
48 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
49 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
50 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
51 };
52
36 watchdog@10060000 { 53 watchdog@10060000 {
37 compatible = "samsung,s3c2410-wdt"; 54 compatible = "samsung,s3c2410-wdt";
38 reg = <0x10060000 0x100>; 55 reg = <0x10060000 0x100>;
@@ -147,6 +164,36 @@
147 interrupts = <0 65 0>; 164 interrupts = <0 65 0>;
148 }; 165 };
149 166
167 spi_0: spi@13920000 {
168 compatible = "samsung,exynos4210-spi";
169 reg = <0x13920000 0x100>;
170 interrupts = <0 66 0>;
171 tx-dma-channel = <&pdma0 7>; /* preliminary */
172 rx-dma-channel = <&pdma0 6>; /* preliminary */
173 #address-cells = <1>;
174 #size-cells = <0>;
175 };
176
177 spi_1: spi@13930000 {
178 compatible = "samsung,exynos4210-spi";
179 reg = <0x13930000 0x100>;
180 interrupts = <0 67 0>;
181 tx-dma-channel = <&pdma1 7>; /* preliminary */
182 rx-dma-channel = <&pdma1 6>; /* preliminary */
183 #address-cells = <1>;
184 #size-cells = <0>;
185 };
186
187 spi_2: spi@13940000 {
188 compatible = "samsung,exynos4210-spi";
189 reg = <0x13940000 0x100>;
190 interrupts = <0 68 0>;
191 tx-dma-channel = <&pdma0 9>; /* preliminary */
192 rx-dma-channel = <&pdma0 8>; /* preliminary */
193 #address-cells = <1>;
194 #size-cells = <0>;
195 };
196
150 amba { 197 amba {
151 #address-cells = <1>; 198 #address-cells = <1>;
152 #size-cells = <1>; 199 #size-cells = <1>;
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 49945cc1bc7d..8a5e348793c7 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -71,4 +71,42 @@
71 i2c@12CD0000 { 71 i2c@12CD0000 {
72 status = "disabled"; 72 status = "disabled";
73 }; 73 };
74
75 spi_0: spi@12d20000 {
76 status = "disabled";
77 };
78
79 spi_1: spi@12d30000 {
80 gpios = <&gpa2 4 2 3 0>,
81 <&gpa2 6 2 3 0>,
82 <&gpa2 7 2 3 0>;
83
84 w25q80bw@0 {
85 #address-cells = <1>;
86 #size-cells = <1>;
87 compatible = "w25x80";
88 reg = <0>;
89 spi-max-frequency = <1000000>;
90
91 controller-data {
92 cs-gpio = <&gpa2 5 1 0 3>;
93 samsung,spi-feedback-delay = <0>;
94 };
95
96 partition@0 {
97 label = "U-Boot";
98 reg = <0x0 0x40000>;
99 read-only;
100 };
101
102 partition@40000 {
103 label = "Kernel";
104 reg = <0x40000 0xc0000>;
105 };
106 };
107 };
108
109 spi_2: spi@12d40000 {
110 status = "disabled";
111 };
74}; 112};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 4272b2949228..004aaa8d123c 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -23,6 +23,12 @@
23 compatible = "samsung,exynos5250"; 23 compatible = "samsung,exynos5250";
24 interrupt-parent = <&gic>; 24 interrupt-parent = <&gic>;
25 25
26 aliases {
27 spi0 = &spi_0;
28 spi1 = &spi_1;
29 spi2 = &spi_2;
30 };
31
26 gic:interrupt-controller@10481000 { 32 gic:interrupt-controller@10481000 {
27 compatible = "arm,cortex-a9-gic"; 33 compatible = "arm,cortex-a9-gic";
28 #interrupt-cells = <3>; 34 #interrupt-cells = <3>;
@@ -146,6 +152,36 @@
146 #size-cells = <0>; 152 #size-cells = <0>;
147 }; 153 };
148 154
155 spi_0: spi@12d20000 {
156 compatible = "samsung,exynos4210-spi";
157 reg = <0x12d20000 0x100>;
158 interrupts = <0 66 0>;
159 tx-dma-channel = <&pdma0 5>; /* preliminary */
160 rx-dma-channel = <&pdma0 4>; /* preliminary */
161 #address-cells = <1>;
162 #size-cells = <0>;
163 };
164
165 spi_1: spi@12d30000 {
166 compatible = "samsung,exynos4210-spi";
167 reg = <0x12d30000 0x100>;
168 interrupts = <0 67 0>;
169 tx-dma-channel = <&pdma1 5>; /* preliminary */
170 rx-dma-channel = <&pdma1 4>; /* preliminary */
171 #address-cells = <1>;
172 #size-cells = <0>;
173 };
174
175 spi_2: spi@12d40000 {
176 compatible = "samsung,exynos4210-spi";
177 reg = <0x12d40000 0x100>;
178 interrupts = <0 68 0>;
179 tx-dma-channel = <&pdma0 7>; /* preliminary */
180 rx-dma-channel = <&pdma0 6>; /* preliminary */
181 #address-cells = <1>;
182 #size-cells = <0>;
183 };
184
149 amba { 185 amba {
150 #address-cells = <1>; 186 #address-cells = <1>;
151 #size-cells = <1>; 187 #size-cells = <1>;
diff --git a/arch/arm/boot/dts/ge863-pro3.dtsi b/arch/arm/boot/dts/ge863-pro3.dtsi
new file mode 100644
index 000000000000..17136fc7a516
--- /dev/null
+++ b/arch/arm/boot/dts/ge863-pro3.dtsi
@@ -0,0 +1,52 @@
1/*
2 * ge863_pro3.dtsi - Device Tree file for Telit GE863-PRO3
3 *
4 * Copyright (C) 2012 Telit,
5 * 2012 Fabio Porcedda <fabio.porcedda@gmail.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9
10/include/ "at91sam9260.dtsi"
11
12/ {
13 clocks {
14 #address-cells = <1>;
15 #size-cells = <1>;
16 ranges;
17
18 main_clock: clock@0 {
19 compatible = "atmel,osc", "fixed-clock";
20 clock-frequency = <6000000>;
21 };
22 };
23
24 ahb {
25 apb {
26 dbgu: serial@fffff200 {
27 status = "okay";
28 };
29 };
30
31 nand0: nand@40000000 {
32 nand-bus-width = <8>;
33 nand-ecc-mode = "soft";
34 nand-on-flash-bbt;
35 status = "okay";
36
37 boot@0 {
38 label = "boot";
39 reg = <0x0 0x7c0000>;
40 };
41
42 root@07c0000 {
43 label = "root";
44 reg = <0x7c0000 0x7840000>;
45 };
46 };
47 };
48
49 chosen {
50 bootargs = "console=ttyS0,115200 root=ubi0:rootfs ubi.mtd=1 rootfstype=ubifs";
51 };
52};
diff --git a/arch/arm/boot/dts/imx23-evk.dts b/arch/arm/boot/dts/imx23-evk.dts
index 70bffa929b65..e3486f486b40 100644
--- a/arch/arm/boot/dts/imx23-evk.dts
+++ b/arch/arm/boot/dts/imx23-evk.dts
@@ -22,17 +22,60 @@
22 22
23 apb@80000000 { 23 apb@80000000 {
24 apbh@80000000 { 24 apbh@80000000 {
25 gpmi-nand@8000c000 {
26 pinctrl-names = "default";
27 pinctrl-0 = <&gpmi_pins_a &gpmi_pins_fixup>;
28 status = "okay";
29 };
30
25 ssp0: ssp@80010000 { 31 ssp0: ssp@80010000 {
26 compatible = "fsl,imx23-mmc"; 32 compatible = "fsl,imx23-mmc";
27 pinctrl-names = "default"; 33 pinctrl-names = "default";
28 pinctrl-0 = <&mmc0_8bit_pins_a &mmc0_pins_fixup>; 34 pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_pins_fixup>;
29 bus-width = <8>; 35 bus-width = <4>;
30 wp-gpios = <&gpio1 30 0>; 36 wp-gpios = <&gpio1 30 0>;
37 vmmc-supply = <&reg_vddio_sd0>;
38 status = "okay";
39 };
40
41 pinctrl@80018000 {
42 pinctrl-names = "default";
43 pinctrl-0 = <&hog_pins_a>;
44
45 hog_pins_a: hog-gpios@0 {
46 reg = <0>;
47 fsl,pinmux-ids = <
48 0x1123 /* MX23_PAD_LCD_RESET__GPIO_1_18 */
49 0x11d3 /* MX23_PAD_PWM3__GPIO_1_29 */
50 0x11e3 /* MX23_PAD_PWM4__GPIO_1_30 */
51 >;
52 fsl,drive-strength = <0>;
53 fsl,voltage = <1>;
54 fsl,pull-up = <0>;
55 };
56 };
57
58 lcdif@80030000 {
59 pinctrl-names = "default";
60 pinctrl-0 = <&lcdif_24bit_pins_a>;
61 panel-enable-gpios = <&gpio1 18 0>;
31 status = "okay"; 62 status = "okay";
32 }; 63 };
33 }; 64 };
34 65
35 apbx@80040000 { 66 apbx@80040000 {
67 pwm: pwm@80064000 {
68 pinctrl-names = "default";
69 pinctrl-0 = <&pwm2_pins_a>;
70 status = "okay";
71 };
72
73 auart0: serial@8006c000 {
74 pinctrl-names = "default";
75 pinctrl-0 = <&auart0_pins_a>;
76 status = "okay";
77 };
78
36 duart: serial@80070000 { 79 duart: serial@80070000 {
37 pinctrl-names = "default"; 80 pinctrl-names = "default";
38 pinctrl-0 = <&duart_pins_a>; 81 pinctrl-0 = <&duart_pins_a>;
@@ -40,4 +83,23 @@
40 }; 83 };
41 }; 84 };
42 }; 85 };
86
87 regulators {
88 compatible = "simple-bus";
89
90 reg_vddio_sd0: vddio-sd0 {
91 compatible = "regulator-fixed";
92 regulator-name = "vddio-sd0";
93 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <3300000>;
95 gpio = <&gpio1 29 0>;
96 };
97 };
98
99 backlight {
100 compatible = "pwm-backlight";
101 pwms = <&pwm 2 5000000>;
102 brightness-levels = <0 4 8 16 32 64 128 255>;
103 default-brightness-level = <6>;
104 };
43}; 105};
diff --git a/arch/arm/boot/dts/imx23-olinuxino.dts b/arch/arm/boot/dts/imx23-olinuxino.dts
new file mode 100644
index 000000000000..20912b1d8893
--- /dev/null
+++ b/arch/arm/boot/dts/imx23-olinuxino.dts
@@ -0,0 +1,44 @@
1/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 *
4 * Author: Fabio Estevam <fabio.estevam@freescale.com>
5 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/dts-v1/;
15/include/ "imx23.dtsi"
16
17/ {
18 model = "i.MX23 Olinuxino Low Cost Board";
19 compatible = "olimex,imx23-olinuxino", "fsl,imx23";
20
21 memory {
22 reg = <0x40000000 0x04000000>;
23 };
24
25 apb@80000000 {
26 apbh@80000000 {
27 ssp0: ssp@80010000 {
28 compatible = "fsl,imx23-mmc";
29 pinctrl-names = "default";
30 pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_pins_fixup>;
31 bus-width = <4>;
32 status = "okay";
33 };
34 };
35
36 apbx@80040000 {
37 duart: serial@80070000 {
38 pinctrl-names = "default";
39 pinctrl-0 = <&duart_pins_a>;
40 status = "okay";
41 };
42 };
43 };
44};
diff --git a/arch/arm/boot/dts/imx23-stmp378x_devb.dts b/arch/arm/boot/dts/imx23-stmp378x_devb.dts
new file mode 100644
index 000000000000..757a327ff3e8
--- /dev/null
+++ b/arch/arm/boot/dts/imx23-stmp378x_devb.dts
@@ -0,0 +1,78 @@
1/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13/include/ "imx23.dtsi"
14
15/ {
16 model = "Freescale STMP378x Development Board";
17 compatible = "fsl,stmp378x-devb", "fsl,imx23";
18
19 memory {
20 reg = <0x40000000 0x04000000>;
21 };
22
23 apb@80000000 {
24 apbh@80000000 {
25 ssp0: ssp@80010000 {
26 compatible = "fsl,imx23-mmc";
27 pinctrl-names = "default";
28 pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_pins_fixup>;
29 bus-width = <4>;
30 wp-gpios = <&gpio1 30 0>;
31 vmmc-supply = <&reg_vddio_sd0>;
32 status = "okay";
33 };
34
35 pinctrl@80018000 {
36 pinctrl-names = "default";
37 pinctrl-0 = <&hog_pins_a>;
38
39 hog_pins_a: hog-gpios@0 {
40 reg = <0>;
41 fsl,pinmux-ids = <
42 0x11d3 /* MX23_PAD_PWM3__GPIO_1_29 */
43 0x11e3 /* MX23_PAD_PWM4__GPIO_1_30 */
44 >;
45 fsl,drive-strength = <0>;
46 fsl,voltage = <1>;
47 fsl,pull-up = <0>;
48 };
49 };
50 };
51
52 apbx@80040000 {
53 auart0: serial@8006c000 {
54 pinctrl-names = "default";
55 pinctrl-0 = <&auart0_pins_a>;
56 status = "okay";
57 };
58
59 duart: serial@80070000 {
60 pinctrl-names = "default";
61 pinctrl-0 = <&duart_pins_a>;
62 status = "okay";
63 };
64 };
65 };
66
67 regulators {
68 compatible = "simple-bus";
69
70 reg_vddio_sd0: vddio-sd0 {
71 compatible = "regulator-fixed";
72 regulator-name = "vddio-sd0";
73 regulator-min-microvolt = <3300000>;
74 regulator-max-microvolt = <3300000>;
75 gpio = <&gpio1 29 0>;
76 };
77 };
78};
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index 8c5f9994f3fc..a874dbfb5ae6 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -18,6 +18,8 @@
18 gpio0 = &gpio0; 18 gpio0 = &gpio0;
19 gpio1 = &gpio1; 19 gpio1 = &gpio1;
20 gpio2 = &gpio2; 20 gpio2 = &gpio2;
21 serial0 = &auart0;
22 serial1 = &auart1;
21 }; 23 };
22 24
23 cpus { 25 cpus {
@@ -57,13 +59,15 @@
57 status = "disabled"; 59 status = "disabled";
58 }; 60 };
59 61
60 bch@8000a000 { 62 gpmi-nand@8000c000 {
61 reg = <0x8000a000 2000>; 63 compatible = "fsl,imx23-gpmi-nand";
62 status = "disabled"; 64 #address-cells = <1>;
63 }; 65 #size-cells = <1>;
64 66 reg = <0x8000c000 2000>, <0x8000a000 2000>;
65 gpmi@8000c000 { 67 reg-names = "gpmi-nand", "bch";
66 reg = <0x8000c000 2000>; 68 interrupts = <13>, <56>;
69 interrupt-names = "gpmi-dma", "bch";
70 fsl,gpmi-dma-channel = <4>;
67 status = "disabled"; 71 status = "disabled";
68 }; 72 };
69 73
@@ -114,24 +118,151 @@
114 118
115 duart_pins_a: duart@0 { 119 duart_pins_a: duart@0 {
116 reg = <0>; 120 reg = <0>;
117 fsl,pinmux-ids = <0x11a2 0x11b2>; 121 fsl,pinmux-ids = <
122 0x11a2 /* MX23_PAD_PWM0__DUART_RX */
123 0x11b2 /* MX23_PAD_PWM1__DUART_TX */
124 >;
125 fsl,drive-strength = <0>;
126 fsl,voltage = <1>;
127 fsl,pull-up = <0>;
128 };
129
130 auart0_pins_a: auart0@0 {
131 reg = <0>;
132 fsl,pinmux-ids = <
133 0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */
134 0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */
135 0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */
136 0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */
137 >;
118 fsl,drive-strength = <0>; 138 fsl,drive-strength = <0>;
119 fsl,voltage = <1>; 139 fsl,voltage = <1>;
120 fsl,pull-up = <0>; 140 fsl,pull-up = <0>;
121 }; 141 };
122 142
143 gpmi_pins_a: gpmi-nand@0 {
144 reg = <0>;
145 fsl,pinmux-ids = <
146 0x0000 /* MX23_PAD_GPMI_D00__GPMI_D00 */
147 0x0010 /* MX23_PAD_GPMI_D01__GPMI_D01 */
148 0x0020 /* MX23_PAD_GPMI_D02__GPMI_D02 */
149 0x0030 /* MX23_PAD_GPMI_D03__GPMI_D03 */
150 0x0040 /* MX23_PAD_GPMI_D04__GPMI_D04 */
151 0x0050 /* MX23_PAD_GPMI_D05__GPMI_D05 */
152 0x0060 /* MX23_PAD_GPMI_D06__GPMI_D06 */
153 0x0070 /* MX23_PAD_GPMI_D07__GPMI_D07 */
154 0x0100 /* MX23_PAD_GPMI_CLE__GPMI_CLE */
155 0x0110 /* MX23_PAD_GPMI_ALE__GPMI_ALE */
156 0x0130 /* MX23_PAD_GPMI_RDY0__GPMI_RDY0 */
157 0x0140 /* MX23_PAD_GPMI_RDY1__GPMI_RDY1 */
158 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
159 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
160 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
161 0x21b0 /* MX23_PAD_GPMI_CE1N__GPMI_CE1N */
162 0x21c0 /* MX23_PAD_GPMI_CE0N__GPMI_CE0N */
163 >;
164 fsl,drive-strength = <0>;
165 fsl,voltage = <1>;
166 fsl,pull-up = <0>;
167 };
168
169 gpmi_pins_fixup: gpmi-pins-fixup {
170 fsl,pinmux-ids = <
171 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
172 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
173 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
174 >;
175 fsl,drive-strength = <2>;
176 };
177
178 mmc0_4bit_pins_a: mmc0-4bit@0 {
179 reg = <0>;
180 fsl,pinmux-ids = <
181 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
182 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
183 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
184 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
185 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
186 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
187 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
188 >;
189 fsl,drive-strength = <1>;
190 fsl,voltage = <1>;
191 fsl,pull-up = <1>;
192 };
193
123 mmc0_8bit_pins_a: mmc0-8bit@0 { 194 mmc0_8bit_pins_a: mmc0-8bit@0 {
124 reg = <0>; 195 reg = <0>;
125 fsl,pinmux-ids = <0x2020 0x2030 0x2040 196 fsl,pinmux-ids = <
126 0x2050 0x0082 0x0092 0x00a2 197 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
127 0x00b2 0x2000 0x2010 0x2060>; 198 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
199 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
200 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
201 0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */
202 0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */
203 0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */
204 0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */
205 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
206 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
207 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
208 >;
128 fsl,drive-strength = <1>; 209 fsl,drive-strength = <1>;
129 fsl,voltage = <1>; 210 fsl,voltage = <1>;
130 fsl,pull-up = <1>; 211 fsl,pull-up = <1>;
131 }; 212 };
132 213
133 mmc0_pins_fixup: mmc0-pins-fixup { 214 mmc0_pins_fixup: mmc0-pins-fixup {
134 fsl,pinmux-ids = <0x2010 0x2060>; 215 fsl,pinmux-ids = <
216 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
217 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
218 >;
219 fsl,pull-up = <0>;
220 };
221
222 pwm2_pins_a: pwm2@0 {
223 reg = <0>;
224 fsl,pinmux-ids = <
225 0x11c0 /* MX23_PAD_PWM2__PWM2 */
226 >;
227 fsl,drive-strength = <0>;
228 fsl,voltage = <1>;
229 fsl,pull-up = <0>;
230 };
231
232 lcdif_24bit_pins_a: lcdif-24bit@0 {
233 reg = <0>;
234 fsl,pinmux-ids = <
235 0x1000 /* MX23_PAD_LCD_D00__LCD_D0 */
236 0x1010 /* MX23_PAD_LCD_D01__LCD_D1 */
237 0x1020 /* MX23_PAD_LCD_D02__LCD_D2 */
238 0x1030 /* MX23_PAD_LCD_D03__LCD_D3 */
239 0x1040 /* MX23_PAD_LCD_D04__LCD_D4 */
240 0x1050 /* MX23_PAD_LCD_D05__LCD_D5 */
241 0x1060 /* MX23_PAD_LCD_D06__LCD_D6 */
242 0x1070 /* MX23_PAD_LCD_D07__LCD_D7 */
243 0x1080 /* MX23_PAD_LCD_D08__LCD_D8 */
244 0x1090 /* MX23_PAD_LCD_D09__LCD_D9 */
245 0x10a0 /* MX23_PAD_LCD_D10__LCD_D10 */
246 0x10b0 /* MX23_PAD_LCD_D11__LCD_D11 */
247 0x10c0 /* MX23_PAD_LCD_D12__LCD_D12 */
248 0x10d0 /* MX23_PAD_LCD_D13__LCD_D13 */
249 0x10e0 /* MX23_PAD_LCD_D14__LCD_D14 */
250 0x10f0 /* MX23_PAD_LCD_D15__LCD_D15 */
251 0x1100 /* MX23_PAD_LCD_D16__LCD_D16 */
252 0x1110 /* MX23_PAD_LCD_D17__LCD_D17 */
253 0x0081 /* MX23_PAD_GPMI_D08__LCD_D18 */
254 0x0091 /* MX23_PAD_GPMI_D09__LCD_D19 */
255 0x00a1 /* MX23_PAD_GPMI_D10__LCD_D20 */
256 0x00b1 /* MX23_PAD_GPMI_D11__LCD_D21 */
257 0x00c1 /* MX23_PAD_GPMI_D12__LCD_D22 */
258 0x00d1 /* MX23_PAD_GPMI_D13__LCD_D23 */
259 0x1160 /* MX23_PAD_LCD_DOTCK__LCD_DOTCK */
260 0x1170 /* MX23_PAD_LCD_ENABLE__LCD_ENABLE */
261 0x1180 /* MX23_PAD_LCD_HSYNC__LCD_HSYNC */
262 0x1190 /* MX23_PAD_LCD_VSYNC__LCD_VSYNC */
263 >;
264 fsl,drive-strength = <0>;
265 fsl,voltage = <1>;
135 fsl,pull-up = <0>; 266 fsl,pull-up = <0>;
136 }; 267 };
137 }; 268 };
@@ -172,7 +303,9 @@
172 }; 303 };
173 304
174 lcdif@80030000 { 305 lcdif@80030000 {
306 compatible = "fsl,imx23-lcdif";
175 reg = <0x80030000 2000>; 307 reg = <0x80030000 2000>;
308 interrupts = <46 45>;
176 status = "disabled"; 309 status = "disabled";
177 }; 310 };
178 311
@@ -242,12 +375,16 @@
242 }; 375 };
243 376
244 rtc@8005c000 { 377 rtc@8005c000 {
378 compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
245 reg = <0x8005c000 2000>; 379 reg = <0x8005c000 2000>;
246 status = "disabled"; 380 interrupts = <22>;
247 }; 381 };
248 382
249 pwm@80064000 { 383 pwm: pwm@80064000 {
384 compatible = "fsl,imx23-pwm";
250 reg = <0x80064000 2000>; 385 reg = <0x80064000 2000>;
386 #pwm-cells = <2>;
387 fsl,pwm-number = <5>;
251 status = "disabled"; 388 status = "disabled";
252 }; 389 };
253 390
@@ -257,12 +394,16 @@
257 }; 394 };
258 395
259 auart0: serial@8006c000 { 396 auart0: serial@8006c000 {
397 compatible = "fsl,imx23-auart";
260 reg = <0x8006c000 0x2000>; 398 reg = <0x8006c000 0x2000>;
399 interrupts = <24 25 23>;
261 status = "disabled"; 400 status = "disabled";
262 }; 401 };
263 402
264 auart1: serial@8006e000 { 403 auart1: serial@8006e000 {
404 compatible = "fsl,imx23-auart";
265 reg = <0x8006e000 0x2000>; 405 reg = <0x8006e000 0x2000>;
406 interrupts = <59 60 58>;
266 status = "disabled"; 407 status = "disabled";
267 }; 408 };
268 409
diff --git a/arch/arm/boot/dts/imx27-3ds.dts b/arch/arm/boot/dts/imx27-3ds.dts
new file mode 100644
index 000000000000..d3f8296e19e0
--- /dev/null
+++ b/arch/arm/boot/dts/imx27-3ds.dts
@@ -0,0 +1,41 @@
1/*
2 * Copyright 2012 Sascha Hauer, Pengutronix
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13/include/ "imx27.dtsi"
14
15/ {
16 model = "mx27_3ds";
17 compatible = "freescale,imx27-3ds", "fsl,imx27";
18
19 memory {
20 reg = <0x0 0x0>;
21 };
22
23 soc {
24 aipi@10000000 { /* aipi */
25
26 wdog@10002000 {
27 status = "okay";
28 };
29
30 uart@1000a000 {
31 fsl,uart-has-rtscts;
32 status = "okay";
33 };
34
35 fec@1002b000 {
36 status = "okay";
37 };
38 };
39 };
40
41};
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index 386c769c38d1..00bae3aad5ab 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -121,7 +121,7 @@
121 gpio-controller; 121 gpio-controller;
122 #gpio-cells = <2>; 122 #gpio-cells = <2>;
123 interrupt-controller; 123 interrupt-controller;
124 #interrupt-cells = <1>; 124 #interrupt-cells = <2>;
125 }; 125 };
126 126
127 gpio2: gpio@10015100 { 127 gpio2: gpio@10015100 {
@@ -131,7 +131,7 @@
131 gpio-controller; 131 gpio-controller;
132 #gpio-cells = <2>; 132 #gpio-cells = <2>;
133 interrupt-controller; 133 interrupt-controller;
134 #interrupt-cells = <1>; 134 #interrupt-cells = <2>;
135 }; 135 };
136 136
137 gpio3: gpio@10015200 { 137 gpio3: gpio@10015200 {
@@ -141,7 +141,7 @@
141 gpio-controller; 141 gpio-controller;
142 #gpio-cells = <2>; 142 #gpio-cells = <2>;
143 interrupt-controller; 143 interrupt-controller;
144 #interrupt-cells = <1>; 144 #interrupt-cells = <2>;
145 }; 145 };
146 146
147 gpio4: gpio@10015300 { 147 gpio4: gpio@10015300 {
@@ -151,7 +151,7 @@
151 gpio-controller; 151 gpio-controller;
152 #gpio-cells = <2>; 152 #gpio-cells = <2>;
153 interrupt-controller; 153 interrupt-controller;
154 #interrupt-cells = <1>; 154 #interrupt-cells = <2>;
155 }; 155 };
156 156
157 gpio5: gpio@10015400 { 157 gpio5: gpio@10015400 {
@@ -161,7 +161,7 @@
161 gpio-controller; 161 gpio-controller;
162 #gpio-cells = <2>; 162 #gpio-cells = <2>;
163 interrupt-controller; 163 interrupt-controller;
164 #interrupt-cells = <1>; 164 #interrupt-cells = <2>;
165 }; 165 };
166 166
167 gpio6: gpio@10015500 { 167 gpio6: gpio@10015500 {
@@ -171,7 +171,7 @@
171 gpio-controller; 171 gpio-controller;
172 #gpio-cells = <2>; 172 #gpio-cells = <2>;
173 interrupt-controller; 173 interrupt-controller;
174 #interrupt-cells = <1>; 174 #interrupt-cells = <2>;
175 }; 175 };
176 176
177 cspi3: cspi@10017000 { 177 cspi3: cspi@10017000 {
diff --git a/arch/arm/boot/dts/imx28-apx4devkit.dts b/arch/arm/boot/dts/imx28-apx4devkit.dts
new file mode 100644
index 000000000000..b383417a558f
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-apx4devkit.dts
@@ -0,0 +1,198 @@
1/dts-v1/;
2/include/ "imx28.dtsi"
3
4/ {
5 model = "Bluegiga APX4 Development Kit";
6 compatible = "bluegiga,apx4devkit", "fsl,imx28";
7
8 memory {
9 reg = <0x40000000 0x04000000>;
10 };
11
12 apb@80000000 {
13 apbh@80000000 {
14 gpmi-nand@8000c000 {
15 pinctrl-names = "default";
16 pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>;
17 status = "okay";
18 };
19
20 ssp0: ssp@80010000 {
21 compatible = "fsl,imx28-mmc";
22 pinctrl-names = "default";
23 pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_sck_cfg>;
24 bus-width = <4>;
25 status = "okay";
26 };
27
28 ssp2: ssp@80014000 {
29 compatible = "fsl,imx28-mmc";
30 pinctrl-names = "default";
31 pinctrl-0 = <&mmc2_4bit_pins_apx4 &mmc2_sck_cfg_apx4>;
32 bus-width = <4>;
33 status = "okay";
34 };
35
36 pinctrl@80018000 {
37 pinctrl-names = "default";
38 pinctrl-0 = <&hog_pins_a>;
39
40 hog_pins_a: hog-gpios@0 {
41 reg = <0>;
42 fsl,pinmux-ids = <
43 0x0113 /* MX28_PAD_GPMI_CE1N__GPIO_0_17 */
44 0x0153 /* MX28_PAD_GPMI_RDY1__GPIO_0_21 */
45 0x2123 /* MX28_PAD_SSP2_MISO__GPIO_2_18 */
46 0x2131 /* MX28_PAD_SSP2_SS0__GPIO_2_19 */
47 0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */
48 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
49 0x4143 /* MX28_PAD_JTAG_RTCK__GPIO_4_20 */
50 >;
51 fsl,drive-strength = <0>;
52 fsl,voltage = <1>;
53 fsl,pull-up = <0>;
54 };
55
56 lcdif_pins_apx4: lcdif-apx4@0 {
57 reg = <0>;
58 fsl,pinmux-ids = <
59 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */
60 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */
61 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */
62 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */
63 >;
64 fsl,drive-strength = <0>;
65 fsl,voltage = <1>;
66 fsl,pull-up = <0>;
67 };
68
69 mmc2_4bit_pins_apx4: mmc2-4bit-apx4@0 {
70 reg = <0>;
71 fsl,pinmux-ids = <
72 0x2041 /* MX28_PAD_SSP0_DATA4__SSP2_D0 */
73 0x2051 /* MX28_PAD_SSP0_DATA5__SSP2_D3 */
74 0x2061 /* MX28_PAD_SSP0_DATA6__SSP2_CMD */
75 0x2071 /* MX28_PAD_SSP0_DATA7__SSP2_SCK */
76 0x2141 /* MX28_PAD_SSP2_SS1__SSP2_D1 */
77 0x2151 /* MX28_PAD_SSP2_SS2__SSP2_D2 */
78 >;
79 fsl,drive-strength = <1>;
80 fsl,voltage = <1>;
81 fsl,pull-up = <1>;
82 };
83
84 mmc2_sck_cfg_apx4: mmc2-sck-cfg-apx4 {
85 fsl,pinmux-ids = <
86 0x2071 /* MX28_PAD_SSP0_DATA7__SSP2_SCK */
87 >;
88 fsl,drive-strength = <2>;
89 fsl,pull-up = <0>;
90 };
91 };
92
93 lcdif@80030000 {
94 pinctrl-names = "default";
95 pinctrl-0 = <&lcdif_24bit_pins_a
96 &lcdif_pins_apx4>;
97 status = "okay";
98 };
99 };
100
101 apbx@80040000 {
102 saif0: saif@80042000 {
103 pinctrl-names = "default";
104 pinctrl-0 = <&saif0_pins_a>;
105 status = "okay";
106 };
107
108 saif1: saif@80046000 {
109 pinctrl-names = "default";
110 pinctrl-0 = <&saif1_pins_a>;
111 fsl,saif-master = <&saif0>;
112 status = "okay";
113 };
114
115 i2c0: i2c@80058000 {
116 pinctrl-names = "default";
117 pinctrl-0 = <&i2c0_pins_a>;
118 status = "okay";
119
120 sgtl5000: codec@0a {
121 compatible = "fsl,sgtl5000";
122 reg = <0x0a>;
123 VDDA-supply = <&reg_3p3v>;
124 VDDIO-supply = <&reg_3p3v>;
125
126 };
127
128 pcf8563: rtc@51 {
129 compatible = "phg,pcf8563";
130 reg = <0x51>;
131 };
132 };
133
134 duart: serial@80074000 {
135 pinctrl-names = "default";
136 pinctrl-0 = <&duart_pins_a>;
137 status = "okay";
138 };
139
140 auart0: serial@8006a000 {
141 pinctrl-names = "default";
142 pinctrl-0 = <&auart0_pins_a>;
143 status = "okay";
144 };
145
146 auart1: serial@8006c000 {
147 pinctrl-names = "default";
148 pinctrl-0 = <&auart1_2pins_a>;
149 status = "okay";
150 };
151
152 auart2: serial@8006e000 {
153 pinctrl-names = "default";
154 pinctrl-0 = <&auart2_2pins_a>;
155 status = "okay";
156 };
157 };
158 };
159
160 ahb@80080000 {
161 mac0: ethernet@800f0000 {
162 phy-mode = "rmii";
163 pinctrl-names = "default";
164 pinctrl-0 = <&mac0_pins_a>;
165 status = "okay";
166 };
167 };
168
169 regulators {
170 compatible = "simple-bus";
171
172 reg_3p3v: 3p3v {
173 compatible = "regulator-fixed";
174 regulator-name = "3P3V";
175 regulator-min-microvolt = <3300000>;
176 regulator-max-microvolt = <3300000>;
177 regulator-always-on;
178 };
179 };
180
181 sound {
182 compatible = "bluegiga,apx4devkit-sgtl5000",
183 "fsl,mxs-audio-sgtl5000";
184 model = "apx4devkit-sgtl5000";
185 saif-controllers = <&saif0 &saif1>;
186 audio-codec = <&sgtl5000>;
187 };
188
189 leds {
190 compatible = "gpio-leds";
191
192 user {
193 label = "Heartbeat";
194 gpios = <&gpio3 28 0>;
195 linux,default-trigger = "heartbeat";
196 };
197 };
198};
diff --git a/arch/arm/boot/dts/imx28-cfa10036.dts b/arch/arm/boot/dts/imx28-cfa10036.dts
new file mode 100644
index 000000000000..c03a577beca3
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-cfa10036.dts
@@ -0,0 +1,52 @@
1/*
2 * Copyright 2012 Free Electrons
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13/include/ "imx28.dtsi"
14
15/ {
16 model = "Crystalfontz CFA-10036 Board";
17 compatible = "crystalfontz,cfa10036", "fsl,imx28";
18
19 memory {
20 reg = <0x40000000 0x08000000>;
21 };
22
23 apb@80000000 {
24 apbh@80000000 {
25 ssp0: ssp@80010000 {
26 compatible = "fsl,imx28-mmc";
27 pinctrl-names = "default";
28 pinctrl-0 = <&mmc0_4bit_pins_a
29 &mmc0_cd_cfg &mmc0_sck_cfg>;
30 bus-width = <4>;
31 status = "okay";
32 };
33 };
34
35 apbx@80040000 {
36 duart: serial@80074000 {
37 pinctrl-names = "default";
38 pinctrl-0 = <&duart_pins_b>;
39 status = "okay";
40 };
41 };
42 };
43
44 leds {
45 compatible = "gpio-leds";
46
47 power {
48 gpios = <&gpio3 4 1>;
49 default-state = "on";
50 };
51 };
52};
diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts
index ee520a529cb4..773c0e84d1fb 100644
--- a/arch/arm/boot/dts/imx28-evk.dts
+++ b/arch/arm/boot/dts/imx28-evk.dts
@@ -22,6 +22,13 @@
22 22
23 apb@80000000 { 23 apb@80000000 {
24 apbh@80000000 { 24 apbh@80000000 {
25 gpmi-nand@8000c000 {
26 pinctrl-names = "default";
27 pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg
28 &gpmi_pins_evk>;
29 status = "okay";
30 };
31
25 ssp0: ssp@80010000 { 32 ssp0: ssp@80010000 {
26 compatible = "fsl,imx28-mmc"; 33 compatible = "fsl,imx28-mmc";
27 pinctrl-names = "default"; 34 pinctrl-names = "default";
@@ -29,6 +36,7 @@
29 &mmc0_cd_cfg &mmc0_sck_cfg>; 36 &mmc0_cd_cfg &mmc0_sck_cfg>;
30 bus-width = <8>; 37 bus-width = <8>;
31 wp-gpios = <&gpio2 12 0>; 38 wp-gpios = <&gpio2 12 0>;
39 vmmc-supply = <&reg_vddio_sd0>;
32 status = "okay"; 40 status = "okay";
33 }; 41 };
34 42
@@ -36,6 +44,72 @@
36 compatible = "fsl,imx28-mmc"; 44 compatible = "fsl,imx28-mmc";
37 bus-width = <8>; 45 bus-width = <8>;
38 wp-gpios = <&gpio0 28 0>; 46 wp-gpios = <&gpio0 28 0>;
47 };
48
49 pinctrl@80018000 {
50 pinctrl-names = "default";
51 pinctrl-0 = <&hog_pins_a>;
52
53 hog_pins_a: hog-gpios@0 {
54 reg = <0>;
55 fsl,pinmux-ids = <
56 0x20d3 /* MX28_PAD_SSP1_CMD__GPIO_2_13 */
57 0x20f3 /* MX28_PAD_SSP1_DATA3__GPIO_2_15 */
58 0x40d3 /* MX28_PAD_ENET0_RX_CLK__GPIO_4_13 */
59 0x20c3 /* MX28_PAD_SSP1_SCK__GPIO_2_12 */
60 0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */
61 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
62 0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
63 0x3083 /* MX28_PAD_AUART2_RX__GPIO_3_8 */
64 0x3093 /* MX28_PAD_AUART2_TX__GPIO_3_9 */
65 >;
66 fsl,drive-strength = <0>;
67 fsl,voltage = <1>;
68 fsl,pull-up = <0>;
69 };
70
71 gpmi_pins_evk: gpmi-nand-evk@0 {
72 reg = <0>;
73 fsl,pinmux-ids = <
74 0x0110 /* MX28_PAD_GPMI_CE1N__GPMI_CE1N */
75 0x0150 /* MX28_PAD_GPMI_RDY1__GPMI_READY1 */
76 >;
77 fsl,drive-strength = <0>;
78 fsl,voltage = <1>;
79 fsl,pull-up = <0>;
80 };
81
82 lcdif_pins_evk: lcdif-evk@0 {
83 reg = <0>;
84 fsl,pinmux-ids = <
85 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */
86 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */
87 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */
88 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */
89 >;
90 fsl,drive-strength = <0>;
91 fsl,voltage = <1>;
92 fsl,pull-up = <0>;
93 };
94 };
95
96 lcdif@80030000 {
97 pinctrl-names = "default";
98 pinctrl-0 = <&lcdif_24bit_pins_a
99 &lcdif_pins_evk>;
100 panel-enable-gpios = <&gpio3 30 0>;
101 status = "okay";
102 };
103
104 can0: can@80032000 {
105 pinctrl-names = "default";
106 pinctrl-0 = <&can0_pins_a>;
107 status = "okay";
108 };
109
110 can1: can@80034000 {
111 pinctrl-names = "default";
112 pinctrl-0 = <&can1_pins_a>;
39 status = "okay"; 113 status = "okay";
40 }; 114 };
41 }; 115 };
@@ -68,19 +142,58 @@
68 }; 142 };
69 }; 143 };
70 144
145 pwm: pwm@80064000 {
146 pinctrl-names = "default";
147 pinctrl-0 = <&pwm2_pins_a>;
148 status = "okay";
149 };
150
71 duart: serial@80074000 { 151 duart: serial@80074000 {
72 pinctrl-names = "default"; 152 pinctrl-names = "default";
73 pinctrl-0 = <&duart_pins_a>; 153 pinctrl-0 = <&duart_pins_a>;
74 status = "okay"; 154 status = "okay";
75 }; 155 };
156
157 auart0: serial@8006a000 {
158 pinctrl-names = "default";
159 pinctrl-0 = <&auart0_pins_a>;
160 status = "okay";
161 };
162
163 auart3: serial@80070000 {
164 pinctrl-names = "default";
165 pinctrl-0 = <&auart3_pins_a>;
166 status = "okay";
167 };
168
169 usbphy0: usbphy@8007c000 {
170 status = "okay";
171 };
172
173 usbphy1: usbphy@8007e000 {
174 status = "okay";
175 };
76 }; 176 };
77 }; 177 };
78 178
79 ahb@80080000 { 179 ahb@80080000 {
180 usb0: usb@80080000 {
181 vbus-supply = <&reg_usb0_vbus>;
182 status = "okay";
183 };
184
185 usb1: usb@80090000 {
186 vbus-supply = <&reg_usb1_vbus>;
187 status = "okay";
188 };
189
80 mac0: ethernet@800f0000 { 190 mac0: ethernet@800f0000 {
81 phy-mode = "rmii"; 191 phy-mode = "rmii";
82 pinctrl-names = "default"; 192 pinctrl-names = "default";
83 pinctrl-0 = <&mac0_pins_a>; 193 pinctrl-0 = <&mac0_pins_a>;
194 phy-supply = <&reg_fec_3v3>;
195 phy-reset-gpios = <&gpio4 13 0>;
196 phy-reset-duration = <100>;
84 status = "okay"; 197 status = "okay";
85 }; 198 };
86 199
@@ -102,6 +215,40 @@
102 regulator-max-microvolt = <3300000>; 215 regulator-max-microvolt = <3300000>;
103 regulator-always-on; 216 regulator-always-on;
104 }; 217 };
218
219 reg_vddio_sd0: vddio-sd0 {
220 compatible = "regulator-fixed";
221 regulator-name = "vddio-sd0";
222 regulator-min-microvolt = <3300000>;
223 regulator-max-microvolt = <3300000>;
224 gpio = <&gpio3 28 0>;
225 };
226
227 reg_fec_3v3: fec-3v3 {
228 compatible = "regulator-fixed";
229 regulator-name = "fec-3v3";
230 regulator-min-microvolt = <3300000>;
231 regulator-max-microvolt = <3300000>;
232 gpio = <&gpio2 15 0>;
233 };
234
235 reg_usb0_vbus: usb0_vbus {
236 compatible = "regulator-fixed";
237 regulator-name = "usb0_vbus";
238 regulator-min-microvolt = <5000000>;
239 regulator-max-microvolt = <5000000>;
240 gpio = <&gpio3 9 0>;
241 enable-active-high;
242 };
243
244 reg_usb1_vbus: usb1_vbus {
245 compatible = "regulator-fixed";
246 regulator-name = "usb1_vbus";
247 regulator-min-microvolt = <5000000>;
248 regulator-max-microvolt = <5000000>;
249 gpio = <&gpio3 8 0>;
250 enable-active-high;
251 };
105 }; 252 };
106 253
107 sound { 254 sound {
@@ -111,4 +258,21 @@
111 saif-controllers = <&saif0 &saif1>; 258 saif-controllers = <&saif0 &saif1>;
112 audio-codec = <&sgtl5000>; 259 audio-codec = <&sgtl5000>;
113 }; 260 };
261
262 leds {
263 compatible = "gpio-leds";
264
265 user {
266 label = "Heartbeat";
267 gpios = <&gpio3 5 0>;
268 linux,default-trigger = "heartbeat";
269 };
270 };
271
272 backlight {
273 compatible = "pwm-backlight";
274 pwms = <&pwm 2 5000000>;
275 brightness-levels = <0 4 8 16 32 64 128 255>;
276 default-brightness-level = <6>;
277 };
114}; 278};
diff --git a/arch/arm/boot/dts/imx28-m28evk.dts b/arch/arm/boot/dts/imx28-m28evk.dts
new file mode 100644
index 000000000000..183a3fd2d859
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-m28evk.dts
@@ -0,0 +1,210 @@
1/*
2 * Copyright (C) 2012 Marek Vasut <marex@denx.de>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13/include/ "imx28.dtsi"
14
15/ {
16 model = "DENX M28EVK";
17 compatible = "denx,m28evk", "fsl,imx28";
18
19 memory {
20 reg = <0x40000000 0x08000000>;
21 };
22
23 apb@80000000 {
24 apbh@80000000 {
25 gpmi-nand@8000c000 {
26 pinctrl-names = "default";
27 pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>;
28 status = "okay";
29
30 partition@0 {
31 label = "bootloader";
32 reg = <0x00000000 0x00300000>;
33 read-only;
34 };
35
36 partition@1 {
37 label = "environment";
38 reg = <0x00300000 0x00080000>;
39 };
40
41 partition@2 {
42 label = "redundant-environment";
43 reg = <0x00380000 0x00080000>;
44 };
45
46 partition@3 {
47 label = "kernel";
48 reg = <0x00400000 0x00400000>;
49 };
50
51 partition@4 {
52 label = "filesystem";
53 reg = <0x00800000 0x0f800000>;
54 };
55 };
56
57 ssp0: ssp@80010000 {
58 compatible = "fsl,imx28-mmc";
59 pinctrl-names = "default";
60 pinctrl-0 = <&mmc0_8bit_pins_a
61 &mmc0_cd_cfg
62 &mmc0_sck_cfg>;
63 bus-width = <8>;
64 wp-gpios = <&gpio3 10 1>;
65 status = "okay";
66 };
67
68 pinctrl@80018000 {
69 pinctrl-names = "default";
70 pinctrl-0 = <&hog_pins_a>;
71
72 hog_pins_a: hog-gpios@0 {
73 reg = <0>;
74 fsl,pinmux-ids = <
75 0x30a3 /* MX28_PAD_AUART2_CTS__GPIO_3_10 */
76 0x30b3 /* MX28_PAD_AUART2_RTS__GPIO_3_11 */
77 >;
78 fsl,drive-strength = <0>;
79 fsl,voltage = <1>;
80 fsl,pull-up = <0>;
81 };
82
83 lcdif_pins_m28: lcdif-m28@0 {
84 reg = <0>;
85 fsl,pinmux-ids = <
86 0x11e0 /* MX28_PAD_LCD_DOTCLK__LCD_DOTCLK */
87 0x11f0 /* MX28_PAD_LCD_ENABLE__LCD_ENABLE */
88 >;
89 fsl,drive-strength = <0>;
90 fsl,voltage = <1>;
91 fsl,pull-up = <0>;
92 };
93 };
94
95 lcdif@80030000 {
96 pinctrl-names = "default";
97 pinctrl-0 = <&lcdif_24bit_pins_a
98 &lcdif_pins_m28>;
99 status = "okay";
100 };
101
102 can0: can@80032000 {
103 pinctrl-names = "default";
104 pinctrl-0 = <&can0_pins_a>;
105 status = "okay";
106 };
107
108 can1: can@80034000 {
109 pinctrl-names = "default";
110 pinctrl-0 = <&can1_pins_a>;
111 status = "okay";
112 };
113 };
114
115 apbx@80040000 {
116 saif0: saif@80042000 {
117 pinctrl-names = "default";
118 pinctrl-0 = <&saif0_pins_a>;
119 status = "okay";
120 };
121
122 saif1: saif@80046000 {
123 pinctrl-names = "default";
124 pinctrl-0 = <&saif1_pins_a>;
125 fsl,saif-master = <&saif0>;
126 status = "okay";
127 };
128
129 i2c0: i2c@80058000 {
130 pinctrl-names = "default";
131 pinctrl-0 = <&i2c0_pins_a>;
132 status = "okay";
133
134 sgtl5000: codec@0a {
135 compatible = "fsl,sgtl5000";
136 reg = <0x0a>;
137 VDDA-supply = <&reg_3p3v>;
138 VDDIO-supply = <&reg_3p3v>;
139
140 };
141
142 eeprom: eeprom@51 {
143 compatible = "atmel,24c128";
144 reg = <0x51>;
145 pagesize = <32>;
146 };
147
148 rtc: rtc@68 {
149 compatible = "stm,mt41t62";
150 reg = <0x68>;
151 };
152 };
153
154 duart: serial@80074000 {
155 pinctrl-names = "default";
156 pinctrl-0 = <&duart_pins_a>;
157 status = "okay";
158 };
159
160 auart0: serial@8006a000 {
161 pinctrl-names = "default";
162 pinctrl-0 = <&auart0_2pins_a>;
163 status = "okay";
164 };
165
166 auart3: serial@80070000 {
167 pinctrl-names = "default";
168 pinctrl-0 = <&auart3_pins_a>;
169 status = "okay";
170 };
171 };
172 };
173
174 ahb@80080000 {
175 mac0: ethernet@800f0000 {
176 phy-mode = "rmii";
177 pinctrl-names = "default";
178 pinctrl-0 = <&mac0_pins_a>;
179 phy-reset-gpios = <&gpio3 11 0>;
180 status = "okay";
181 };
182
183 mac1: ethernet@800f4000 {
184 phy-mode = "rmii";
185 pinctrl-names = "default";
186 pinctrl-0 = <&mac1_pins_a>;
187 status = "okay";
188 };
189 };
190
191 regulators {
192 compatible = "simple-bus";
193
194 reg_3p3v: 3p3v {
195 compatible = "regulator-fixed";
196 regulator-name = "3P3V";
197 regulator-min-microvolt = <3300000>;
198 regulator-max-microvolt = <3300000>;
199 regulator-always-on;
200 };
201 };
202
203 sound {
204 compatible = "denx,m28evk-sgtl5000",
205 "fsl,mxs-audio-sgtl5000";
206 model = "m28evk-sgtl5000";
207 saif-controllers = <&saif0 &saif1>;
208 audio-codec = <&sgtl5000>;
209 };
210};
diff --git a/arch/arm/boot/dts/imx28-tx28.dts b/arch/arm/boot/dts/imx28-tx28.dts
new file mode 100644
index 000000000000..62bf767409a6
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-tx28.dts
@@ -0,0 +1,97 @@
1/dts-v1/;
2/include/ "imx28.dtsi"
3
4/ {
5 model = "Ka-Ro electronics TX28 module";
6 compatible = "karo,tx28", "fsl,imx28";
7
8 memory {
9 reg = <0x40000000 0x08000000>;
10 };
11
12 apb@80000000 {
13 apbh@80000000 {
14 ssp0: ssp@80010000 {
15 compatible = "fsl,imx28-mmc";
16 pinctrl-names = "default";
17 pinctrl-0 = <&mmc0_4bit_pins_a
18 &mmc0_cd_cfg
19 &mmc0_sck_cfg>;
20 bus-width = <4>;
21 status = "okay";
22 };
23
24 pinctrl@80018000 {
25 pinctrl-names = "default";
26 pinctrl-0 = <&hog_pins_a>;
27
28 hog_pins_a: hog-gpios@0 {
29 reg = <0>;
30 fsl,pinmux-ids = <
31 0x40a3 /* MX28_PAD_ENET0_RXD3__GPIO_4_10 */
32 >;
33 fsl,drive-strength = <0>;
34 fsl,voltage = <1>;
35 fsl,pull-up = <0>;
36 };
37 };
38 };
39
40 apbx@80040000 {
41 i2c0: i2c@80058000 {
42 pinctrl-names = "default";
43 pinctrl-0 = <&i2c0_pins_a>;
44 status = "okay";
45
46 ds1339: rtc@68 {
47 compatible = "mxim,ds1339";
48 reg = <0x68>;
49 };
50 };
51
52 pwm: pwm@80064000 {
53 pinctrl-names = "default";
54 pinctrl-0 = <&pwm0_pins_a>;
55 status = "okay";
56 };
57
58 duart: serial@80074000 {
59 pinctrl-names = "default";
60 pinctrl-0 = <&duart_4pins_a>;
61 status = "okay";
62 };
63
64 auart1: serial@8006c000 {
65 pinctrl-names = "default";
66 pinctrl-0 = <&auart1_pins_a>;
67 status = "okay";
68 };
69 };
70 };
71
72 ahb@80080000 {
73 mac0: ethernet@800f0000 {
74 phy-mode = "rmii";
75 pinctrl-names = "default";
76 pinctrl-0 = <&mac0_pins_a>;
77 status = "okay";
78 };
79 };
80
81 leds {
82 compatible = "gpio-leds";
83
84 user {
85 label = "Heartbeat";
86 gpios = <&gpio4 10 0>;
87 linux,default-trigger = "heartbeat";
88 };
89 };
90
91 backlight {
92 compatible = "pwm-backlight";
93 pwms = <&pwm 0 5000000>;
94 brightness-levels = <0 4 8 16 32 64 128 255>;
95 default-brightness-level = <6>;
96 };
97};
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 4634cb861a59..915db89e3644 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -22,6 +22,11 @@
22 gpio4 = &gpio4; 22 gpio4 = &gpio4;
23 saif0 = &saif0; 23 saif0 = &saif0;
24 saif1 = &saif1; 24 saif1 = &saif1;
25 serial0 = &auart0;
26 serial1 = &auart1;
27 serial2 = &auart2;
28 serial3 = &auart3;
29 serial4 = &auart4;
25 }; 30 };
26 31
27 cpus { 32 cpus {
@@ -68,15 +73,15 @@
68 status = "disabled"; 73 status = "disabled";
69 }; 74 };
70 75
71 bch@8000a000 { 76 gpmi-nand@8000c000 {
72 reg = <0x8000a000 2000>; 77 compatible = "fsl,imx28-gpmi-nand";
73 interrupts = <41>; 78 #address-cells = <1>;
74 status = "disabled"; 79 #size-cells = <1>;
75 }; 80 reg = <0x8000c000 2000>, <0x8000a000 2000>;
76 81 reg-names = "gpmi-nand", "bch";
77 gpmi@8000c000 { 82 interrupts = <88>, <41>;
78 reg = <0x8000c000 2000>; 83 interrupt-names = "gpmi-dma", "bch";
79 interrupts = <42 88>; 84 fsl,gpmi-dma-channel = <4>;
80 status = "disabled"; 85 status = "disabled";
81 }; 86 };
82 87
@@ -161,7 +166,150 @@
161 166
162 duart_pins_a: duart@0 { 167 duart_pins_a: duart@0 {
163 reg = <0>; 168 reg = <0>;
164 fsl,pinmux-ids = <0x3102 0x3112>; 169 fsl,pinmux-ids = <
170 0x3102 /* MX28_PAD_PWM0__DUART_RX */
171 0x3112 /* MX28_PAD_PWM1__DUART_TX */
172 >;
173 fsl,drive-strength = <0>;
174 fsl,voltage = <1>;
175 fsl,pull-up = <0>;
176 };
177
178 duart_pins_b: duart@1 {
179 reg = <1>;
180 fsl,pinmux-ids = <
181 0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */
182 0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */
183 >;
184 fsl,drive-strength = <0>;
185 fsl,voltage = <1>;
186 fsl,pull-up = <0>;
187 };
188
189 duart_4pins_a: duart-4pins@0 {
190 reg = <0>;
191 fsl,pinmux-ids = <
192 0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */
193 0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */
194 0x3002 /* MX28_PAD_AUART0_RX__DUART_CTS */
195 0x3012 /* MX28_PAD_AUART0_TX__DUART_RTS */
196 >;
197 fsl,drive-strength = <0>;
198 fsl,voltage = <1>;
199 fsl,pull-up = <0>;
200 };
201
202 gpmi_pins_a: gpmi-nand@0 {
203 reg = <0>;
204 fsl,pinmux-ids = <
205 0x0000 /* MX28_PAD_GPMI_D00__GPMI_D0 */
206 0x0010 /* MX28_PAD_GPMI_D01__GPMI_D1 */
207 0x0020 /* MX28_PAD_GPMI_D02__GPMI_D2 */
208 0x0030 /* MX28_PAD_GPMI_D03__GPMI_D3 */
209 0x0040 /* MX28_PAD_GPMI_D04__GPMI_D4 */
210 0x0050 /* MX28_PAD_GPMI_D05__GPMI_D5 */
211 0x0060 /* MX28_PAD_GPMI_D06__GPMI_D6 */
212 0x0070 /* MX28_PAD_GPMI_D07__GPMI_D7 */
213 0x0100 /* MX28_PAD_GPMI_CE0N__GPMI_CE0N */
214 0x0140 /* MX28_PAD_GPMI_RDY0__GPMI_READY0 */
215 0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */
216 0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */
217 0x01a0 /* MX28_PAD_GPMI_ALE__GPMI_ALE */
218 0x01b0 /* MX28_PAD_GPMI_CLE__GPMI_CLE */
219 0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */
220 >;
221 fsl,drive-strength = <0>;
222 fsl,voltage = <1>;
223 fsl,pull-up = <0>;
224 };
225
226 gpmi_status_cfg: gpmi-status-cfg {
227 fsl,pinmux-ids = <
228 0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */
229 0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */
230 0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */
231 >;
232 fsl,drive-strength = <2>;
233 };
234
235 auart0_pins_a: auart0@0 {
236 reg = <0>;
237 fsl,pinmux-ids = <
238 0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */
239 0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */
240 0x3020 /* MX28_PAD_AUART0_CTS__AUART0_CTS */
241 0x3030 /* MX28_PAD_AUART0_RTS__AUART0_RTS */
242 >;
243 fsl,drive-strength = <0>;
244 fsl,voltage = <1>;
245 fsl,pull-up = <0>;
246 };
247
248 auart0_2pins_a: auart0-2pins@0 {
249 reg = <0>;
250 fsl,pinmux-ids = <
251 0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */
252 0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */
253 >;
254 fsl,drive-strength = <0>;
255 fsl,voltage = <1>;
256 fsl,pull-up = <0>;
257 };
258
259 auart1_pins_a: auart1@0 {
260 reg = <0>;
261 fsl,pinmux-ids = <
262 0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */
263 0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */
264 0x3060 /* MX28_PAD_AUART1_CTS__AUART1_CTS */
265 0x3070 /* MX28_PAD_AUART1_RTS__AUART1_RTS */
266 >;
267 fsl,drive-strength = <0>;
268 fsl,voltage = <1>;
269 fsl,pull-up = <0>;
270 };
271
272 auart1_2pins_a: auart1-2pins@0 {
273 reg = <0>;
274 fsl,pinmux-ids = <
275 0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */
276 0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */
277 >;
278 fsl,drive-strength = <0>;
279 fsl,voltage = <1>;
280 fsl,pull-up = <0>;
281 };
282
283 auart2_2pins_a: auart2-2pins@0 {
284 reg = <0>;
285 fsl,pinmux-ids = <
286 0x2101 /* MX28_PAD_SSP2_SCK__AUART2_RX */
287 0x2111 /* MX28_PAD_SSP2_MOSI__AUART2_TX */
288 >;
289 fsl,drive-strength = <0>;
290 fsl,voltage = <1>;
291 fsl,pull-up = <0>;
292 };
293
294 auart3_pins_a: auart3@0 {
295 reg = <0>;
296 fsl,pinmux-ids = <
297 0x30c0 /* MX28_PAD_AUART3_RX__AUART3_RX */
298 0x30d0 /* MX28_PAD_AUART3_TX__AUART3_TX */
299 0x30e0 /* MX28_PAD_AUART3_CTS__AUART3_CTS */
300 0x30f0 /* MX28_PAD_AUART3_RTS__AUART3_RTS */
301 >;
302 fsl,drive-strength = <0>;
303 fsl,voltage = <1>;
304 fsl,pull-up = <0>;
305 };
306
307 auart3_2pins_a: auart3-2pins@0 {
308 reg = <0>;
309 fsl,pinmux-ids = <
310 0x2121 /* MX28_PAD_SSP2_MISO__AUART3_RX */
311 0x2131 /* MX28_PAD_SSP2_SS0__AUART3_TX */
312 >;
165 fsl,drive-strength = <0>; 313 fsl,drive-strength = <0>;
166 fsl,voltage = <1>; 314 fsl,voltage = <1>;
167 fsl,pull-up = <0>; 315 fsl,pull-up = <0>;
@@ -169,9 +317,17 @@
169 317
170 mac0_pins_a: mac0@0 { 318 mac0_pins_a: mac0@0 {
171 reg = <0>; 319 reg = <0>;
172 fsl,pinmux-ids = <0x4000 0x4010 0x4020 320 fsl,pinmux-ids = <
173 0x4030 0x4040 0x4060 0x4070 321 0x4000 /* MX28_PAD_ENET0_MDC__ENET0_MDC */
174 0x4080 0x4100>; 322 0x4010 /* MX28_PAD_ENET0_MDIO__ENET0_MDIO */
323 0x4020 /* MX28_PAD_ENET0_RX_EN__ENET0_RX_EN */
324 0x4030 /* MX28_PAD_ENET0_RXD0__ENET0_RXD0 */
325 0x4040 /* MX28_PAD_ENET0_RXD1__ENET0_RXD1 */
326 0x4060 /* MX28_PAD_ENET0_TX_EN__ENET0_TX_EN */
327 0x4070 /* MX28_PAD_ENET0_TXD0__ENET0_TXD0 */
328 0x4080 /* MX28_PAD_ENET0_TXD1__ENET0_TXD1 */
329 0x4100 /* MX28_PAD_ENET_CLK__CLKCTRL_ENET */
330 >;
175 fsl,drive-strength = <1>; 331 fsl,drive-strength = <1>;
176 fsl,voltage = <1>; 332 fsl,voltage = <1>;
177 fsl,pull-up = <1>; 333 fsl,pull-up = <1>;
@@ -179,8 +335,14 @@
179 335
180 mac1_pins_a: mac1@0 { 336 mac1_pins_a: mac1@0 {
181 reg = <0>; 337 reg = <0>;
182 fsl,pinmux-ids = <0x40f1 0x4091 0x40a1 338 fsl,pinmux-ids = <
183 0x40e1 0x40b1 0x40c1>; 339 0x40f1 /* MX28_PAD_ENET0_CRS__ENET1_RX_EN */
340 0x4091 /* MX28_PAD_ENET0_RXD2__ENET1_RXD0 */
341 0x40a1 /* MX28_PAD_ENET0_RXD3__ENET1_RXD1 */
342 0x40e1 /* MX28_PAD_ENET0_COL__ENET1_TX_EN */
343 0x40b1 /* MX28_PAD_ENET0_TXD2__ENET1_TXD0 */
344 0x40c1 /* MX28_PAD_ENET0_TXD3__ENET1_TXD1 */
345 >;
184 fsl,drive-strength = <1>; 346 fsl,drive-strength = <1>;
185 fsl,voltage = <1>; 347 fsl,voltage = <1>;
186 fsl,pull-up = <1>; 348 fsl,pull-up = <1>;
@@ -188,28 +350,61 @@
188 350
189 mmc0_8bit_pins_a: mmc0-8bit@0 { 351 mmc0_8bit_pins_a: mmc0-8bit@0 {
190 reg = <0>; 352 reg = <0>;
191 fsl,pinmux-ids = <0x2000 0x2010 0x2020 353 fsl,pinmux-ids = <
192 0x2030 0x2040 0x2050 0x2060 354 0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */
193 0x2070 0x2080 0x2090 0x20a0>; 355 0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */
356 0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */
357 0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */
358 0x2040 /* MX28_PAD_SSP0_DATA4__SSP0_D4 */
359 0x2050 /* MX28_PAD_SSP0_DATA5__SSP0_D5 */
360 0x2060 /* MX28_PAD_SSP0_DATA6__SSP0_D6 */
361 0x2070 /* MX28_PAD_SSP0_DATA7__SSP0_D7 */
362 0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */
363 0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
364 0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
365 >;
366 fsl,drive-strength = <1>;
367 fsl,voltage = <1>;
368 fsl,pull-up = <1>;
369 };
370
371 mmc0_4bit_pins_a: mmc0-4bit@0 {
372 reg = <0>;
373 fsl,pinmux-ids = <
374 0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */
375 0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */
376 0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */
377 0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */
378 0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */
379 0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
380 0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
381 >;
194 fsl,drive-strength = <1>; 382 fsl,drive-strength = <1>;
195 fsl,voltage = <1>; 383 fsl,voltage = <1>;
196 fsl,pull-up = <1>; 384 fsl,pull-up = <1>;
197 }; 385 };
198 386
199 mmc0_cd_cfg: mmc0-cd-cfg { 387 mmc0_cd_cfg: mmc0-cd-cfg {
200 fsl,pinmux-ids = <0x2090>; 388 fsl,pinmux-ids = <
389 0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
390 >;
201 fsl,pull-up = <0>; 391 fsl,pull-up = <0>;
202 }; 392 };
203 393
204 mmc0_sck_cfg: mmc0-sck-cfg { 394 mmc0_sck_cfg: mmc0-sck-cfg {
205 fsl,pinmux-ids = <0x20a0>; 395 fsl,pinmux-ids = <
396 0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
397 >;
206 fsl,drive-strength = <2>; 398 fsl,drive-strength = <2>;
207 fsl,pull-up = <0>; 399 fsl,pull-up = <0>;
208 }; 400 };
209 401
210 i2c0_pins_a: i2c0@0 { 402 i2c0_pins_a: i2c0@0 {
211 reg = <0>; 403 reg = <0>;
212 fsl,pinmux-ids = <0x3180 0x3190>; 404 fsl,pinmux-ids = <
405 0x3180 /* MX28_PAD_I2C0_SCL__I2C0_SCL */
406 0x3190 /* MX28_PAD_I2C0_SDA__I2C0_SDA */
407 >;
213 fsl,drive-strength = <1>; 408 fsl,drive-strength = <1>;
214 fsl,voltage = <1>; 409 fsl,voltage = <1>;
215 fsl,pull-up = <1>; 410 fsl,pull-up = <1>;
@@ -217,8 +412,12 @@
217 412
218 saif0_pins_a: saif0@0 { 413 saif0_pins_a: saif0@0 {
219 reg = <0>; 414 reg = <0>;
220 fsl,pinmux-ids = 415 fsl,pinmux-ids = <
221 <0x3140 0x3150 0x3160 0x3170>; 416 0x3140 /* MX28_PAD_SAIF0_MCLK__SAIF0_MCLK */
417 0x3150 /* MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK */
418 0x3160 /* MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK */
419 0x3170 /* MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 */
420 >;
222 fsl,drive-strength = <2>; 421 fsl,drive-strength = <2>;
223 fsl,voltage = <1>; 422 fsl,voltage = <1>;
224 fsl,pull-up = <1>; 423 fsl,pull-up = <1>;
@@ -226,11 +425,88 @@
226 425
227 saif1_pins_a: saif1@0 { 426 saif1_pins_a: saif1@0 {
228 reg = <0>; 427 reg = <0>;
229 fsl,pinmux-ids = <0x31a0>; 428 fsl,pinmux-ids = <
429 0x31a0 /* MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 */
430 >;
230 fsl,drive-strength = <2>; 431 fsl,drive-strength = <2>;
231 fsl,voltage = <1>; 432 fsl,voltage = <1>;
232 fsl,pull-up = <1>; 433 fsl,pull-up = <1>;
233 }; 434 };
435
436 pwm0_pins_a: pwm0@0 {
437 reg = <0>;
438 fsl,pinmux-ids = <
439 0x3100 /* MX28_PAD_PWM0__PWM_0 */
440 >;
441 fsl,drive-strength = <0>;
442 fsl,voltage = <1>;
443 fsl,pull-up = <0>;
444 };
445
446 pwm2_pins_a: pwm2@0 {
447 reg = <0>;
448 fsl,pinmux-ids = <
449 0x3120 /* MX28_PAD_PWM2__PWM_2 */
450 >;
451 fsl,drive-strength = <0>;
452 fsl,voltage = <1>;
453 fsl,pull-up = <0>;
454 };
455
456 lcdif_24bit_pins_a: lcdif-24bit@0 {
457 reg = <0>;
458 fsl,pinmux-ids = <
459 0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */
460 0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */
461 0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */
462 0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */
463 0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */
464 0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */
465 0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */
466 0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */
467 0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */
468 0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */
469 0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */
470 0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */
471 0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */
472 0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */
473 0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */
474 0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */
475 0x1100 /* MX28_PAD_LCD_D16__LCD_D16 */
476 0x1110 /* MX28_PAD_LCD_D17__LCD_D17 */
477 0x1120 /* MX28_PAD_LCD_D18__LCD_D18 */
478 0x1130 /* MX28_PAD_LCD_D19__LCD_D19 */
479 0x1140 /* MX28_PAD_LCD_D20__LCD_D20 */
480 0x1150 /* MX28_PAD_LCD_D21__LCD_D21 */
481 0x1160 /* MX28_PAD_LCD_D22__LCD_D22 */
482 0x1170 /* MX28_PAD_LCD_D23__LCD_D23 */
483 >;
484 fsl,drive-strength = <0>;
485 fsl,voltage = <1>;
486 fsl,pull-up = <0>;
487 };
488
489 can0_pins_a: can0@0 {
490 reg = <0>;
491 fsl,pinmux-ids = <
492 0x0161 /* MX28_PAD_GPMI_RDY2__CAN0_TX */
493 0x0171 /* MX28_PAD_GPMI_RDY3__CAN0_RX */
494 >;
495 fsl,drive-strength = <0>;
496 fsl,voltage = <1>;
497 fsl,pull-up = <0>;
498 };
499
500 can1_pins_a: can1@0 {
501 reg = <0>;
502 fsl,pinmux-ids = <
503 0x0121 /* MX28_PAD_GPMI_CE2N__CAN1_TX */
504 0x0131 /* MX28_PAD_GPMI_CE3N__CAN1_RX */
505 >;
506 fsl,drive-strength = <0>;
507 fsl,voltage = <1>;
508 fsl,pull-up = <0>;
509 };
234 }; 510 };
235 511
236 digctl@8001c000 { 512 digctl@8001c000 {
@@ -272,18 +548,21 @@
272 }; 548 };
273 549
274 lcdif@80030000 { 550 lcdif@80030000 {
551 compatible = "fsl,imx28-lcdif";
275 reg = <0x80030000 2000>; 552 reg = <0x80030000 2000>;
276 interrupts = <38 86>; 553 interrupts = <38 86>;
277 status = "disabled"; 554 status = "disabled";
278 }; 555 };
279 556
280 can0: can@80032000 { 557 can0: can@80032000 {
558 compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
281 reg = <0x80032000 2000>; 559 reg = <0x80032000 2000>;
282 interrupts = <8>; 560 interrupts = <8>;
283 status = "disabled"; 561 status = "disabled";
284 }; 562 };
285 563
286 can1: can@80034000 { 564 can1: can@80034000 {
565 compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
287 reg = <0x80034000 2000>; 566 reg = <0x80034000 2000>;
288 interrupts = <9>; 567 interrupts = <9>;
289 status = "disabled"; 568 status = "disabled";
@@ -370,9 +649,9 @@
370 }; 649 };
371 650
372 rtc@80056000 { 651 rtc@80056000 {
652 compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
373 reg = <0x80056000 2000>; 653 reg = <0x80056000 2000>;
374 interrupts = <28 29>; 654 interrupts = <29>;
375 status = "disabled";
376 }; 655 };
377 656
378 i2c0: i2c@80058000 { 657 i2c0: i2c@80058000 {
@@ -393,8 +672,11 @@
393 status = "disabled"; 672 status = "disabled";
394 }; 673 };
395 674
396 pwm@80064000 { 675 pwm: pwm@80064000 {
676 compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
397 reg = <0x80064000 2000>; 677 reg = <0x80064000 2000>;
678 #pwm-cells = <2>;
679 fsl,pwm-number = <8>;
398 status = "disabled"; 680 status = "disabled";
399 }; 681 };
400 682
@@ -404,30 +686,35 @@
404 }; 686 };
405 687
406 auart0: serial@8006a000 { 688 auart0: serial@8006a000 {
689 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
407 reg = <0x8006a000 0x2000>; 690 reg = <0x8006a000 0x2000>;
408 interrupts = <112 70 71>; 691 interrupts = <112 70 71>;
409 status = "disabled"; 692 status = "disabled";
410 }; 693 };
411 694
412 auart1: serial@8006c000 { 695 auart1: serial@8006c000 {
696 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
413 reg = <0x8006c000 0x2000>; 697 reg = <0x8006c000 0x2000>;
414 interrupts = <113 72 73>; 698 interrupts = <113 72 73>;
415 status = "disabled"; 699 status = "disabled";
416 }; 700 };
417 701
418 auart2: serial@8006e000 { 702 auart2: serial@8006e000 {
703 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
419 reg = <0x8006e000 0x2000>; 704 reg = <0x8006e000 0x2000>;
420 interrupts = <114 74 75>; 705 interrupts = <114 74 75>;
421 status = "disabled"; 706 status = "disabled";
422 }; 707 };
423 708
424 auart3: serial@80070000 { 709 auart3: serial@80070000 {
710 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
425 reg = <0x80070000 0x2000>; 711 reg = <0x80070000 0x2000>;
426 interrupts = <115 76 77>; 712 interrupts = <115 76 77>;
427 status = "disabled"; 713 status = "disabled";
428 }; 714 };
429 715
430 auart4: serial@80072000 { 716 auart4: serial@80072000 {
717 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
431 reg = <0x80072000 0x2000>; 718 reg = <0x80072000 0x2000>;
432 interrupts = <116 78 79>; 719 interrupts = <116 78 79>;
433 status = "disabled"; 720 status = "disabled";
@@ -441,11 +728,13 @@
441 }; 728 };
442 729
443 usbphy0: usbphy@8007c000 { 730 usbphy0: usbphy@8007c000 {
731 compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
444 reg = <0x8007c000 0x2000>; 732 reg = <0x8007c000 0x2000>;
445 status = "disabled"; 733 status = "disabled";
446 }; 734 };
447 735
448 usbphy1: usbphy@8007e000 { 736 usbphy1: usbphy@8007e000 {
737 compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
449 reg = <0x8007e000 0x2000>; 738 reg = <0x8007e000 0x2000>;
450 status = "disabled"; 739 status = "disabled";
451 }; 740 };
@@ -459,13 +748,19 @@
459 reg = <0x80080000 0x80000>; 748 reg = <0x80080000 0x80000>;
460 ranges; 749 ranges;
461 750
462 usbctrl0: usbctrl@80080000 { 751 usb0: usb@80080000 {
752 compatible = "fsl,imx28-usb", "fsl,imx27-usb";
463 reg = <0x80080000 0x10000>; 753 reg = <0x80080000 0x10000>;
754 interrupts = <93>;
755 fsl,usbphy = <&usbphy0>;
464 status = "disabled"; 756 status = "disabled";
465 }; 757 };
466 758
467 usbctrl1: usbctrl@80090000 { 759 usb1: usb@80090000 {
760 compatible = "fsl,imx28-usb", "fsl,imx27-usb";
468 reg = <0x80090000 0x10000>; 761 reg = <0x80090000 0x10000>;
762 interrupts = <92>;
763 fsl,usbphy = <&usbphy1>;
469 status = "disabled"; 764 status = "disabled";
470 }; 765 };
471 766
diff --git a/arch/arm/boot/dts/imx31-bug.dts b/arch/arm/boot/dts/imx31-bug.dts
new file mode 100644
index 000000000000..24731cb78e8e
--- /dev/null
+++ b/arch/arm/boot/dts/imx31-bug.dts
@@ -0,0 +1,31 @@
1/*
2 * Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13/include/ "imx31.dtsi"
14
15/ {
16 model = "Buglabs i.MX31 Bug 1.x";
17 compatible = "fsl,imx31-bug", "fsl,imx31";
18
19 memory {
20 reg = <0x80000000 0x8000000>; /* 128M */
21 };
22
23 soc {
24 aips@43f00000 { /* AIPS1 */
25 uart5: serial@43fb4000 {
26 fsl,uart-has-rtscts;
27 status = "okay";
28 };
29 };
30 };
31};
diff --git a/arch/arm/boot/dts/imx31.dtsi b/arch/arm/boot/dts/imx31.dtsi
new file mode 100644
index 000000000000..eef7099f3e3c
--- /dev/null
+++ b/arch/arm/boot/dts/imx31.dtsi
@@ -0,0 +1,88 @@
1/*
2 * Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 aliases {
16 serial0 = &uart1;
17 serial1 = &uart2;
18 serial2 = &uart3;
19 serial3 = &uart4;
20 serial4 = &uart5;
21 };
22
23 avic: avic-interrupt-controller@60000000 {
24 compatible = "fsl,imx31-avic", "fsl,avic";
25 interrupt-controller;
26 #interrupt-cells = <1>;
27 reg = <0x60000000 0x100000>;
28 };
29
30 soc {
31 #address-cells = <1>;
32 #size-cells = <1>;
33 compatible = "simple-bus";
34 interrupt-parent = <&avic>;
35 ranges;
36
37 aips@43f00000 { /* AIPS1 */
38 compatible = "fsl,aips-bus", "simple-bus";
39 #address-cells = <1>;
40 #size-cells = <1>;
41 reg = <0x43f00000 0x100000>;
42 ranges;
43
44 uart1: serial@43f90000 {
45 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
46 reg = <0x43f90000 0x4000>;
47 interrupts = <45>;
48 status = "disabled";
49 };
50
51 uart2: serial@43f94000 {
52 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
53 reg = <0x43f94000 0x4000>;
54 interrupts = <32>;
55 status = "disabled";
56 };
57
58 uart4: serial@43fb0000 {
59 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
60 reg = <0x43fb0000 0x4000>;
61 interrupts = <46>;
62 status = "disabled";
63 };
64
65 uart5: serial@43fb4000 {
66 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
67 reg = <0x43fb4000 0x4000>;
68 interrupts = <47>;
69 status = "disabled";
70 };
71 };
72
73 spba@50000000 {
74 compatible = "fsl,spba-bus", "simple-bus";
75 #address-cells = <1>;
76 #size-cells = <1>;
77 reg = <0x50000000 0x100000>;
78 ranges;
79
80 uart3: serial@5000c000 {
81 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
82 reg = <0x5000c000 0x4000>;
83 interrupts = <18>;
84 status = "disabled";
85 };
86 };
87 };
88};
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index bfa65abe8ef2..922adefdd291 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -133,7 +133,7 @@
133 gpio-controller; 133 gpio-controller;
134 #gpio-cells = <2>; 134 #gpio-cells = <2>;
135 interrupt-controller; 135 interrupt-controller;
136 #interrupt-cells = <1>; 136 #interrupt-cells = <2>;
137 }; 137 };
138 138
139 gpio2: gpio@73f88000 { 139 gpio2: gpio@73f88000 {
@@ -143,7 +143,7 @@
143 gpio-controller; 143 gpio-controller;
144 #gpio-cells = <2>; 144 #gpio-cells = <2>;
145 interrupt-controller; 145 interrupt-controller;
146 #interrupt-cells = <1>; 146 #interrupt-cells = <2>;
147 }; 147 };
148 148
149 gpio3: gpio@73f8c000 { 149 gpio3: gpio@73f8c000 {
@@ -153,7 +153,7 @@
153 gpio-controller; 153 gpio-controller;
154 #gpio-cells = <2>; 154 #gpio-cells = <2>;
155 interrupt-controller; 155 interrupt-controller;
156 #interrupt-cells = <1>; 156 #interrupt-cells = <2>;
157 }; 157 };
158 158
159 gpio4: gpio@73f90000 { 159 gpio4: gpio@73f90000 {
@@ -163,7 +163,7 @@
163 gpio-controller; 163 gpio-controller;
164 #gpio-cells = <2>; 164 #gpio-cells = <2>;
165 interrupt-controller; 165 interrupt-controller;
166 #interrupt-cells = <1>; 166 #interrupt-cells = <2>;
167 }; 167 };
168 168
169 wdog@73f98000 { /* WDOG1 */ 169 wdog@73f98000 { /* WDOG1 */
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index e3e869470cd3..4e735edc78ed 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -135,7 +135,7 @@
135 gpio-controller; 135 gpio-controller;
136 #gpio-cells = <2>; 136 #gpio-cells = <2>;
137 interrupt-controller; 137 interrupt-controller;
138 #interrupt-cells = <1>; 138 #interrupt-cells = <2>;
139 }; 139 };
140 140
141 gpio2: gpio@53f88000 { 141 gpio2: gpio@53f88000 {
@@ -145,7 +145,7 @@
145 gpio-controller; 145 gpio-controller;
146 #gpio-cells = <2>; 146 #gpio-cells = <2>;
147 interrupt-controller; 147 interrupt-controller;
148 #interrupt-cells = <1>; 148 #interrupt-cells = <2>;
149 }; 149 };
150 150
151 gpio3: gpio@53f8c000 { 151 gpio3: gpio@53f8c000 {
@@ -155,7 +155,7 @@
155 gpio-controller; 155 gpio-controller;
156 #gpio-cells = <2>; 156 #gpio-cells = <2>;
157 interrupt-controller; 157 interrupt-controller;
158 #interrupt-cells = <1>; 158 #interrupt-cells = <2>;
159 }; 159 };
160 160
161 gpio4: gpio@53f90000 { 161 gpio4: gpio@53f90000 {
@@ -165,7 +165,7 @@
165 gpio-controller; 165 gpio-controller;
166 #gpio-cells = <2>; 166 #gpio-cells = <2>;
167 interrupt-controller; 167 interrupt-controller;
168 #interrupt-cells = <1>; 168 #interrupt-cells = <2>;
169 }; 169 };
170 170
171 wdog@53f98000 { /* WDOG1 */ 171 wdog@53f98000 { /* WDOG1 */
@@ -203,7 +203,7 @@
203 gpio-controller; 203 gpio-controller;
204 #gpio-cells = <2>; 204 #gpio-cells = <2>;
205 interrupt-controller; 205 interrupt-controller;
206 #interrupt-cells = <1>; 206 #interrupt-cells = <2>;
207 }; 207 };
208 208
209 gpio6: gpio@53fe0000 { 209 gpio6: gpio@53fe0000 {
@@ -213,7 +213,7 @@
213 gpio-controller; 213 gpio-controller;
214 #gpio-cells = <2>; 214 #gpio-cells = <2>;
215 interrupt-controller; 215 interrupt-controller;
216 #interrupt-cells = <1>; 216 #interrupt-cells = <2>;
217 }; 217 };
218 218
219 gpio7: gpio@53fe4000 { 219 gpio7: gpio@53fe4000 {
@@ -223,7 +223,7 @@
223 gpio-controller; 223 gpio-controller;
224 #gpio-cells = <2>; 224 #gpio-cells = <2>;
225 interrupt-controller; 225 interrupt-controller;
226 #interrupt-cells = <1>; 226 #interrupt-cells = <2>;
227 }; 227 };
228 228
229 i2c@53fec000 { /* I2C3 */ 229 i2c@53fec000 { /* I2C3 */
diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts
index db4c6096c562..d792581672cc 100644
--- a/arch/arm/boot/dts/imx6q-arm2.dts
+++ b/arch/arm/boot/dts/imx6q-arm2.dts
@@ -22,6 +22,12 @@
22 }; 22 };
23 23
24 soc { 24 soc {
25 gpmi-nand@00112000 {
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_gpmi_nand_1>;
28 status = "disabled"; /* gpmi nand conflicts with SD */
29 };
30
25 aips-bus@02100000 { /* AIPS2 */ 31 aips-bus@02100000 { /* AIPS2 */
26 ethernet@02188000 { 32 ethernet@02188000 {
27 phy-mode = "rgmii"; 33 phy-mode = "rgmii";
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index e0ec92973e7e..d42e851ceb97 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -27,6 +27,8 @@
27 ecspi@02008000 { /* eCSPI1 */ 27 ecspi@02008000 { /* eCSPI1 */
28 fsl,spi-num-chipselects = <1>; 28 fsl,spi-num-chipselects = <1>;
29 cs-gpios = <&gpio3 19 0>; 29 cs-gpios = <&gpio3 19 0>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&pinctrl_ecspi1_1>;
30 status = "okay"; 32 status = "okay";
31 33
32 flash: m25p80@0 { 34 flash: m25p80@0 {
@@ -42,9 +44,31 @@
42 }; 44 };
43 }; 45 };
44 46
47 iomuxc@020e0000 {
48 pinctrl-names = "default";
49 pinctrl-0 = <&pinctrl_gpio_hog>;
50
51 gpios {
52 pinctrl_gpio_hog: gpiohog {
53 fsl,pins = <
54 144 0x80000000 /* MX6Q_PAD_EIM_D22__GPIO_3_22 */
55 121 0x80000000 /* MX6Q_PAD_EIM_D19__GPIO_3_19 */
56 >;
57 };
58 };
59 };
45 }; 60 };
46 61
47 aips-bus@02100000 { /* AIPS2 */ 62 aips-bus@02100000 { /* AIPS2 */
63 usb@02184000 { /* USB OTG */
64 vbus-supply = <&reg_usb_otg_vbus>;
65 status = "okay";
66 };
67
68 usb@02184200 { /* USB1 */
69 status = "okay";
70 };
71
48 ethernet@02188000 { 72 ethernet@02188000 {
49 phy-mode = "rgmii"; 73 phy-mode = "rgmii";
50 phy-reset-gpios = <&gpio3 23 0>; 74 phy-reset-gpios = <&gpio3 23 0>;
@@ -111,6 +135,15 @@
111 regulator-max-microvolt = <3300000>; 135 regulator-max-microvolt = <3300000>;
112 regulator-always-on; 136 regulator-always-on;
113 }; 137 };
138
139 reg_usb_otg_vbus: usb_otg_vbus {
140 compatible = "regulator-fixed";
141 regulator-name = "usb_otg_vbus";
142 regulator-min-microvolt = <5000000>;
143 regulator-max-microvolt = <5000000>;
144 gpio = <&gpio3 22 0>;
145 enable-active-high;
146 };
114 }; 147 };
115 148
116 sound { 149 sound {
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 8c90cbac945f..c25d49584814 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -87,6 +87,23 @@
87 interrupt-parent = <&intc>; 87 interrupt-parent = <&intc>;
88 ranges; 88 ranges;
89 89
90 dma-apbh@00110000 {
91 compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
92 reg = <0x00110000 0x2000>;
93 };
94
95 gpmi-nand@00112000 {
96 compatible = "fsl,imx6q-gpmi-nand";
97 #address-cells = <1>;
98 #size-cells = <1>;
99 reg = <0x00112000 0x2000>, <0x00114000 0x2000>;
100 reg-names = "gpmi-nand", "bch";
101 interrupts = <0 13 0x04>, <0 15 0x04>;
102 interrupt-names = "gpmi-dma", "bch";
103 fsl,gpmi-dma-channel = <0>;
104 status = "disabled";
105 };
106
90 timer@00a00600 { 107 timer@00a00600 {
91 compatible = "arm,cortex-a9-twd-timer"; 108 compatible = "arm,cortex-a9-twd-timer";
92 reg = <0x00a00600 0x20>; 109 reg = <0x00a00600 0x20>;
@@ -266,7 +283,7 @@
266 gpio-controller; 283 gpio-controller;
267 #gpio-cells = <2>; 284 #gpio-cells = <2>;
268 interrupt-controller; 285 interrupt-controller;
269 #interrupt-cells = <1>; 286 #interrupt-cells = <2>;
270 }; 287 };
271 288
272 gpio2: gpio@020a0000 { 289 gpio2: gpio@020a0000 {
@@ -276,7 +293,7 @@
276 gpio-controller; 293 gpio-controller;
277 #gpio-cells = <2>; 294 #gpio-cells = <2>;
278 interrupt-controller; 295 interrupt-controller;
279 #interrupt-cells = <1>; 296 #interrupt-cells = <2>;
280 }; 297 };
281 298
282 gpio3: gpio@020a4000 { 299 gpio3: gpio@020a4000 {
@@ -286,7 +303,7 @@
286 gpio-controller; 303 gpio-controller;
287 #gpio-cells = <2>; 304 #gpio-cells = <2>;
288 interrupt-controller; 305 interrupt-controller;
289 #interrupt-cells = <1>; 306 #interrupt-cells = <2>;
290 }; 307 };
291 308
292 gpio4: gpio@020a8000 { 309 gpio4: gpio@020a8000 {
@@ -296,7 +313,7 @@
296 gpio-controller; 313 gpio-controller;
297 #gpio-cells = <2>; 314 #gpio-cells = <2>;
298 interrupt-controller; 315 interrupt-controller;
299 #interrupt-cells = <1>; 316 #interrupt-cells = <2>;
300 }; 317 };
301 318
302 gpio5: gpio@020ac000 { 319 gpio5: gpio@020ac000 {
@@ -306,7 +323,7 @@
306 gpio-controller; 323 gpio-controller;
307 #gpio-cells = <2>; 324 #gpio-cells = <2>;
308 interrupt-controller; 325 interrupt-controller;
309 #interrupt-cells = <1>; 326 #interrupt-cells = <2>;
310 }; 327 };
311 328
312 gpio6: gpio@020b0000 { 329 gpio6: gpio@020b0000 {
@@ -316,7 +333,7 @@
316 gpio-controller; 333 gpio-controller;
317 #gpio-cells = <2>; 334 #gpio-cells = <2>;
318 interrupt-controller; 335 interrupt-controller;
319 #interrupt-cells = <1>; 336 #interrupt-cells = <2>;
320 }; 337 };
321 338
322 gpio7: gpio@020b4000 { 339 gpio7: gpio@020b4000 {
@@ -326,7 +343,7 @@
326 gpio-controller; 343 gpio-controller;
327 #gpio-cells = <2>; 344 #gpio-cells = <2>;
328 interrupt-controller; 345 interrupt-controller;
329 #interrupt-cells = <1>; 346 #interrupt-cells = <2>;
330 }; 347 };
331 348
332 kpp@020b8000 { 349 kpp@020b8000 {
@@ -444,12 +461,14 @@
444 }; 461 };
445 }; 462 };
446 463
447 usbphy@020c9000 { /* USBPHY1 */ 464 usbphy1: usbphy@020c9000 {
465 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
448 reg = <0x020c9000 0x1000>; 466 reg = <0x020c9000 0x1000>;
449 interrupts = <0 44 0x04>; 467 interrupts = <0 44 0x04>;
450 }; 468 };
451 469
452 usbphy@020ca000 { /* USBPHY2 */ 470 usbphy2: usbphy@020ca000 {
471 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
453 reg = <0x020ca000 0x1000>; 472 reg = <0x020ca000 0x1000>;
454 interrupts = <0 45 0x04>; 473 interrupts = <0 45 0x04>;
455 }; 474 };
@@ -495,6 +514,30 @@
495 }; 514 };
496 }; 515 };
497 516
517 gpmi-nand {
518 pinctrl_gpmi_nand_1: gpmi-nand-1 {
519 fsl,pins = <1328 0xb0b1 /* MX6Q_PAD_NANDF_CLE__RAWNAND_CLE */
520 1336 0xb0b1 /* MX6Q_PAD_NANDF_ALE__RAWNAND_ALE */
521 1344 0xb0b1 /* MX6Q_PAD_NANDF_WP_B__RAWNAND_RESETN */
522 1352 0xb000 /* MX6Q_PAD_NANDF_RB0__RAWNAND_READY0 */
523 1360 0xb0b1 /* MX6Q_PAD_NANDF_CS0__RAWNAND_CE0N */
524 1365 0xb0b1 /* MX6Q_PAD_NANDF_CS1__RAWNAND_CE1N */
525 1371 0xb0b1 /* MX6Q_PAD_NANDF_CS2__RAWNAND_CE2N */
526 1378 0xb0b1 /* MX6Q_PAD_NANDF_CS3__RAWNAND_CE3N */
527 1387 0xb0b1 /* MX6Q_PAD_SD4_CMD__RAWNAND_RDN */
528 1393 0xb0b1 /* MX6Q_PAD_SD4_CLK__RAWNAND_WRN */
529 1397 0xb0b1 /* MX6Q_PAD_NANDF_D0__RAWNAND_D0 */
530 1405 0xb0b1 /* MX6Q_PAD_NANDF_D1__RAWNAND_D1 */
531 1413 0xb0b1 /* MX6Q_PAD_NANDF_D2__RAWNAND_D2 */
532 1421 0xb0b1 /* MX6Q_PAD_NANDF_D3__RAWNAND_D3 */
533 1429 0xb0b1 /* MX6Q_PAD_NANDF_D4__RAWNAND_D4 */
534 1437 0xb0b1 /* MX6Q_PAD_NANDF_D5__RAWNAND_D5 */
535 1445 0xb0b1 /* MX6Q_PAD_NANDF_D6__RAWNAND_D6 */
536 1453 0xb0b1 /* MX6Q_PAD_NANDF_D7__RAWNAND_D7 */
537 1463 0x00b1>; /* MX6Q_PAD_SD4_DAT0__RAWNAND_DQS */
538 };
539 };
540
498 i2c1 { 541 i2c1 {
499 pinctrl_i2c1_1: i2c1grp-1 { 542 pinctrl_i2c1_1: i2c1grp-1 {
500 fsl,pins = <137 0x4001b8b1 /* MX6Q_PAD_EIM_D21__I2C1_SCL */ 543 fsl,pins = <137 0x4001b8b1 /* MX6Q_PAD_EIM_D21__I2C1_SCL */
@@ -538,6 +581,14 @@
538 1517 0x17059>; /* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */ 581 1517 0x17059>; /* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */
539 }; 582 };
540 }; 583 };
584
585 ecspi1 {
586 pinctrl_ecspi1_1: ecspi1grp-1 {
587 fsl,pins = <101 0x100b1 /* MX6Q_PAD_EIM_D17__ECSPI1_MISO */
588 109 0x100b1 /* MX6Q_PAD_EIM_D18__ECSPI1_MOSI */
589 94 0x100b1>; /* MX6Q_PAD_EIM_D16__ECSPI1_SCLK */
590 };
591 };
541 }; 592 };
542 593
543 dcic@020e4000 { /* DCIC1 */ 594 dcic@020e4000 { /* DCIC1 */
@@ -573,6 +624,36 @@
573 reg = <0x0217c000 0x4000>; 624 reg = <0x0217c000 0x4000>;
574 }; 625 };
575 626
627 usb@02184000 { /* USB OTG */
628 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
629 reg = <0x02184000 0x200>;
630 interrupts = <0 43 0x04>;
631 fsl,usbphy = <&usbphy1>;
632 status = "disabled";
633 };
634
635 usb@02184200 { /* USB1 */
636 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
637 reg = <0x02184200 0x200>;
638 interrupts = <0 40 0x04>;
639 fsl,usbphy = <&usbphy2>;
640 status = "disabled";
641 };
642
643 usb@02184400 { /* USB2 */
644 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
645 reg = <0x02184400 0x200>;
646 interrupts = <0 41 0x04>;
647 status = "disabled";
648 };
649
650 usb@02184600 { /* USB3 */
651 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
652 reg = <0x02184600 0x200>;
653 interrupts = <0 42 0x04>;
654 status = "disabled";
655 };
656
576 ethernet@02188000 { 657 ethernet@02188000 {
577 compatible = "fsl,imx6q-fec"; 658 compatible = "fsl,imx6q-fec";
578 reg = <0x02188000 0x4000>; 659 reg = <0x02188000 0x4000>;
diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
index 3f5dad801a98..e5ffe960dbf3 100644
--- a/arch/arm/boot/dts/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/lpc32xx.dtsi
@@ -35,13 +35,14 @@
35 slc: flash@20020000 { 35 slc: flash@20020000 {
36 compatible = "nxp,lpc3220-slc"; 36 compatible = "nxp,lpc3220-slc";
37 reg = <0x20020000 0x1000>; 37 reg = <0x20020000 0x1000>;
38 status = "disable"; 38 status = "disabled";
39 }; 39 };
40 40
41 mlc: flash@200B0000 { 41 mlc: flash@200a8000 {
42 compatible = "nxp,lpc3220-mlc"; 42 compatible = "nxp,lpc3220-mlc";
43 reg = <0x200B0000 0x1000>; 43 reg = <0x200a8000 0x11000>;
44 status = "disable"; 44 interrupts = <11 0>;
45 status = "disabled";
45 }; 46 };
46 47
47 dma@31000000 { 48 dma@31000000 {
@@ -57,21 +58,21 @@
57 compatible = "nxp,ohci-nxp", "usb-ohci"; 58 compatible = "nxp,ohci-nxp", "usb-ohci";
58 reg = <0x31020000 0x300>; 59 reg = <0x31020000 0x300>;
59 interrupts = <0x3b 0>; 60 interrupts = <0x3b 0>;
60 status = "disable"; 61 status = "disabled";
61 }; 62 };
62 63
63 usbd@31020000 { 64 usbd@31020000 {
64 compatible = "nxp,lpc3220-udc"; 65 compatible = "nxp,lpc3220-udc";
65 reg = <0x31020000 0x300>; 66 reg = <0x31020000 0x300>;
66 interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>; 67 interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>;
67 status = "disable"; 68 status = "disabled";
68 }; 69 };
69 70
70 clcd@31040000 { 71 clcd@31040000 {
71 compatible = "arm,pl110", "arm,primecell"; 72 compatible = "arm,pl110", "arm,primecell";
72 reg = <0x31040000 0x1000>; 73 reg = <0x31040000 0x1000>;
73 interrupts = <0x0e 0>; 74 interrupts = <0x0e 0>;
74 status = "disable"; 75 status = "disabled";
75 }; 76 };
76 77
77 mac: ethernet@31060000 { 78 mac: ethernet@31060000 {
@@ -114,9 +115,10 @@
114 }; 115 };
115 116
116 sd@20098000 { 117 sd@20098000 {
117 compatible = "arm,pl180", "arm,primecell"; 118 compatible = "arm,pl18x", "arm,primecell";
118 reg = <0x20098000 0x1000>; 119 reg = <0x20098000 0x1000>;
119 interrupts = <0x0f 0>, <0x0d 0>; 120 interrupts = <0x0f 0>, <0x0d 0>;
121 status = "disabled";
120 }; 122 };
121 123
122 i2s1: i2s@2009C000 { 124 i2s1: i2s@2009C000 {
@@ -124,24 +126,42 @@
124 reg = <0x2009C000 0x1000>; 126 reg = <0x2009C000 0x1000>;
125 }; 127 };
126 128
129 /* UART5 first since it is the default console, ttyS0 */
130 uart5: serial@40090000 {
131 /* actually, ns16550a w/ 64 byte fifos! */
132 compatible = "nxp,lpc3220-uart";
133 reg = <0x40090000 0x1000>;
134 interrupts = <9 0>;
135 clock-frequency = <13000000>;
136 reg-shift = <2>;
137 status = "disabled";
138 };
139
127 uart3: serial@40080000 { 140 uart3: serial@40080000 {
128 compatible = "nxp,serial"; 141 compatible = "nxp,lpc3220-uart";
129 reg = <0x40080000 0x1000>; 142 reg = <0x40080000 0x1000>;
143 interrupts = <7 0>;
144 clock-frequency = <13000000>;
145 reg-shift = <2>;
146 status = "disabled";
130 }; 147 };
131 148
132 uart4: serial@40088000 { 149 uart4: serial@40088000 {
133 compatible = "nxp,serial"; 150 compatible = "nxp,lpc3220-uart";
134 reg = <0x40088000 0x1000>; 151 reg = <0x40088000 0x1000>;
135 }; 152 interrupts = <8 0>;
136 153 clock-frequency = <13000000>;
137 uart5: serial@40090000 { 154 reg-shift = <2>;
138 compatible = "nxp,serial"; 155 status = "disabled";
139 reg = <0x40090000 0x1000>;
140 }; 156 };
141 157
142 uart6: serial@40098000 { 158 uart6: serial@40098000 {
143 compatible = "nxp,serial"; 159 compatible = "nxp,lpc3220-uart";
144 reg = <0x40098000 0x1000>; 160 reg = <0x40098000 0x1000>;
161 interrupts = <10 0>;
162 clock-frequency = <13000000>;
163 reg-shift = <2>;
164 status = "disabled";
145 }; 165 };
146 166
147 i2c1: i2c@400A0000 { 167 i2c1: i2c@400A0000 {
@@ -192,18 +212,24 @@
192 }; 212 };
193 213
194 uart1: serial@40014000 { 214 uart1: serial@40014000 {
195 compatible = "nxp,serial"; 215 compatible = "nxp,lpc3220-hsuart";
196 reg = <0x40014000 0x1000>; 216 reg = <0x40014000 0x1000>;
217 interrupts = <26 0>;
218 status = "disabled";
197 }; 219 };
198 220
199 uart2: serial@40018000 { 221 uart2: serial@40018000 {
200 compatible = "nxp,serial"; 222 compatible = "nxp,lpc3220-hsuart";
201 reg = <0x40018000 0x1000>; 223 reg = <0x40018000 0x1000>;
224 interrupts = <25 0>;
225 status = "disabled";
202 }; 226 };
203 227
204 uart7: serial@4001C000 { 228 uart7: serial@4001c000 {
205 compatible = "nxp,serial"; 229 compatible = "nxp,lpc3220-hsuart";
206 reg = <0x4001C000 0x1000>; 230 reg = <0x4001c000 0x1000>;
231 interrupts = <24 0>;
232 status = "disabled";
207 }; 233 };
208 234
209 rtc@40024000 { 235 rtc@40024000 {
@@ -235,21 +261,28 @@
235 compatible = "nxp,lpc3220-adc"; 261 compatible = "nxp,lpc3220-adc";
236 reg = <0x40048000 0x1000>; 262 reg = <0x40048000 0x1000>;
237 interrupts = <0x27 0>; 263 interrupts = <0x27 0>;
238 status = "disable"; 264 status = "disabled";
239 }; 265 };
240 266
241 tsc@40048000 { 267 tsc@40048000 {
242 compatible = "nxp,lpc3220-tsc"; 268 compatible = "nxp,lpc3220-tsc";
243 reg = <0x40048000 0x1000>; 269 reg = <0x40048000 0x1000>;
244 interrupts = <0x27 0>; 270 interrupts = <0x27 0>;
245 status = "disable"; 271 status = "disabled";
246 }; 272 };
247 273
248 key@40050000 { 274 key@40050000 {
249 compatible = "nxp,lpc3220-key"; 275 compatible = "nxp,lpc3220-key";
250 reg = <0x40050000 0x1000>; 276 reg = <0x40050000 0x1000>;
277 interrupts = <54 0>;
278 status = "disabled";
251 }; 279 };
252 280
281 pwm: pwm@4005C000 {
282 compatible = "nxp,lpc3220-pwm";
283 reg = <0x4005C000 0x8>;
284 status = "disabled";
285 };
253 }; 286 };
254 }; 287 };
255}; 288};
diff --git a/arch/arm/boot/dts/omap2420-h4.dts b/arch/arm/boot/dts/omap2420-h4.dts
new file mode 100644
index 000000000000..25b50b759dec
--- /dev/null
+++ b/arch/arm/boot/dts/omap2420-h4.dts
@@ -0,0 +1,20 @@
1/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10/include/ "omap2.dtsi"
11
12/ {
13 model = "TI OMAP2420 H4 board";
14 compatible = "ti,omap2420-h4", "ti,omap2420", "ti,omap2";
15
16 memory {
17 device_type = "memory";
18 reg = <0x80000000 0x84000000>; /* 64 MB */
19 };
20};
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index 5b4506c0a8c4..cdcb98c7e075 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -61,9 +61,9 @@
61}; 61};
62 62
63&mmc2 { 63&mmc2 {
64 status = "disable"; 64 status = "disabled";
65}; 65};
66 66
67&mmc3 { 67&mmc3 {
68 status = "disable"; 68 status = "disabled";
69}; 69};
diff --git a/arch/arm/boot/dts/omap3-evm.dts b/arch/arm/boot/dts/omap3-evm.dts
index 2eee16ec59b4..f349ee9182ce 100644
--- a/arch/arm/boot/dts/omap3-evm.dts
+++ b/arch/arm/boot/dts/omap3-evm.dts
@@ -18,3 +18,31 @@
18 reg = <0x80000000 0x10000000>; /* 256 MB */ 18 reg = <0x80000000 0x10000000>; /* 256 MB */
19 }; 19 };
20}; 20};
21
22&i2c1 {
23 clock-frequency = <2600000>;
24
25 twl: twl@48 {
26 reg = <0x48>;
27 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
28 interrupt-parent = <&intc>;
29 };
30};
31
32/include/ "twl4030.dtsi"
33
34&i2c2 {
35 clock-frequency = <400000>;
36};
37
38&i2c3 {
39 clock-frequency = <400000>;
40
41 /*
42 * TVP5146 Video decoder-in for analog input support.
43 */
44 tvp5146@5c {
45 compatible = "ti,tvp5146m2";
46 reg = <0x5c>;
47 };
48};
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 99474fa5fac4..810947198208 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -215,5 +215,10 @@
215 compatible = "ti,omap3-hsmmc"; 215 compatible = "ti,omap3-hsmmc";
216 ti,hwmods = "mmc3"; 216 ti,hwmods = "mmc3";
217 }; 217 };
218
219 wdt2: wdt@48314000 {
220 compatible = "ti,omap3-wdt";
221 ti,hwmods = "wd_timer2";
222 };
218 }; 223 };
219}; 224};
diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts
index 1efe0c587985..9880c12877b3 100644
--- a/arch/arm/boot/dts/omap4-panda.dts
+++ b/arch/arm/boot/dts/omap4-panda.dts
@@ -32,6 +32,30 @@
32 linux,default-trigger = "mmc0"; 32 linux,default-trigger = "mmc0";
33 }; 33 };
34 }; 34 };
35
36 sound: sound {
37 compatible = "ti,abe-twl6040";
38 ti,model = "PandaBoard";
39
40 ti,mclk-freq = <38400000>;
41
42 ti,mcpdm = <&mcpdm>;
43
44 ti,twl6040 = <&twl6040>;
45
46 /* Audio routing */
47 ti,audio-routing =
48 "Headset Stereophone", "HSOL",
49 "Headset Stereophone", "HSOR",
50 "Ext Spk", "HFL",
51 "Ext Spk", "HFR",
52 "Line Out", "AUXL",
53 "Line Out", "AUXR",
54 "HSMIC", "Headset Mic",
55 "Headset Mic", "Headset Mic Bias",
56 "AFML", "Line In",
57 "AFMR", "Line In";
58 };
35}; 59};
36 60
37&i2c1 { 61&i2c1 {
@@ -43,6 +67,19 @@
43 interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */ 67 interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */
44 interrupt-parent = <&gic>; 68 interrupt-parent = <&gic>;
45 }; 69 };
70
71 twl6040: twl@4b {
72 compatible = "ti,twl6040";
73 reg = <0x4b>;
74 /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
75 interrupts = <0 119 4>; /* IRQ_SYS_2N cascaded to gic */
76 interrupt-parent = <&gic>;
77 ti,audpwron-gpio = <&gpio4 31 0>; /* gpio line 127 */
78
79 vio-supply = <&v1v8>;
80 v2v1-supply = <&v2v1>;
81 enable-active-high;
82 };
46}; 83};
47 84
48/include/ "twl6030.dtsi" 85/include/ "twl6030.dtsi"
@@ -74,15 +111,15 @@
74}; 111};
75 112
76&mmc2 { 113&mmc2 {
77 status = "disable"; 114 status = "disabled";
78}; 115};
79 116
80&mmc3 { 117&mmc3 {
81 status = "disable"; 118 status = "disabled";
82}; 119};
83 120
84&mmc4 { 121&mmc4 {
85 status = "disable"; 122 status = "disabled";
86}; 123};
87 124
88&mmc5 { 125&mmc5 {
diff --git a/arch/arm/boot/dts/omap4-pandaES.dts b/arch/arm/boot/dts/omap4-pandaES.dts
new file mode 100644
index 000000000000..d4ba43a48d9b
--- /dev/null
+++ b/arch/arm/boot/dts/omap4-pandaES.dts
@@ -0,0 +1,24 @@
1/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/include/ "omap4-panda.dts"
9
10/* Audio routing is differnet between PandaBoard4430 and PandaBoardES */
11&sound {
12 ti,model = "PandaBoardES";
13
14 /* Audio routing */
15 ti,audio-routing =
16 "Headset Stereophone", "HSOL",
17 "Headset Stereophone", "HSOR",
18 "Ext Spk", "HFL",
19 "Ext Spk", "HFR",
20 "Line Out", "AUXL",
21 "Line Out", "AUXR",
22 "AFML", "Line In",
23 "AFMR", "Line In";
24};
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index d08c4d137280..72216e932fc0 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -28,6 +28,14 @@
28 regulator-boot-on; 28 regulator-boot-on;
29 }; 29 };
30 30
31 vbat: fixedregulator@2 {
32 compatible = "regulator-fixed";
33 regulator-name = "VBAT";
34 regulator-min-microvolt = <3750000>;
35 regulator-max-microvolt = <3750000>;
36 regulator-boot-on;
37 };
38
31 leds { 39 leds {
32 compatible = "gpio-leds"; 40 compatible = "gpio-leds";
33 debug0 { 41 debug0 {
@@ -70,6 +78,41 @@
70 gpios = <&gpio5 11 0>; /* 139 */ 78 gpios = <&gpio5 11 0>; /* 139 */
71 }; 79 };
72 }; 80 };
81
82 sound {
83 compatible = "ti,abe-twl6040";
84 ti,model = "SDP4430";
85
86 ti,jack-detection = <1>;
87 ti,mclk-freq = <38400000>;
88
89 ti,mcpdm = <&mcpdm>;
90 ti,dmic = <&dmic>;
91
92 ti,twl6040 = <&twl6040>;
93
94 /* Audio routing */
95 ti,audio-routing =
96 "Headset Stereophone", "HSOL",
97 "Headset Stereophone", "HSOR",
98 "Earphone Spk", "EP",
99 "Ext Spk", "HFL",
100 "Ext Spk", "HFR",
101 "Line Out", "AUXL",
102 "Line Out", "AUXR",
103 "Vibrator", "VIBRAL",
104 "Vibrator", "VIBRAR",
105 "HSMIC", "Headset Mic",
106 "Headset Mic", "Headset Mic Bias",
107 "MAINMIC", "Main Handset Mic",
108 "Main Handset Mic", "Main Mic Bias",
109 "SUBMIC", "Sub Handset Mic",
110 "Sub Handset Mic", "Main Mic Bias",
111 "AFML", "Line In",
112 "AFMR", "Line In",
113 "DMic", "Digital Mic",
114 "Digital Mic", "Digital Mic1 Bias";
115 };
73}; 116};
74 117
75&i2c1 { 118&i2c1 {
@@ -81,6 +124,31 @@
81 interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */ 124 interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */
82 interrupt-parent = <&gic>; 125 interrupt-parent = <&gic>;
83 }; 126 };
127
128 twl6040: twl@4b {
129 compatible = "ti,twl6040";
130 reg = <0x4b>;
131 /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
132 interrupts = <0 119 4>; /* IRQ_SYS_2N cascaded to gic */
133 interrupt-parent = <&gic>;
134 ti,audpwron-gpio = <&gpio4 31 0>; /* gpio line 127 */
135
136 vio-supply = <&v1v8>;
137 v2v1-supply = <&v2v1>;
138 enable-active-high;
139
140 /* regulators for vibra motor */
141 vddvibl-supply = <&vbat>;
142 vddvibr-supply = <&vbat>;
143
144 vibra {
145 /* Vibra driver, motor resistance parameters */
146 ti,vibldrv-res = <8>;
147 ti,vibrdrv-res = <3>;
148 ti,viblmotor-res = <10>;
149 ti,vibrmotor-res = <10>;
150 };
151 };
84}; 152};
85 153
86/include/ "twl6030.dtsi" 154/include/ "twl6030.dtsi"
@@ -147,11 +215,11 @@
147}; 215};
148 216
149&mmc3 { 217&mmc3 {
150 status = "disable"; 218 status = "disabled";
151}; 219};
152 220
153&mmc4 { 221&mmc4 {
154 status = "disable"; 222 status = "disabled";
155}; 223};
156 224
157&mmc5 { 225&mmc5 {
diff --git a/arch/arm/boot/dts/omap4-var_som.dts b/arch/arm/boot/dts/omap4-var_som.dts
new file mode 100644
index 000000000000..6601e6af6092
--- /dev/null
+++ b/arch/arm/boot/dts/omap4-var_som.dts
@@ -0,0 +1,96 @@
1/*
2 * Copyright (C) 2012 Variscite Ltd. - http://www.variscite.com
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10/include/ "omap4.dtsi"
11
12/ {
13 model = "Variscite OMAP4 SOM";
14 compatible = "var,omap4-var_som", "ti,omap4430", "ti,omap4";
15
16 memory {
17 device_type = "memory";
18 reg = <0x80000000 0x40000000>; /* 1 GB */
19 };
20
21 vdd_eth: fixedregulator@0 {
22 compatible = "regulator-fixed";
23 regulator-name = "VDD_ETH";
24 regulator-min-microvolt = <3300000>;
25 regulator-max-microvolt = <3300000>;
26 enable-active-high;
27 regulator-boot-on;
28 };
29};
30
31&i2c1 {
32 clock-frequency = <400000>;
33
34 twl: twl@48 {
35 reg = <0x48>;
36 /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */
37 interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */
38 interrupt-parent = <&gic>;
39 };
40};
41
42/include/ "twl6030.dtsi"
43
44&i2c2 {
45 clock-frequency = <400000>;
46};
47
48&i2c3 {
49 clock-frequency = <400000>;
50
51 /*
52 * Temperature Sensor
53 * http://www.ti.com/lit/ds/symlink/tmp105.pdf
54 */
55 tmp105@49 {
56 compatible = "ti,tmp105";
57 reg = <0x49>;
58 };
59};
60
61&i2c4 {
62 clock-frequency = <400000>;
63};
64
65&mcspi1 {
66 eth@0 {
67 compatible = "ks8851";
68 spi-max-frequency = <24000000>;
69 reg = <0>;
70 interrupt-parent = <&gpio6>;
71 interrupts = <11>; /* gpio line 171 */
72 vdd-supply = <&vdd_eth>;
73 };
74};
75
76&mmc1 {
77 vmmc-supply = <&vmmc>;
78 ti,bus-width = <8>;
79 ti,non-removable;
80};
81
82&mmc2 {
83 status = "disabled";
84};
85
86&mmc3 {
87 status = "disabled";
88};
89
90&mmc4 {
91 status = "disabled";
92};
93
94&mmc5 {
95 ti,bus-width = <4>;
96};
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 359c4979c8aa..04cbbcb6ff91 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -272,5 +272,28 @@
272 ti,hwmods = "mmc5"; 272 ti,hwmods = "mmc5";
273 ti,needs-special-reset; 273 ti,needs-special-reset;
274 }; 274 };
275
276 wdt2: wdt@4a314000 {
277 compatible = "ti,omap4-wdt", "ti,omap3-wdt";
278 ti,hwmods = "wd_timer2";
279 };
280
281 mcpdm: mcpdm@40132000 {
282 compatible = "ti,omap4-mcpdm";
283 reg = <0x40132000 0x7f>, /* MPU private access */
284 <0x49032000 0x7f>; /* L3 Interconnect */
285 interrupts = <0 112 0x4>;
286 interrupt-parent = <&gic>;
287 ti,hwmods = "mcpdm";
288 };
289
290 dmic: dmic@4012e000 {
291 compatible = "ti,omap4-dmic";
292 reg = <0x4012e000 0x7f>, /* MPU private access */
293 <0x4902e000 0x7f>; /* L3 Interconnect */
294 interrupts = <0 114 0x4>;
295 interrupt-parent = <&gic>;
296 ti,hwmods = "dmic";
297 };
275 }; 298 };
276}; 299};
diff --git a/arch/arm/boot/dts/phy3250.dts b/arch/arm/boot/dts/phy3250.dts
index c4ff6d1a018b..802ec5b2fd00 100644
--- a/arch/arm/boot/dts/phy3250.dts
+++ b/arch/arm/boot/dts/phy3250.dts
@@ -54,6 +54,17 @@
54 #address-cells = <1>; 54 #address-cells = <1>;
55 #size-cells = <1>; 55 #size-cells = <1>;
56 56
57 nxp,wdr-clks = <14>;
58 nxp,wwidth = <40000000>;
59 nxp,whold = <100000000>;
60 nxp,wsetup = <100000000>;
61 nxp,rdr-clks = <14>;
62 nxp,rwidth = <40000000>;
63 nxp,rhold = <66666666>;
64 nxp,rsetup = <100000000>;
65 nand-on-flash-bbt;
66 gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
67
57 mtd0@00000000 { 68 mtd0@00000000 {
58 label = "phy3250-boot"; 69 label = "phy3250-boot";
59 reg = <0x00000000 0x00064000>; 70 reg = <0x00000000 0x00064000>;
@@ -83,6 +94,14 @@
83 }; 94 };
84 95
85 apb { 96 apb {
97 uart5: serial@40090000 {
98 status = "okay";
99 };
100
101 uart3: serial@40080000 {
102 status = "okay";
103 };
104
86 i2c1: i2c@400A0000 { 105 i2c1: i2c@400A0000 {
87 clock-frequency = <100000>; 106 clock-frequency = <100000>;
88 107
@@ -114,16 +133,58 @@
114 }; 133 };
115 134
116 ssp0: ssp@20084000 { 135 ssp0: ssp@20084000 {
136 #address-cells = <1>;
137 #size-cells = <0>;
138 pl022,num-chipselects = <1>;
139 cs-gpios = <&gpio 3 5 0>;
140
117 eeprom: at25@0 { 141 eeprom: at25@0 {
142 pl022,hierarchy = <0>;
143 pl022,interface = <0>;
144 pl022,slave-tx-disable = <0>;
145 pl022,com-mode = <0>;
146 pl022,rx-level-trig = <1>;
147 pl022,tx-level-trig = <1>;
148 pl022,ctrl-len = <11>;
149 pl022,wait-state = <0>;
150 pl022,duplex = <0>;
151
152 at25,byte-len = <0x8000>;
153 at25,addr-mode = <2>;
154 at25,page-size = <64>;
155
118 compatible = "atmel,at25"; 156 compatible = "atmel,at25";
157 reg = <0>;
158 spi-max-frequency = <5000000>;
119 }; 159 };
120 }; 160 };
161
162 sd@20098000 {
163 wp-gpios = <&gpio 3 0 0>;
164 cd-gpios = <&gpio 3 1 0>;
165 cd-inverted;
166 bus-width = <4>;
167 status = "okay";
168 };
121 }; 169 };
122 170
123 fab { 171 fab {
172 uart2: serial@40018000 {
173 status = "okay";
174 };
175
124 tsc@40048000 { 176 tsc@40048000 {
125 status = "okay"; 177 status = "okay";
126 }; 178 };
179
180 key@40050000 {
181 status = "okay";
182 keypad,num-rows = <1>;
183 keypad,num-columns = <1>;
184 nxp,debounce-delay-ms = <3>;
185 nxp,scan-delay-ms = <34>;
186 linux,keymap = <0x00000002>;
187 };
127 }; 188 };
128 }; 189 };
129 190
diff --git a/arch/arm/boot/dts/snowball.dts b/arch/arm/boot/dts/snowball.dts
index ec3c33975110..7e334d4cae21 100644
--- a/arch/arm/boot/dts/snowball.dts
+++ b/arch/arm/boot/dts/snowball.dts
@@ -77,6 +77,8 @@
77 used-led { 77 used-led {
78 label = "user_led"; 78 label = "user_led";
79 gpios = <&gpio4 14 0x4>; 79 gpios = <&gpio4 14 0x4>;
80 default-state = "on";
81 linux,default-trigger = "heartbeat";
80 }; 82 };
81 }; 83 };
82 84
@@ -101,15 +103,30 @@
101 }; 103 };
102 }; 104 };
103 105
106 // External Micro SD slot
104 sdi@80126000 { 107 sdi@80126000 {
105 status = "enabled"; 108 arm,primecell-periphid = <0x10480180>;
109 max-frequency = <50000000>;
110 bus-width = <8>;
111 mmc-cap-mmc-highspeed;
106 vmmc-supply = <&ab8500_ldo_aux3_reg>; 112 vmmc-supply = <&ab8500_ldo_aux3_reg>;
113
114 #gpio-cells = <1>;
107 cd-gpios = <&gpio6 26 0x4>; // 218 115 cd-gpios = <&gpio6 26 0x4>; // 218
116 cd-inverted;
117
118 status = "okay";
108 }; 119 };
109 120
121 // On-board eMMC
110 sdi@80114000 { 122 sdi@80114000 {
111 status = "enabled"; 123 arm,primecell-periphid = <0x10480180>;
124 max-frequency = <50000000>;
125 bus-width = <8>;
126 mmc-cap-mmc-highspeed;
112 vmmc-supply = <&ab8500_ldo_aux2_reg>; 127 vmmc-supply = <&ab8500_ldo_aux2_reg>;
128
129 status = "okay";
113 }; 130 };
114 131
115 uart@80120000 { 132 uart@80120000 {
diff --git a/arch/arm/boot/dts/spear13xx.dtsi b/arch/arm/boot/dts/spear13xx.dtsi
index 10dcec7e7321..f7b84aced654 100644
--- a/arch/arm/boot/dts/spear13xx.dtsi
+++ b/arch/arm/boot/dts/spear13xx.dtsi
@@ -43,8 +43,8 @@
43 43
44 pmu { 44 pmu {
45 compatible = "arm,cortex-a9-pmu"; 45 compatible = "arm,cortex-a9-pmu";
46 interrupts = <0 8 0x04 46 interrupts = <0 6 0x04
47 0 9 0x04>; 47 0 7 0x04>;
48 }; 48 };
49 49
50 L2: l2-cache { 50 L2: l2-cache {
@@ -119,8 +119,8 @@
119 gmac0: eth@e2000000 { 119 gmac0: eth@e2000000 {
120 compatible = "st,spear600-gmac"; 120 compatible = "st,spear600-gmac";
121 reg = <0xe2000000 0x8000>; 121 reg = <0xe2000000 0x8000>;
122 interrupts = <0 23 0x4 122 interrupts = <0 33 0x4
123 0 24 0x4>; 123 0 34 0x4>;
124 interrupt-names = "macirq", "eth_wake_irq"; 124 interrupt-names = "macirq", "eth_wake_irq";
125 status = "disabled"; 125 status = "disabled";
126 }; 126 };
@@ -202,6 +202,7 @@
202 kbd@e0300000 { 202 kbd@e0300000 {
203 compatible = "st,spear300-kbd"; 203 compatible = "st,spear300-kbd";
204 reg = <0xe0300000 0x1000>; 204 reg = <0xe0300000 0x1000>;
205 interrupts = <0 52 0x4>;
205 status = "disabled"; 206 status = "disabled";
206 }; 207 };
207 208
@@ -224,7 +225,7 @@
224 serial@e0000000 { 225 serial@e0000000 {
225 compatible = "arm,pl011", "arm,primecell"; 226 compatible = "arm,pl011", "arm,primecell";
226 reg = <0xe0000000 0x1000>; 227 reg = <0xe0000000 0x1000>;
227 interrupts = <0 36 0x4>; 228 interrupts = <0 35 0x4>;
228 status = "disabled"; 229 status = "disabled";
229 }; 230 };
230 231
diff --git a/arch/arm/boot/dts/spear320-evb.dts b/arch/arm/boot/dts/spear320-evb.dts
index c13fd1f3b09f..e4e912f95024 100644
--- a/arch/arm/boot/dts/spear320-evb.dts
+++ b/arch/arm/boot/dts/spear320-evb.dts
@@ -15,8 +15,8 @@
15/include/ "spear320.dtsi" 15/include/ "spear320.dtsi"
16 16
17/ { 17/ {
18 model = "ST SPEAr300 Evaluation Board"; 18 model = "ST SPEAr320 Evaluation Board";
19 compatible = "st,spear300-evb", "st,spear300"; 19 compatible = "st,spear320-evb", "st,spear320";
20 #address-cells = <1>; 20 #address-cells = <1>;
21 #size-cells = <1>; 21 #size-cells = <1>;
22 22
@@ -26,7 +26,7 @@
26 26
27 ahb { 27 ahb {
28 pinmux@b3000000 { 28 pinmux@b3000000 {
29 st,pinmux-mode = <3>; 29 st,pinmux-mode = <4>;
30 pinctrl-names = "default"; 30 pinctrl-names = "default";
31 pinctrl-0 = <&state_default>; 31 pinctrl-0 = <&state_default>;
32 32
diff --git a/arch/arm/boot/dts/spear600.dtsi b/arch/arm/boot/dts/spear600.dtsi
index 089f0a42c50e..a3c36e47d7ef 100644
--- a/arch/arm/boot/dts/spear600.dtsi
+++ b/arch/arm/boot/dts/spear600.dtsi
@@ -181,6 +181,7 @@
181 timer@f0000000 { 181 timer@f0000000 {
182 compatible = "st,spear-timer"; 182 compatible = "st,spear-timer";
183 reg = <0xf0000000 0x400>; 183 reg = <0xf0000000 0x400>;
184 interrupt-parent = <&vic0>;
184 interrupts = <16>; 185 interrupts = <16>;
185 }; 186 };
186 }; 187 };
diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts
index 7de701365fce..f146dbf6f7f8 100644
--- a/arch/arm/boot/dts/tegra-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -307,7 +307,6 @@
307 cd-gpios = <&gpio 58 0>; /* gpio PH2 */ 307 cd-gpios = <&gpio 58 0>; /* gpio PH2 */
308 wp-gpios = <&gpio 59 0>; /* gpio PH3 */ 308 wp-gpios = <&gpio 59 0>; /* gpio PH3 */
309 power-gpios = <&gpio 70 0>; /* gpio PI6 */ 309 power-gpios = <&gpio 70 0>; /* gpio PI6 */
310 support-8bit;
311 bus-width = <8>; 310 bus-width = <8>;
312 }; 311 };
313 312
diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index bfeb117d5aea..684a9e1ff7e9 100644
--- a/arch/arm/boot/dts/tegra-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -301,7 +301,6 @@
301 301
302 sdhci@c8000600 { 302 sdhci@c8000600 {
303 status = "okay"; 303 status = "okay";
304 support-8bit;
305 bus-width = <8>; 304 bus-width = <8>;
306 }; 305 };
307 306
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index 89cb7f2acd92..85e621ab2968 100644
--- a/arch/arm/boot/dts/tegra-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -64,11 +64,6 @@
64 nvidia,pins = "dap4"; 64 nvidia,pins = "dap4";
65 nvidia,function = "dap4"; 65 nvidia,function = "dap4";
66 }; 66 };
67 ddc {
68 nvidia,pins = "ddc", "owc", "spdi", "spdo",
69 "uac";
70 nvidia,function = "rsvd2";
71 };
72 dta { 67 dta {
73 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; 68 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
74 nvidia,function = "vi"; 69 nvidia,function = "vi";
@@ -129,14 +124,14 @@
129 "lspi", "lvp1", "lvs"; 124 "lspi", "lvp1", "lvs";
130 nvidia,function = "displaya"; 125 nvidia,function = "displaya";
131 }; 126 };
127 owc {
128 nvidia,pins = "owc", "spdi", "spdo", "uac";
129 nvidia,function = "rsvd2";
130 };
132 pmc { 131 pmc {
133 nvidia,pins = "pmc"; 132 nvidia,pins = "pmc";
134 nvidia,function = "pwr_on"; 133 nvidia,function = "pwr_on";
135 }; 134 };
136 pta {
137 nvidia,pins = "pta";
138 nvidia,function = "i2c2";
139 };
140 rm { 135 rm {
141 nvidia,pins = "rm"; 136 nvidia,pins = "rm";
142 nvidia,function = "i2c1"; 137 nvidia,function = "i2c1";
@@ -176,7 +171,7 @@
176 conf_ata { 171 conf_ata {
177 nvidia,pins = "ata", "atb", "atc", "atd", 172 nvidia,pins = "ata", "atb", "atc", "atd",
178 "cdev1", "cdev2", "dap1", "dap2", 173 "cdev1", "cdev2", "dap1", "dap2",
179 "dap4", "dtf", "gma", "gmc", "gmd", 174 "dap4", "ddc", "dtf", "gma", "gmc", "gmd",
180 "gme", "gpu", "gpu7", "i2cp", "irrx", 175 "gme", "gpu", "gpu7", "i2cp", "irrx",
181 "irtx", "pta", "rm", "sdc", "sdd", 176 "irtx", "pta", "rm", "sdc", "sdd",
182 "slxd", "slxk", "spdi", "spdo", "uac", 177 "slxd", "slxk", "spdi", "spdo", "uac",
@@ -185,7 +180,7 @@
185 nvidia,tristate = <0>; 180 nvidia,tristate = <0>;
186 }; 181 };
187 conf_ate { 182 conf_ate {
188 nvidia,pins = "ate", "csus", "dap3", "ddc", 183 nvidia,pins = "ate", "csus", "dap3",
189 "gpv", "owc", "slxc", "spib", "spid", 184 "gpv", "owc", "slxc", "spib", "spid",
190 "spie"; 185 "spie";
191 nvidia,pull = <0>; 186 nvidia,pull = <0>;
@@ -255,6 +250,39 @@
255 nvidia,slew-rate-falling = <3>; 250 nvidia,slew-rate-falling = <3>;
256 }; 251 };
257 }; 252 };
253
254 state_i2cmux_ddc: pinmux_i2cmux_ddc {
255 ddc {
256 nvidia,pins = "ddc";
257 nvidia,function = "i2c2";
258 };
259 pta {
260 nvidia,pins = "pta";
261 nvidia,function = "rsvd4";
262 };
263 };
264
265 state_i2cmux_pta: pinmux_i2cmux_pta {
266 ddc {
267 nvidia,pins = "ddc";
268 nvidia,function = "rsvd4";
269 };
270 pta {
271 nvidia,pins = "pta";
272 nvidia,function = "i2c2";
273 };
274 };
275
276 state_i2cmux_idle: pinmux_i2cmux_idle {
277 ddc {
278 nvidia,pins = "ddc";
279 nvidia,function = "rsvd4";
280 };
281 pta {
282 nvidia,pins = "pta";
283 nvidia,function = "rsvd4";
284 };
285 };
258 }; 286 };
259 287
260 i2s@70002800 { 288 i2s@70002800 {
@@ -303,12 +331,37 @@
303 i2c@7000c400 { 331 i2c@7000c400 {
304 status = "okay"; 332 status = "okay";
305 clock-frequency = <100000>; 333 clock-frequency = <100000>;
334 };
335
336 i2cmux {
337 compatible = "i2c-mux-pinctrl";
338 #address-cells = <1>;
339 #size-cells = <0>;
340
341 i2c-parent = <&{/i2c@7000c400}>;
306 342
307 smart-battery@b { 343 pinctrl-names = "ddc", "pta", "idle";
308 compatible = "ti,bq20z75", "smart-battery-1.1"; 344 pinctrl-0 = <&state_i2cmux_ddc>;
309 reg = <0xb>; 345 pinctrl-1 = <&state_i2cmux_pta>;
310 ti,i2c-retry-count = <2>; 346 pinctrl-2 = <&state_i2cmux_idle>;
311 ti,poll-retry-count = <10>; 347
348 i2c@0 {
349 reg = <0>;
350 #address-cells = <1>;
351 #size-cells = <0>;
352 };
353
354 i2c@1 {
355 reg = <1>;
356 #address-cells = <1>;
357 #size-cells = <0>;
358
359 smart-battery@b {
360 compatible = "ti,bq20z75", "smart-battery-1.1";
361 reg = <0xb>;
362 ti,i2c-retry-count = <2>;
363 ti,poll-retry-count = <10>;
364 };
312 }; 365 };
313 }; 366 };
314 367
@@ -334,7 +387,7 @@
334 }; 387 };
335 }; 388 };
336 389
337 emc { 390 memory-controller@0x7000f400 {
338 emc-table@190000 { 391 emc-table@190000 {
339 reg = <190000>; 392 reg = <190000>;
340 compatible = "nvidia,tegra20-emc-table"; 393 compatible = "nvidia,tegra20-emc-table";
@@ -397,7 +450,6 @@
397 450
398 sdhci@c8000600 { 451 sdhci@c8000600 {
399 status = "okay"; 452 status = "okay";
400 support-8bit;
401 bus-width = <8>; 453 bus-width = <8>;
402 }; 454 };
403 455
diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index 9de5636023f6..9de5636023f6 100644
--- a/arch/arm/boot/dts/tegra-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index 445343b0fbdd..be90544e6b59 100644
--- a/arch/arm/boot/dts/tegra-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -314,7 +314,6 @@
314 314
315 sdhci@c8000600 { 315 sdhci@c8000600 {
316 status = "okay"; 316 status = "okay";
317 support-8bit;
318 bus-width = <8>; 317 bus-width = <8>;
319 }; 318 };
320 319
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts
new file mode 100644
index 000000000000..6916310bf58f
--- /dev/null
+++ b/arch/arm/boot/dts/tegra20-whistler.dts
@@ -0,0 +1,301 @@
1/dts-v1/;
2
3/include/ "tegra20.dtsi"
4
5/ {
6 model = "NVIDIA Tegra2 Whistler evaluation board";
7 compatible = "nvidia,whistler", "nvidia,tegra20";
8
9 memory {
10 reg = <0x00000000 0x20000000>;
11 };
12
13 pinmux {
14 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>;
16
17 state_default: pinmux {
18 ata {
19 nvidia,pins = "ata", "atb", "ate", "gma", "gmb",
20 "gmc", "gmd", "gpu";
21 nvidia,function = "gmi";
22 };
23 atc {
24 nvidia,pins = "atc", "atd";
25 nvidia,function = "sdio4";
26 };
27 cdev1 {
28 nvidia,pins = "cdev1";
29 nvidia,function = "plla_out";
30 };
31 cdev2 {
32 nvidia,pins = "cdev2";
33 nvidia,function = "osc";
34 };
35 crtp {
36 nvidia,pins = "crtp";
37 nvidia,function = "crt";
38 };
39 csus {
40 nvidia,pins = "csus";
41 nvidia,function = "vi_sensor_clk";
42 };
43 dap1 {
44 nvidia,pins = "dap1";
45 nvidia,function = "dap1";
46 };
47 dap2 {
48 nvidia,pins = "dap2";
49 nvidia,function = "dap2";
50 };
51 dap3 {
52 nvidia,pins = "dap3";
53 nvidia,function = "dap3";
54 };
55 dap4 {
56 nvidia,pins = "dap4";
57 nvidia,function = "dap4";
58 };
59 ddc {
60 nvidia,pins = "ddc";
61 nvidia,function = "i2c2";
62 };
63 dta {
64 nvidia,pins = "dta", "dtb", "dtc", "dtd";
65 nvidia,function = "vi";
66 };
67 dte {
68 nvidia,pins = "dte";
69 nvidia,function = "rsvd1";
70 };
71 dtf {
72 nvidia,pins = "dtf";
73 nvidia,function = "i2c3";
74 };
75 gme {
76 nvidia,pins = "gme";
77 nvidia,function = "dap5";
78 };
79 gpu7 {
80 nvidia,pins = "gpu7";
81 nvidia,function = "rtck";
82 };
83 gpv {
84 nvidia,pins = "gpv";
85 nvidia,function = "pcie";
86 };
87 hdint {
88 nvidia,pins = "hdint", "pta";
89 nvidia,function = "hdmi";
90 };
91 i2cp {
92 nvidia,pins = "i2cp";
93 nvidia,function = "i2cp";
94 };
95 irrx {
96 nvidia,pins = "irrx", "irtx";
97 nvidia,function = "uartb";
98 };
99 kbca {
100 nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
101 nvidia,function = "kbc";
102 };
103 kbcb {
104 nvidia,pins = "kbcb", "kbcd";
105 nvidia,function = "sdio2";
106 };
107 lcsn {
108 nvidia,pins = "lcsn", "lsck", "lsda", "lsdi",
109 "spia", "spib", "spic";
110 nvidia,function = "spi3";
111 };
112 ld0 {
113 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
114 "ld5", "ld6", "ld7", "ld8", "ld9",
115 "ld10", "ld11", "ld12", "ld13", "ld14",
116 "ld15", "ld16", "ld17", "ldc", "ldi",
117 "lhp0", "lhp1", "lhp2", "lhs", "lm0",
118 "lm1", "lpp", "lpw0", "lpw1", "lpw2",
119 "lsc0", "lsc1", "lspi", "lvp0", "lvp1",
120 "lvs";
121 nvidia,function = "displaya";
122 };
123 owc {
124 nvidia,pins = "owc", "uac";
125 nvidia,function = "owr";
126 };
127 pmc {
128 nvidia,pins = "pmc";
129 nvidia,function = "pwr_on";
130 };
131 rm {
132 nvidia,pins = "rm";
133 nvidia,function = "i2c1";
134 };
135 sdb {
136 nvidia,pins = "sdb", "sdc", "sdd", "slxa",
137 "slxc", "slxd", "slxk";
138 nvidia,function = "sdio3";
139 };
140 sdio1 {
141 nvidia,pins = "sdio1";
142 nvidia,function = "sdio1";
143 };
144 spdi {
145 nvidia,pins = "spdi", "spdo";
146 nvidia,function = "rsvd2";
147 };
148 spid {
149 nvidia,pins = "spid", "spie", "spig", "spih";
150 nvidia,function = "spi2_alt";
151 };
152 spif {
153 nvidia,pins = "spif";
154 nvidia,function = "spi2";
155 };
156 uaa {
157 nvidia,pins = "uaa", "uab";
158 nvidia,function = "uarta";
159 };
160 uad {
161 nvidia,pins = "uad";
162 nvidia,function = "irda";
163 };
164 uca {
165 nvidia,pins = "uca", "ucb";
166 nvidia,function = "uartc";
167 };
168 uda {
169 nvidia,pins = "uda";
170 nvidia,function = "spi1";
171 };
172 conf_ata {
173 nvidia,pins = "ata", "atb", "atc", "ddc", "gma",
174 "gmb", "gmc", "gmd", "irrx", "irtx",
175 "kbca", "kbcb", "kbcc", "kbcd", "kbce",
176 "kbcf", "sdc", "sdd", "spie", "spig",
177 "spih", "uaa", "uab", "uad", "uca",
178 "ucb";
179 nvidia,pull = <2>;
180 nvidia,tristate = <0>;
181 };
182 conf_atd {
183 nvidia,pins = "atd", "ate", "cdev1", "csus",
184 "dap1", "dap2", "dap3", "dap4", "dte",
185 "dtf", "gpu", "gpu7", "gpv", "i2cp",
186 "rm", "sdio1", "slxa", "slxc", "slxd",
187 "slxk", "spdi", "spdo", "uac", "uda";
188 nvidia,pull = <0>;
189 nvidia,tristate = <0>;
190 };
191 conf_cdev2 {
192 nvidia,pins = "cdev2", "spia", "spib";
193 nvidia,pull = <1>;
194 nvidia,tristate = <1>;
195 };
196 conf_ck32 {
197 nvidia,pins = "ck32", "ddrc", "lc", "pmca",
198 "pmcb", "pmcc", "pmcd", "xm2c",
199 "xm2d";
200 nvidia,pull = <0>;
201 };
202 conf_crtp {
203 nvidia,pins = "crtp";
204 nvidia,pull = <0>;
205 nvidia,tristate = <1>;
206 };
207 conf_dta {
208 nvidia,pins = "dta", "dtb", "dtc", "dtd",
209 "spid", "spif";
210 nvidia,pull = <1>;
211 nvidia,tristate = <0>;
212 };
213 conf_gme {
214 nvidia,pins = "gme", "owc", "pta", "spic";
215 nvidia,pull = <2>;
216 nvidia,tristate = <1>;
217 };
218 conf_ld17_0 {
219 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
220 "ld23_22";
221 nvidia,pull = <1>;
222 };
223 conf_ls {
224 nvidia,pins = "ls", "pmce";
225 nvidia,pull = <2>;
226 };
227 drive_dap1 {
228 nvidia,pins = "drive_dap1";
229 nvidia,high-speed-mode = <0>;
230 nvidia,schmitt = <1>;
231 nvidia,low-power-mode = <0>;
232 nvidia,pull-down-strength = <0>;
233 nvidia,pull-up-strength = <0>;
234 nvidia,slew-rate-rising = <0>;
235 nvidia,slew-rate-falling = <0>;
236 };
237 };
238 };
239
240 i2s@70002800 {
241 status = "okay";
242 };
243
244 serial@70006000 {
245 status = "okay";
246 clock-frequency = <216000000>;
247 };
248
249 i2c@7000d000 {
250 status = "okay";
251 clock-frequency = <100000>;
252
253 codec: codec@1a {
254 compatible = "wlf,wm8753";
255 reg = <0x1a>;
256 };
257
258 tca6416: gpio@20 {
259 compatible = "ti,tca6416";
260 reg = <0x20>;
261 gpio-controller;
262 #gpio-cells = <2>;
263 };
264 };
265
266 usb@c5000000 {
267 status = "okay";
268 nvidia,vbus-gpio = <&tca6416 0 0>; /* GPIO_PMU0 */
269 };
270
271 usb@c5008000 {
272 status = "okay";
273 nvidia,vbus-gpio = <&tca6416 1 0>; /* GPIO_PMU1 */
274 };
275
276 sdhci@c8000400 {
277 status = "okay";
278 wp-gpios = <&gpio 173 0>; /* gpio PV5 */
279 bus-width = <8>;
280 };
281
282 sdhci@c8000600 {
283 status = "okay";
284 bus-width = <8>;
285 };
286
287 sound {
288 compatible = "nvidia,tegra-audio-wm8753-whistler",
289 "nvidia,tegra-audio-wm8753";
290 nvidia,model = "NVIDIA Tegra Whistler";
291
292 nvidia,audio-routing =
293 "Headphone Jack", "LOUT1",
294 "Headphone Jack", "ROUT1",
295 "MIC2", "Mic Jack",
296 "MIC2N", "Mic Jack";
297
298 nvidia,i2s-controller = <&tegra_i2s1>;
299 nvidia,audio-codec = <&codec>;
300 };
301};
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index c417d67e9027..9f1921634eb7 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -72,7 +72,7 @@
72 reg = <0x70002800 0x200>; 72 reg = <0x70002800 0x200>;
73 interrupts = <0 13 0x04>; 73 interrupts = <0 13 0x04>;
74 nvidia,dma-request-selector = <&apbdma 2>; 74 nvidia,dma-request-selector = <&apbdma 2>;
75 status = "disable"; 75 status = "disabled";
76 }; 76 };
77 77
78 tegra_i2s2: i2s@70002a00 { 78 tegra_i2s2: i2s@70002a00 {
@@ -80,7 +80,7 @@
80 reg = <0x70002a00 0x200>; 80 reg = <0x70002a00 0x200>;
81 interrupts = <0 3 0x04>; 81 interrupts = <0 3 0x04>;
82 nvidia,dma-request-selector = <&apbdma 1>; 82 nvidia,dma-request-selector = <&apbdma 1>;
83 status = "disable"; 83 status = "disabled";
84 }; 84 };
85 85
86 serial@70006000 { 86 serial@70006000 {
@@ -88,7 +88,7 @@
88 reg = <0x70006000 0x40>; 88 reg = <0x70006000 0x40>;
89 reg-shift = <2>; 89 reg-shift = <2>;
90 interrupts = <0 36 0x04>; 90 interrupts = <0 36 0x04>;
91 status = "disable"; 91 status = "disabled";
92 }; 92 };
93 93
94 serial@70006040 { 94 serial@70006040 {
@@ -96,7 +96,7 @@
96 reg = <0x70006040 0x40>; 96 reg = <0x70006040 0x40>;
97 reg-shift = <2>; 97 reg-shift = <2>;
98 interrupts = <0 37 0x04>; 98 interrupts = <0 37 0x04>;
99 status = "disable"; 99 status = "disabled";
100 }; 100 };
101 101
102 serial@70006200 { 102 serial@70006200 {
@@ -104,7 +104,7 @@
104 reg = <0x70006200 0x100>; 104 reg = <0x70006200 0x100>;
105 reg-shift = <2>; 105 reg-shift = <2>;
106 interrupts = <0 46 0x04>; 106 interrupts = <0 46 0x04>;
107 status = "disable"; 107 status = "disabled";
108 }; 108 };
109 109
110 serial@70006300 { 110 serial@70006300 {
@@ -112,7 +112,7 @@
112 reg = <0x70006300 0x100>; 112 reg = <0x70006300 0x100>;
113 reg-shift = <2>; 113 reg-shift = <2>;
114 interrupts = <0 90 0x04>; 114 interrupts = <0 90 0x04>;
115 status = "disable"; 115 status = "disabled";
116 }; 116 };
117 117
118 serial@70006400 { 118 serial@70006400 {
@@ -120,7 +120,7 @@
120 reg = <0x70006400 0x100>; 120 reg = <0x70006400 0x100>;
121 reg-shift = <2>; 121 reg-shift = <2>;
122 interrupts = <0 91 0x04>; 122 interrupts = <0 91 0x04>;
123 status = "disable"; 123 status = "disabled";
124 }; 124 };
125 125
126 i2c@7000c000 { 126 i2c@7000c000 {
@@ -129,7 +129,7 @@
129 interrupts = <0 38 0x04>; 129 interrupts = <0 38 0x04>;
130 #address-cells = <1>; 130 #address-cells = <1>;
131 #size-cells = <0>; 131 #size-cells = <0>;
132 status = "disable"; 132 status = "disabled";
133 }; 133 };
134 134
135 i2c@7000c400 { 135 i2c@7000c400 {
@@ -138,7 +138,7 @@
138 interrupts = <0 84 0x04>; 138 interrupts = <0 84 0x04>;
139 #address-cells = <1>; 139 #address-cells = <1>;
140 #size-cells = <0>; 140 #size-cells = <0>;
141 status = "disable"; 141 status = "disabled";
142 }; 142 };
143 143
144 i2c@7000c500 { 144 i2c@7000c500 {
@@ -147,7 +147,7 @@
147 interrupts = <0 92 0x04>; 147 interrupts = <0 92 0x04>;
148 #address-cells = <1>; 148 #address-cells = <1>;
149 #size-cells = <0>; 149 #size-cells = <0>;
150 status = "disable"; 150 status = "disabled";
151 }; 151 };
152 152
153 i2c@7000d000 { 153 i2c@7000d000 {
@@ -156,7 +156,7 @@
156 interrupts = <0 53 0x04>; 156 interrupts = <0 53 0x04>;
157 #address-cells = <1>; 157 #address-cells = <1>;
158 #size-cells = <0>; 158 #size-cells = <0>;
159 status = "disable"; 159 status = "disabled";
160 }; 160 };
161 161
162 pmc { 162 pmc {
@@ -164,7 +164,7 @@
164 reg = <0x7000e400 0x400>; 164 reg = <0x7000e400 0x400>;
165 }; 165 };
166 166
167 mc { 167 memory-controller@0x7000f000 {
168 compatible = "nvidia,tegra20-mc"; 168 compatible = "nvidia,tegra20-mc";
169 reg = <0x7000f000 0x024 169 reg = <0x7000f000 0x024
170 0x7000f03c 0x3c4>; 170 0x7000f03c 0x3c4>;
@@ -177,7 +177,7 @@
177 0x58000000 0x02000000>; /* GART aperture */ 177 0x58000000 0x02000000>; /* GART aperture */
178 }; 178 };
179 179
180 emc { 180 memory-controller@0x7000f400 {
181 compatible = "nvidia,tegra20-emc"; 181 compatible = "nvidia,tegra20-emc";
182 reg = <0x7000f400 0x200>; 182 reg = <0x7000f400 0x200>;
183 #address-cells = <1>; 183 #address-cells = <1>;
@@ -190,7 +190,7 @@
190 interrupts = <0 20 0x04>; 190 interrupts = <0 20 0x04>;
191 phy_type = "utmi"; 191 phy_type = "utmi";
192 nvidia,has-legacy-mode; 192 nvidia,has-legacy-mode;
193 status = "disable"; 193 status = "disabled";
194 }; 194 };
195 195
196 usb@c5004000 { 196 usb@c5004000 {
@@ -198,7 +198,7 @@
198 reg = <0xc5004000 0x4000>; 198 reg = <0xc5004000 0x4000>;
199 interrupts = <0 21 0x04>; 199 interrupts = <0 21 0x04>;
200 phy_type = "ulpi"; 200 phy_type = "ulpi";
201 status = "disable"; 201 status = "disabled";
202 }; 202 };
203 203
204 usb@c5008000 { 204 usb@c5008000 {
@@ -206,35 +206,35 @@
206 reg = <0xc5008000 0x4000>; 206 reg = <0xc5008000 0x4000>;
207 interrupts = <0 97 0x04>; 207 interrupts = <0 97 0x04>;
208 phy_type = "utmi"; 208 phy_type = "utmi";
209 status = "disable"; 209 status = "disabled";
210 }; 210 };
211 211
212 sdhci@c8000000 { 212 sdhci@c8000000 {
213 compatible = "nvidia,tegra20-sdhci"; 213 compatible = "nvidia,tegra20-sdhci";
214 reg = <0xc8000000 0x200>; 214 reg = <0xc8000000 0x200>;
215 interrupts = <0 14 0x04>; 215 interrupts = <0 14 0x04>;
216 status = "disable"; 216 status = "disabled";
217 }; 217 };
218 218
219 sdhci@c8000200 { 219 sdhci@c8000200 {
220 compatible = "nvidia,tegra20-sdhci"; 220 compatible = "nvidia,tegra20-sdhci";
221 reg = <0xc8000200 0x200>; 221 reg = <0xc8000200 0x200>;
222 interrupts = <0 15 0x04>; 222 interrupts = <0 15 0x04>;
223 status = "disable"; 223 status = "disabled";
224 }; 224 };
225 225
226 sdhci@c8000400 { 226 sdhci@c8000400 {
227 compatible = "nvidia,tegra20-sdhci"; 227 compatible = "nvidia,tegra20-sdhci";
228 reg = <0xc8000400 0x200>; 228 reg = <0xc8000400 0x200>;
229 interrupts = <0 19 0x04>; 229 interrupts = <0 19 0x04>;
230 status = "disable"; 230 status = "disabled";
231 }; 231 };
232 232
233 sdhci@c8000600 { 233 sdhci@c8000600 {
234 compatible = "nvidia,tegra20-sdhci"; 234 compatible = "nvidia,tegra20-sdhci";
235 reg = <0xc8000600 0x200>; 235 reg = <0xc8000600 0x200>;
236 interrupts = <0 31 0x04>; 236 interrupts = <0 31 0x04>;
237 status = "disable"; 237 status = "disabled";
238 }; 238 };
239 239
240 pmu { 240 pmu {
diff --git a/arch/arm/boot/dts/tegra-cardhu.dts b/arch/arm/boot/dts/tegra30-cardhu.dts
index 36321bceec46..c169bced131e 100644
--- a/arch/arm/boot/dts/tegra-cardhu.dts
+++ b/arch/arm/boot/dts/tegra30-cardhu.dts
@@ -144,7 +144,6 @@
144 144
145 sdhci@78000600 { 145 sdhci@78000600 {
146 status = "okay"; 146 status = "okay";
147 support-8bit;
148 bus-width = <8>; 147 bus-width = <8>;
149 }; 148 };
150 149
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 2dcc09e784b5..da740191771f 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -82,7 +82,7 @@
82 reg = <0x70006000 0x40>; 82 reg = <0x70006000 0x40>;
83 reg-shift = <2>; 83 reg-shift = <2>;
84 interrupts = <0 36 0x04>; 84 interrupts = <0 36 0x04>;
85 status = "disable"; 85 status = "disabled";
86 }; 86 };
87 87
88 serial@70006040 { 88 serial@70006040 {
@@ -90,7 +90,7 @@
90 reg = <0x70006040 0x40>; 90 reg = <0x70006040 0x40>;
91 reg-shift = <2>; 91 reg-shift = <2>;
92 interrupts = <0 37 0x04>; 92 interrupts = <0 37 0x04>;
93 status = "disable"; 93 status = "disabled";
94 }; 94 };
95 95
96 serial@70006200 { 96 serial@70006200 {
@@ -98,7 +98,7 @@
98 reg = <0x70006200 0x100>; 98 reg = <0x70006200 0x100>;
99 reg-shift = <2>; 99 reg-shift = <2>;
100 interrupts = <0 46 0x04>; 100 interrupts = <0 46 0x04>;
101 status = "disable"; 101 status = "disabled";
102 }; 102 };
103 103
104 serial@70006300 { 104 serial@70006300 {
@@ -106,7 +106,7 @@
106 reg = <0x70006300 0x100>; 106 reg = <0x70006300 0x100>;
107 reg-shift = <2>; 107 reg-shift = <2>;
108 interrupts = <0 90 0x04>; 108 interrupts = <0 90 0x04>;
109 status = "disable"; 109 status = "disabled";
110 }; 110 };
111 111
112 serial@70006400 { 112 serial@70006400 {
@@ -114,7 +114,7 @@
114 reg = <0x70006400 0x100>; 114 reg = <0x70006400 0x100>;
115 reg-shift = <2>; 115 reg-shift = <2>;
116 interrupts = <0 91 0x04>; 116 interrupts = <0 91 0x04>;
117 status = "disable"; 117 status = "disabled";
118 }; 118 };
119 119
120 i2c@7000c000 { 120 i2c@7000c000 {
@@ -123,7 +123,7 @@
123 interrupts = <0 38 0x04>; 123 interrupts = <0 38 0x04>;
124 #address-cells = <1>; 124 #address-cells = <1>;
125 #size-cells = <0>; 125 #size-cells = <0>;
126 status = "disable"; 126 status = "disabled";
127 }; 127 };
128 128
129 i2c@7000c400 { 129 i2c@7000c400 {
@@ -132,7 +132,7 @@
132 interrupts = <0 84 0x04>; 132 interrupts = <0 84 0x04>;
133 #address-cells = <1>; 133 #address-cells = <1>;
134 #size-cells = <0>; 134 #size-cells = <0>;
135 status = "disable"; 135 status = "disabled";
136 }; 136 };
137 137
138 i2c@7000c500 { 138 i2c@7000c500 {
@@ -141,7 +141,7 @@
141 interrupts = <0 92 0x04>; 141 interrupts = <0 92 0x04>;
142 #address-cells = <1>; 142 #address-cells = <1>;
143 #size-cells = <0>; 143 #size-cells = <0>;
144 status = "disable"; 144 status = "disabled";
145 }; 145 };
146 146
147 i2c@7000c700 { 147 i2c@7000c700 {
@@ -150,7 +150,7 @@
150 interrupts = <0 120 0x04>; 150 interrupts = <0 120 0x04>;
151 #address-cells = <1>; 151 #address-cells = <1>;
152 #size-cells = <0>; 152 #size-cells = <0>;
153 status = "disable"; 153 status = "disabled";
154 }; 154 };
155 155
156 i2c@7000d000 { 156 i2c@7000d000 {
@@ -159,7 +159,7 @@
159 interrupts = <0 53 0x04>; 159 interrupts = <0 53 0x04>;
160 #address-cells = <1>; 160 #address-cells = <1>;
161 #size-cells = <0>; 161 #size-cells = <0>;
162 status = "disable"; 162 status = "disabled";
163 }; 163 };
164 164
165 pmc { 165 pmc {
@@ -167,7 +167,7 @@
167 reg = <0x7000e400 0x400>; 167 reg = <0x7000e400 0x400>;
168 }; 168 };
169 169
170 mc { 170 memory-controller {
171 compatible = "nvidia,tegra30-mc"; 171 compatible = "nvidia,tegra30-mc";
172 reg = <0x7000f000 0x010 172 reg = <0x7000f000 0x010
173 0x7000f03c 0x1b4 173 0x7000f03c 0x1b4
@@ -201,35 +201,35 @@
201 compatible = "nvidia,tegra30-i2s"; 201 compatible = "nvidia,tegra30-i2s";
202 reg = <0x70080300 0x100>; 202 reg = <0x70080300 0x100>;
203 nvidia,ahub-cif-ids = <4 4>; 203 nvidia,ahub-cif-ids = <4 4>;
204 status = "disable"; 204 status = "disabled";
205 }; 205 };
206 206
207 tegra_i2s1: i2s@70080400 { 207 tegra_i2s1: i2s@70080400 {
208 compatible = "nvidia,tegra30-i2s"; 208 compatible = "nvidia,tegra30-i2s";
209 reg = <0x70080400 0x100>; 209 reg = <0x70080400 0x100>;
210 nvidia,ahub-cif-ids = <5 5>; 210 nvidia,ahub-cif-ids = <5 5>;
211 status = "disable"; 211 status = "disabled";
212 }; 212 };
213 213
214 tegra_i2s2: i2s@70080500 { 214 tegra_i2s2: i2s@70080500 {
215 compatible = "nvidia,tegra30-i2s"; 215 compatible = "nvidia,tegra30-i2s";
216 reg = <0x70080500 0x100>; 216 reg = <0x70080500 0x100>;
217 nvidia,ahub-cif-ids = <6 6>; 217 nvidia,ahub-cif-ids = <6 6>;
218 status = "disable"; 218 status = "disabled";
219 }; 219 };
220 220
221 tegra_i2s3: i2s@70080600 { 221 tegra_i2s3: i2s@70080600 {
222 compatible = "nvidia,tegra30-i2s"; 222 compatible = "nvidia,tegra30-i2s";
223 reg = <0x70080600 0x100>; 223 reg = <0x70080600 0x100>;
224 nvidia,ahub-cif-ids = <7 7>; 224 nvidia,ahub-cif-ids = <7 7>;
225 status = "disable"; 225 status = "disabled";
226 }; 226 };
227 227
228 tegra_i2s4: i2s@70080700 { 228 tegra_i2s4: i2s@70080700 {
229 compatible = "nvidia,tegra30-i2s"; 229 compatible = "nvidia,tegra30-i2s";
230 reg = <0x70080700 0x100>; 230 reg = <0x70080700 0x100>;
231 nvidia,ahub-cif-ids = <8 8>; 231 nvidia,ahub-cif-ids = <8 8>;
232 status = "disable"; 232 status = "disabled";
233 }; 233 };
234 }; 234 };
235 235
@@ -237,28 +237,28 @@
237 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; 237 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
238 reg = <0x78000000 0x200>; 238 reg = <0x78000000 0x200>;
239 interrupts = <0 14 0x04>; 239 interrupts = <0 14 0x04>;
240 status = "disable"; 240 status = "disabled";
241 }; 241 };
242 242
243 sdhci@78000200 { 243 sdhci@78000200 {
244 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; 244 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
245 reg = <0x78000200 0x200>; 245 reg = <0x78000200 0x200>;
246 interrupts = <0 15 0x04>; 246 interrupts = <0 15 0x04>;
247 status = "disable"; 247 status = "disabled";
248 }; 248 };
249 249
250 sdhci@78000400 { 250 sdhci@78000400 {
251 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; 251 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
252 reg = <0x78000400 0x200>; 252 reg = <0x78000400 0x200>;
253 interrupts = <0 19 0x04>; 253 interrupts = <0 19 0x04>;
254 status = "disable"; 254 status = "disabled";
255 }; 255 };
256 256
257 sdhci@78000600 { 257 sdhci@78000600 {
258 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; 258 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
259 reg = <0x78000600 0x200>; 259 reg = <0x78000600 0x200>;
260 interrupts = <0 31 0x04>; 260 interrupts = <0 31 0x04>;
261 status = "disable"; 261 status = "disabled";
262 }; 262 };
263 263
264 pmu { 264 pmu {
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index 16076e2d0934..d8a827bd2bf3 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -55,6 +55,8 @@
55 reg-io-width = <4>; 55 reg-io-width = <4>;
56 smsc,irq-active-high; 56 smsc,irq-active-high;
57 smsc,irq-push-pull; 57 smsc,irq-push-pull;
58 vdd33a-supply = <&v2m_fixed_3v3>;
59 vddvario-supply = <&v2m_fixed_3v3>;
58 }; 60 };
59 61
60 usb@2,03000000 { 62 usb@2,03000000 {
@@ -157,6 +159,7 @@
157 v2m_timer23: timer@120000 { 159 v2m_timer23: timer@120000 {
158 compatible = "arm,sp804", "arm,primecell"; 160 compatible = "arm,sp804", "arm,primecell";
159 reg = <0x120000 0x1000>; 161 reg = <0x120000 0x1000>;
162 interrupts = <3>;
160 }; 163 };
161 164
162 /* DVI I2C bus */ 165 /* DVI I2C bus */
@@ -197,5 +200,13 @@
197 interrupts = <14>; 200 interrupts = <14>;
198 }; 201 };
199 }; 202 };
203
204 v2m_fixed_3v3: fixedregulator@0 {
205 compatible = "regulator-fixed";
206 regulator-name = "3V3";
207 regulator-min-microvolt = <3300000>;
208 regulator-max-microvolt = <3300000>;
209 regulator-always-on;
210 };
200 }; 211 };
201}; 212};
diff --git a/arch/arm/boot/dts/vexpress-v2m.dtsi b/arch/arm/boot/dts/vexpress-v2m.dtsi
index a6c9c7c82d53..dba53fd026bb 100644
--- a/arch/arm/boot/dts/vexpress-v2m.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m.dtsi
@@ -54,6 +54,8 @@
54 reg-io-width = <4>; 54 reg-io-width = <4>;
55 smsc,irq-active-high; 55 smsc,irq-active-high;
56 smsc,irq-push-pull; 56 smsc,irq-push-pull;
57 vdd33a-supply = <&v2m_fixed_3v3>;
58 vddvario-supply = <&v2m_fixed_3v3>;
57 }; 59 };
58 60
59 usb@3,03000000 { 61 usb@3,03000000 {
@@ -156,6 +158,7 @@
156 v2m_timer23: timer@12000 { 158 v2m_timer23: timer@12000 {
157 compatible = "arm,sp804", "arm,primecell"; 159 compatible = "arm,sp804", "arm,primecell";
158 reg = <0x12000 0x1000>; 160 reg = <0x12000 0x1000>;
161 interrupts = <3>;
159 }; 162 };
160 163
161 /* DVI I2C bus */ 164 /* DVI I2C bus */
@@ -196,5 +199,13 @@
196 interrupts = <14>; 199 interrupts = <14>;
197 }; 200 };
198 }; 201 };
202
203 v2m_fixed_3v3: fixedregulator@0 {
204 compatible = "regulator-fixed";
205 regulator-name = "3V3";
206 regulator-min-microvolt = <3300000>;
207 regulator-max-microvolt = <3300000>;
208 regulator-always-on;
209 };
199 }; 210 };
200}; 211};
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
index 7e1091d91af8..d12b34ca0568 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
@@ -14,8 +14,8 @@
14 arm,hbi = <0x237>; 14 arm,hbi = <0x237>;
15 compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress"; 15 compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress";
16 interrupt-parent = <&gic>; 16 interrupt-parent = <&gic>;
17 #address-cells = <1>; 17 #address-cells = <2>;
18 #size-cells = <1>; 18 #size-cells = <2>;
19 19
20 chosen { }; 20 chosen { };
21 21
@@ -47,23 +47,23 @@
47 47
48 memory@80000000 { 48 memory@80000000 {
49 device_type = "memory"; 49 device_type = "memory";
50 reg = <0x80000000 0x40000000>; 50 reg = <0 0x80000000 0 0x40000000>;
51 }; 51 };
52 52
53 hdlcd@2b000000 { 53 hdlcd@2b000000 {
54 compatible = "arm,hdlcd"; 54 compatible = "arm,hdlcd";
55 reg = <0x2b000000 0x1000>; 55 reg = <0 0x2b000000 0 0x1000>;
56 interrupts = <0 85 4>; 56 interrupts = <0 85 4>;
57 }; 57 };
58 58
59 memory-controller@2b0a0000 { 59 memory-controller@2b0a0000 {
60 compatible = "arm,pl341", "arm,primecell"; 60 compatible = "arm,pl341", "arm,primecell";
61 reg = <0x2b0a0000 0x1000>; 61 reg = <0 0x2b0a0000 0 0x1000>;
62 }; 62 };
63 63
64 wdt@2b060000 { 64 wdt@2b060000 {
65 compatible = "arm,sp805", "arm,primecell"; 65 compatible = "arm,sp805", "arm,primecell";
66 reg = <0x2b060000 0x1000>; 66 reg = <0 0x2b060000 0 0x1000>;
67 interrupts = <98>; 67 interrupts = <98>;
68 }; 68 };
69 69
@@ -72,23 +72,23 @@
72 #interrupt-cells = <3>; 72 #interrupt-cells = <3>;
73 #address-cells = <0>; 73 #address-cells = <0>;
74 interrupt-controller; 74 interrupt-controller;
75 reg = <0x2c001000 0x1000>, 75 reg = <0 0x2c001000 0 0x1000>,
76 <0x2c002000 0x1000>, 76 <0 0x2c002000 0 0x1000>,
77 <0x2c004000 0x2000>, 77 <0 0x2c004000 0 0x2000>,
78 <0x2c006000 0x2000>; 78 <0 0x2c006000 0 0x2000>;
79 interrupts = <1 9 0xf04>; 79 interrupts = <1 9 0xf04>;
80 }; 80 };
81 81
82 memory-controller@7ffd0000 { 82 memory-controller@7ffd0000 {
83 compatible = "arm,pl354", "arm,primecell"; 83 compatible = "arm,pl354", "arm,primecell";
84 reg = <0x7ffd0000 0x1000>; 84 reg = <0 0x7ffd0000 0 0x1000>;
85 interrupts = <0 86 4>, 85 interrupts = <0 86 4>,
86 <0 87 4>; 86 <0 87 4>;
87 }; 87 };
88 88
89 dma@7ffb0000 { 89 dma@7ffb0000 {
90 compatible = "arm,pl330", "arm,primecell"; 90 compatible = "arm,pl330", "arm,primecell";
91 reg = <0x7ffb0000 0x1000>; 91 reg = <0 0x7ffb0000 0 0x1000>;
92 interrupts = <0 92 4>, 92 interrupts = <0 92 4>,
93 <0 88 4>, 93 <0 88 4>,
94 <0 89 4>, 94 <0 89 4>,
@@ -111,12 +111,12 @@
111 }; 111 };
112 112
113 motherboard { 113 motherboard {
114 ranges = <0 0 0x08000000 0x04000000>, 114 ranges = <0 0 0 0x08000000 0x04000000>,
115 <1 0 0x14000000 0x04000000>, 115 <1 0 0 0x14000000 0x04000000>,
116 <2 0 0x18000000 0x04000000>, 116 <2 0 0 0x18000000 0x04000000>,
117 <3 0 0x1c000000 0x04000000>, 117 <3 0 0 0x1c000000 0x04000000>,
118 <4 0 0x0c000000 0x04000000>, 118 <4 0 0 0x0c000000 0x04000000>,
119 <5 0 0x10000000 0x04000000>; 119 <5 0 0 0x10000000 0x04000000>;
120 120
121 interrupt-map-mask = <0 0 63>; 121 interrupt-map-mask = <0 0 63>;
122 interrupt-map = <0 0 0 &gic 0 0 4>, 122 interrupt-map = <0 0 0 &gic 0 0 4>,
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
new file mode 100644
index 000000000000..4890a81c5467
--- /dev/null
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -0,0 +1,188 @@
1/*
2 * ARM Ltd. Versatile Express
3 *
4 * CoreTile Express A15x2 A7x3
5 * Cortex-A15_A7 MPCore (V2P-CA15_A7)
6 *
7 * HBI-0249A
8 */
9
10/dts-v1/;
11
12/ {
13 model = "V2P-CA15_CA7";
14 arm,hbi = <0x249>;
15 compatible = "arm,vexpress,v2p-ca15_a7", "arm,vexpress";
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
19
20 chosen { };
21
22 aliases {
23 serial0 = &v2m_serial0;
24 serial1 = &v2m_serial1;
25 serial2 = &v2m_serial2;
26 serial3 = &v2m_serial3;
27 i2c0 = &v2m_i2c_dvi;
28 i2c1 = &v2m_i2c_pcie;
29 };
30
31 cpus {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 cpu0: cpu@0 {
36 device_type = "cpu";
37 compatible = "arm,cortex-a15";
38 reg = <0>;
39 };
40
41 cpu1: cpu@1 {
42 device_type = "cpu";
43 compatible = "arm,cortex-a15";
44 reg = <1>;
45 };
46
47/* A7s disabled till big.LITTLE patches are available...
48 cpu2: cpu@2 {
49 device_type = "cpu";
50 compatible = "arm,cortex-a7";
51 reg = <0x100>;
52 };
53
54 cpu3: cpu@3 {
55 device_type = "cpu";
56 compatible = "arm,cortex-a7";
57 reg = <0x101>;
58 };
59
60 cpu4: cpu@4 {
61 device_type = "cpu";
62 compatible = "arm,cortex-a7";
63 reg = <0x102>;
64 };
65*/
66 };
67
68 memory@80000000 {
69 device_type = "memory";
70 reg = <0 0x80000000 0 0x40000000>;
71 };
72
73 wdt@2a490000 {
74 compatible = "arm,sp805", "arm,primecell";
75 reg = <0 0x2a490000 0 0x1000>;
76 interrupts = <98>;
77 };
78
79 hdlcd@2b000000 {
80 compatible = "arm,hdlcd";
81 reg = <0 0x2b000000 0 0x1000>;
82 interrupts = <0 85 4>;
83 };
84
85 memory-controller@2b0a0000 {
86 compatible = "arm,pl341", "arm,primecell";
87 reg = <0 0x2b0a0000 0 0x1000>;
88 };
89
90 gic: interrupt-controller@2c001000 {
91 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
92 #interrupt-cells = <3>;
93 #address-cells = <0>;
94 interrupt-controller;
95 reg = <0 0x2c001000 0 0x1000>,
96 <0 0x2c002000 0 0x1000>,
97 <0 0x2c004000 0 0x2000>,
98 <0 0x2c006000 0 0x2000>;
99 interrupts = <1 9 0xf04>;
100 };
101
102 memory-controller@7ffd0000 {
103 compatible = "arm,pl354", "arm,primecell";
104 reg = <0 0x7ffd0000 0 0x1000>;
105 interrupts = <0 86 4>,
106 <0 87 4>;
107 };
108
109 dma@7ff00000 {
110 compatible = "arm,pl330", "arm,primecell";
111 reg = <0 0x7ff00000 0 0x1000>;
112 interrupts = <0 92 4>,
113 <0 88 4>,
114 <0 89 4>,
115 <0 90 4>,
116 <0 91 4>;
117 };
118
119 timer {
120 compatible = "arm,armv7-timer";
121 interrupts = <1 13 0xf08>,
122 <1 14 0xf08>,
123 <1 11 0xf08>,
124 <1 10 0xf08>;
125 };
126
127 pmu {
128 compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
129 interrupts = <0 68 4>,
130 <0 69 4>;
131 };
132
133 motherboard {
134 ranges = <0 0 0 0x08000000 0x04000000>,
135 <1 0 0 0x14000000 0x04000000>,
136 <2 0 0 0x18000000 0x04000000>,
137 <3 0 0 0x1c000000 0x04000000>,
138 <4 0 0 0x0c000000 0x04000000>,
139 <5 0 0 0x10000000 0x04000000>;
140
141 interrupt-map-mask = <0 0 63>;
142 interrupt-map = <0 0 0 &gic 0 0 4>,
143 <0 0 1 &gic 0 1 4>,
144 <0 0 2 &gic 0 2 4>,
145 <0 0 3 &gic 0 3 4>,
146 <0 0 4 &gic 0 4 4>,
147 <0 0 5 &gic 0 5 4>,
148 <0 0 6 &gic 0 6 4>,
149 <0 0 7 &gic 0 7 4>,
150 <0 0 8 &gic 0 8 4>,
151 <0 0 9 &gic 0 9 4>,
152 <0 0 10 &gic 0 10 4>,
153 <0 0 11 &gic 0 11 4>,
154 <0 0 12 &gic 0 12 4>,
155 <0 0 13 &gic 0 13 4>,
156 <0 0 14 &gic 0 14 4>,
157 <0 0 15 &gic 0 15 4>,
158 <0 0 16 &gic 0 16 4>,
159 <0 0 17 &gic 0 17 4>,
160 <0 0 18 &gic 0 18 4>,
161 <0 0 19 &gic 0 19 4>,
162 <0 0 20 &gic 0 20 4>,
163 <0 0 21 &gic 0 21 4>,
164 <0 0 22 &gic 0 22 4>,
165 <0 0 23 &gic 0 23 4>,
166 <0 0 24 &gic 0 24 4>,
167 <0 0 25 &gic 0 25 4>,
168 <0 0 26 &gic 0 26 4>,
169 <0 0 27 &gic 0 27 4>,
170 <0 0 28 &gic 0 28 4>,
171 <0 0 29 &gic 0 29 4>,
172 <0 0 30 &gic 0 30 4>,
173 <0 0 31 &gic 0 31 4>,
174 <0 0 32 &gic 0 32 4>,
175 <0 0 33 &gic 0 33 4>,
176 <0 0 34 &gic 0 34 4>,
177 <0 0 35 &gic 0 35 4>,
178 <0 0 36 &gic 0 36 4>,
179 <0 0 37 &gic 0 37 4>,
180 <0 0 38 &gic 0 38 4>,
181 <0 0 39 &gic 0 39 4>,
182 <0 0 40 &gic 0 40 4>,
183 <0 0 41 &gic 0 41 4>,
184 <0 0 42 &gic 0 42 4>;
185 };
186};
187
188/include/ "vexpress-v2m-rs1.dtsi"
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-13 07:25:57 -0400