31 files changed, 1430 insertions, 107 deletions

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 20358fb43450..55196639211d 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -49,7 +49,10 @@ dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
 dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
         exynos4210-smdkv310.dtb \
         exynos4210-trats.dtb \
+        exynos4412-odroidx.dtb \
         exynos4412-smdk4412.dtb \
+        exynos4412-origen.dtb \
+        exynos5250-arndale.dtb \
         exynos5250-smdk5250.dtb \
         exynos5250-snow.dtb \
         exynos5440-ssdk5440.dtb
diff --git a/arch/arm/boot/dts/cros5250-common.dtsi b/arch/arm/boot/dts/cros5250-common.dtsi
index 46c098017036..62eceb4f0d3f 100644
--- a/arch/arm/boot/dts/cros5250-common.dtsi
+++ b/arch/arm/boot/dts/cros5250-common.dtsi
@@ -24,6 +24,144 @@
                 samsung,i2c-max-bus-freq = <378000>;
                 gpios = <&gpb3 0 2 3 0>,
                         <&gpb3 1 2 3 0>;
+
+                max77686@09 {
+                        compatible = "maxim,max77686";
+                        reg = <0x09>;
+
+                        voltage-regulators {
+                                ldo1_reg: LDO1 {
+                                        regulator-name = "P1.0V_LDO_OUT1";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1000000>;
+                                        regulator-always-on;
+                                };
+
+                                ldo2_reg: LDO2 {
+                                        regulator-name = "P1.8V_LDO_OUT2";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                };
+
+                                ldo3_reg: LDO3 {
+                                        regulator-name = "P1.8V_LDO_OUT3";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                };
+
+                                ldo7_reg: LDO7 {
+                                        regulator-name = "P1.1V_LDO_OUT7";
+                                        regulator-min-microvolt = <1100000>;
+                                        regulator-max-microvolt = <1100000>;
+                                        regulator-always-on;
+                                };
+
+                                ldo8_reg: LDO8 {
+                                        regulator-name = "P1.0V_LDO_OUT8";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1000000>;
+                                        regulator-always-on;
+                                };
+
+                                ldo10_reg: LDO10 {
+                                        regulator-name = "P1.8V_LDO_OUT10";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                };
+
+                                ldo12_reg: LDO12 {
+                                        regulator-name = "P3.0V_LDO_OUT12";
+                                        regulator-min-microvolt = <3000000>;
+                                        regulator-max-microvolt = <3000000>;
+                                        regulator-always-on;
+                                };
+
+                                ldo14_reg: LDO14 {
+                                        regulator-name = "P1.8V_LDO_OUT14";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                };
+
+                                ldo15_reg: LDO15 {
+                                        regulator-name = "P1.0V_LDO_OUT15";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1000000>;
+                                        regulator-always-on;
+                                };
+
+                                ldo16_reg: LDO16 {
+                                        regulator-name = "P1.8V_LDO_OUT16";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                };
+
+                                buck1_reg: BUCK1 {
+                                        regulator-name = "vdd_mif";
+                                        regulator-min-microvolt = <950000>;
+                                        regulator-max-microvolt = <1300000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                };
+
+                                buck2_reg: BUCK2 {
+                                        regulator-name = "vdd_arm";
+                                        regulator-min-microvolt = <850000>;
+                                        regulator-max-microvolt = <1350000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                };
+
+                                buck3_reg: BUCK3 {
+                                        regulator-name = "vdd_int";
+                                        regulator-min-microvolt = <900000>;
+                                        regulator-max-microvolt = <1200000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                };
+
+                                buck4_reg: BUCK4 {
+                                        regulator-name = "vdd_g3d";
+                                        regulator-min-microvolt = <850000>;
+                                        regulator-max-microvolt = <1300000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                };
+
+                                buck5_reg: BUCK5 {
+                                        regulator-name = "P1.8V_BUCK_OUT5";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                };
+
+                                buck6_reg: BUCK6 {
+                                        regulator-name = "P1.35V_BUCK_OUT6";
+                                        regulator-min-microvolt = <1350000>;
+                                        regulator-max-microvolt = <1350000>;
+                                        regulator-always-on;
+                                };
+
+                                buck7_reg: BUCK7 {
+                                        regulator-name = "P2.0V_BUCK_OUT7";
+                                        regulator-min-microvolt = <2000000>;
+                                        regulator-max-microvolt = <2000000>;
+                                        regulator-always-on;
+                                };
+
+                                buck8_reg: BUCK8 {
+                                        regulator-name = "P2.85V_BUCK_OUT8";
+                                        regulator-min-microvolt = <2850000>;
+                                        regulator-max-microvolt = <2850000>;
+                                        regulator-always-on;
+                                };
+                        };
+                };
         };
 
         i2c@12C70000 {
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 1a62bcf18aa3..9ac47d51c407 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -86,6 +86,8 @@
                 compatible = "samsung,s3c2410-wdt";
                 reg = <0x10060000 0x100>;
                 interrupts = <0 43 0>;
+                clocks = <&clock 345>;
+                clock-names = "watchdog";
                 status = "disabled";
         };
 
@@ -93,6 +95,8 @@
                 compatible = "samsung,s3c6410-rtc";
                 reg = <0x10070000 0x100>;
                 interrupts = <0 44 0>, <0 45 0>;
+                clocks = <&clock 346>;
+                clock-names = "rtc";
                 status = "disabled";
         };
 
@@ -100,6 +104,8 @@
                 compatible = "samsung,s5pv210-keypad";
                 reg = <0x100A0000 0x100>;
                 interrupts = <0 109 0>;
+                clocks = <&clock 347>;
+                clock-names = "keypad";
                 status = "disabled";
         };
 
@@ -107,6 +113,8 @@
                 compatible = "samsung,exynos4210-sdhci";
                 reg = <0x12510000 0x100>;
                 interrupts = <0 73 0>;
+                clocks = <&clock 297>, <&clock 145>;
+                clock-names = "hsmmc", "mmc_busclk.2";
                 status = "disabled";
         };
 
@@ -114,6 +122,8 @@
                 compatible = "samsung,exynos4210-sdhci";
                 reg = <0x12520000 0x100>;
                 interrupts = <0 74 0>;
+                clocks = <&clock 298>, <&clock 146>;
+                clock-names = "hsmmc", "mmc_busclk.2";
                 status = "disabled";
         };
 
@@ -121,6 +131,8 @@
                 compatible = "samsung,exynos4210-sdhci";
                 reg = <0x12530000 0x100>;
                 interrupts = <0 75 0>;
+                clocks = <&clock 299>, <&clock 147>;
+                clock-names = "hsmmc", "mmc_busclk.2";
                 status = "disabled";
         };
 
@@ -128,6 +140,16 @@
                 compatible = "samsung,exynos4210-sdhci";
                 reg = <0x12540000 0x100>;
                 interrupts = <0 76 0>;
+                clocks = <&clock 300>, <&clock 148>;
+                clock-names = "hsmmc", "mmc_busclk.2";
+                status = "disabled";
+        };
+
+        mfc: codec@13400000 {
+                compatible = "samsung,mfc-v5";
+                reg = <0x13400000 0x10000>;
+                interrupts = <0 94 0>;
+                samsung,power-domain = <&pd_mfc>;
                 status = "disabled";
         };
 
@@ -135,6 +157,8 @@
                 compatible = "samsung,exynos4210-uart";
                 reg = <0x13800000 0x100>;
                 interrupts = <0 52 0>;
+                clocks = <&clock 312>, <&clock 151>;
+                clock-names = "uart", "clk_uart_baud0";
                 status = "disabled";
         };
 
@@ -142,6 +166,8 @@
                 compatible = "samsung,exynos4210-uart";
                 reg = <0x13810000 0x100>;
                 interrupts = <0 53 0>;
+                clocks = <&clock 313>, <&clock 152>;
+                clock-names = "uart", "clk_uart_baud0";
                 status = "disabled";
         };
 
@@ -149,6 +175,8 @@
                 compatible = "samsung,exynos4210-uart";
                 reg = <0x13820000 0x100>;
                 interrupts = <0 54 0>;
+                clocks = <&clock 314>, <&clock 153>;
+                clock-names = "uart", "clk_uart_baud0";
                 status = "disabled";
         };
 
@@ -156,6 +184,8 @@
                 compatible = "samsung,exynos4210-uart";
                 reg = <0x13830000 0x100>;
                 interrupts = <0 55 0>;
+                clocks = <&clock 315>, <&clock 154>;
+                clock-names = "uart", "clk_uart_baud0";
                 status = "disabled";
         };
 
@@ -165,6 +195,8 @@
                 compatible = "samsung,s3c2440-i2c";
                 reg = <0x13860000 0x100>;
                 interrupts = <0 58 0>;
+                clocks = <&clock 317>;
+                clock-names = "i2c";
                 status = "disabled";
         };
 
@@ -174,6 +206,8 @@
                 compatible = "samsung,s3c2440-i2c";
                 reg = <0x13870000 0x100>;
                 interrupts = <0 59 0>;
+                clocks = <&clock 318>;
+                clock-names = "i2c";
                 status = "disabled";
         };
 
@@ -183,6 +217,8 @@
                 compatible = "samsung,s3c2440-i2c";
                 reg = <0x13880000 0x100>;
                 interrupts = <0 60 0>;
+                clocks = <&clock 319>;
+                clock-names = "i2c";
                 status = "disabled";
         };
 
@@ -192,6 +228,8 @@
                 compatible = "samsung,s3c2440-i2c";
                 reg = <0x13890000 0x100>;
                 interrupts = <0 61 0>;
+                clocks = <&clock 320>;
+                clock-names = "i2c";
                 status = "disabled";
         };
 
@@ -201,6 +239,8 @@
                 compatible = "samsung,s3c2440-i2c";
                 reg = <0x138A0000 0x100>;
                 interrupts = <0 62 0>;
+                clocks = <&clock 321>;
+                clock-names = "i2c";
                 status = "disabled";
         };
 
@@ -210,6 +250,8 @@
                 compatible = "samsung,s3c2440-i2c";
                 reg = <0x138B0000 0x100>;
                 interrupts = <0 63 0>;
+                clocks = <&clock 322>;
+                clock-names = "i2c";
                 status = "disabled";
         };
 
@@ -219,6 +261,8 @@
                 compatible = "samsung,s3c2440-i2c";
                 reg = <0x138C0000 0x100>;
                 interrupts = <0 64 0>;
+                clocks = <&clock 323>;
+                clock-names = "i2c";
                 status = "disabled";
         };
 
@@ -228,6 +272,8 @@
                 compatible = "samsung,s3c2440-i2c";
                 reg = <0x138D0000 0x100>;
                 interrupts = <0 65 0>;
+                clocks = <&clock 324>;
+                clock-names = "i2c";
                 status = "disabled";
         };
 
@@ -239,6 +285,8 @@
                 rx-dma-channel = <&pdma0 6>; /* preliminary */
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 327>, <&clock 159>;
+                clock-names = "spi", "spi_busclk0";
                 status = "disabled";
         };
 
@@ -250,6 +298,8 @@
                 rx-dma-channel = <&pdma1 6>; /* preliminary */
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 328>, <&clock 160>;
+                clock-names = "spi", "spi_busclk0";
                 status = "disabled";
         };
 
@@ -261,6 +311,8 @@
                 rx-dma-channel = <&pdma0 8>; /* preliminary */
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 329>, <&clock 161>;
+                clock-names = "spi", "spi_busclk0";
                 status = "disabled";
         };
 
@@ -275,6 +327,8 @@
                         compatible = "arm,pl330", "arm,primecell";
                         reg = <0x12680000 0x1000>;
                         interrupts = <0 35 0>;
+                        clocks = <&clock 292>;
+                        clock-names = "apb_pclk";
                         #dma-cells = <1>;
                         #dma-channels = <8>;
                         #dma-requests = <32>;
@@ -284,6 +338,8 @@
                         compatible = "arm,pl330", "arm,primecell";
                         reg = <0x12690000 0x1000>;
                         interrupts = <0 36 0>;
+                        clocks = <&clock 293>;
+                        clock-names = "apb_pclk";
                         #dma-cells = <1>;
                         #dma-channels = <8>;
                         #dma-requests = <32>;
@@ -293,6 +349,8 @@
                         compatible = "arm,pl330", "arm,primecell";
                         reg = <0x12850000 0x1000>;
                         interrupts = <0 34 0>;
+                        clocks = <&clock 279>;
+                        clock-names = "apb_pclk";
                         #dma-cells = <1>;
                         #dma-channels = <8>;
                         #dma-requests = <1>;
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index f2710018e84e..1b30bc8e2654 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -57,6 +57,12 @@
                 status = "okay";
         };
 
+        codec@13400000 {
+                samsung,mfc-r = <0x43000000 0x800000>;
+                samsung,mfc-l = <0x51000000 0x800000>;
+                status = "okay";
+        };
+
         serial@13800000 {
                 status = "okay";
         };
@@ -121,4 +127,16 @@
                         linux,default-trigger = "heartbeat";
                 };
         };
+
+        fixed-rate-clocks {
+                xxti {
+                        compatible = "samsung,clock-xxti";
+                        clock-frequency = <0>;
+                };
+
+                xusbxti {
+                        compatible = "samsung,clock-xusbxti";
+                        clock-frequency = <24000000>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index f63490707f3a..f52c86e2d424 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -43,6 +43,12 @@
                 status = "okay";
         };
 
+        codec@13400000 {
+                samsung,mfc-r = <0x43000000 0x800000>;
+                samsung,mfc-l = <0x51000000 0x800000>;
+                status = "okay";
+        };
+
         serial@13800000 {
                 status = "okay";
         };
@@ -189,4 +195,16 @@
                         };
                 };
         };
+
+        fixed-rate-clocks {
+                xxti {
+                        compatible = "samsung,clock-xxti";
+                        clock-frequency = <12000000>;
+                };
+
+                xusbxti {
+                        compatible = "samsung,clock-xusbxti";
+                        clock-frequency = <24000000>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index c346b64dff55..9a14484c7bb1 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -289,4 +289,16 @@
                         };
                 };
         };
+
+        fixed-rate-clocks {
+                xxti {
+                        compatible = "samsung,clock-xxti";
+                        clock-frequency = <0>;
+                };
+
+                xusbxti {
+                        compatible = "samsung,clock-xusbxti";
+                        clock-frequency = <24000000>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 2feffc70814c..15143bdbafb8 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -47,6 +47,42 @@
                              <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
         };
 
+        mct@10050000 {
+                compatible = "samsung,exynos4210-mct";
+                reg = <0x10050000 0x800>;
+                interrupt-controller;
+                #interrups-cells = <2>;
+                interrupt-parent = <&mct_map>;
+                interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
+                             <4 0>, <5 0>;
+                clocks = <&clock 3>, <&clock 344>;
+                clock-names = "fin_pll", "mct";
+
+                mct_map: mct-map {
+                        #interrupt-cells = <2>;
+                        #address-cells = <0>;
+                        #size-cells = <0>;
+                        interrupt-map = <0x0 0 &gic 0 57 0>,
+                                        <0x1 0 &gic 0 69 0>,
+                                        <0x2 0 &combiner 12 6>,
+                                        <0x3 0 &combiner 12 7>,
+                                        <0x4 0 &gic 0 42 0>,
+                                        <0x5 0 &gic 0 48 0>;
+                };
+        };
+
+        clock: clock-controller@0x10030000 {
+                compatible = "samsung,exynos4210-clock";
+                reg = <0x10030000 0x20000>;
+                #clock-cells = <1>;
+        };
+
+        pmu {
+                compatible = "arm,cortex-a9-pmu";
+                interrupt-parent = <&combiner>;
+                interrupts = <2 2>, <3 2>;
+        };
+
         pinctrl_0: pinctrl@11400000 {
                 compatible = "samsung,exynos4210-pinctrl";
                 reg = <0x11400000 0x1000>;
diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi
index c6ae2005961f..36d4299789ef 100644
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -25,4 +25,26 @@
         gic:interrupt-controller@10490000 {
                 cpu-offset = <0x8000>;
         };
+
+        mct@10050000 {
+                compatible = "samsung,exynos4412-mct";
+                reg = <0x10050000 0x800>;
+                interrupt-controller;
+                #interrups-cells = <2>;
+                interrupt-parent = <&mct_map>;
+                interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
+                             <4 0>, <5 0>;
+
+                mct_map: mct-map {
+                        #interrupt-cells = <2>;
+                        #address-cells = <0>;
+                        #size-cells = <0>;
+                        interrupt-map = <0x0 0 &gic 0 57 0>,
+                                        <0x1 0 &combiner 12 5>,
+                                        <0x2 0 &combiner 12 6>,
+                                        <0x3 0 &combiner 12 7>,
+                                        <0x4 0 &gic 1 12 0>,
+                                        <0x5 0 &gic 1 12 0>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts
new file mode 100644
index 000000000000..53bc8bf77984
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-odroidx.dts
@@ -0,0 +1,111 @@
+/*
+ * Hardkernel's Exynos4412 based ODROID-X board device tree source
+ *
+ * Copyright (c) 2012 Dongjin Kim <tobetter@gmail.com>
+ *
+ * Device tree source file for Hardkernel's ODROID-X board which is based on
+ * Samsung's Exynos4412 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ "exynos4412.dtsi"
+
+/ {
+        model = "Hardkernel ODROID-X board based on Exynos4412";
+        compatible = "hardkernel,odroid-x", "samsung,exynos4412";
+
+        memory {
+                reg = <0x40000000 0x40000000>;
+        };
+
+        leds {
+                compatible = "gpio-leds";
+                led1 {
+                        label = "led1:heart";
+                        gpios = <&gpc1 0 1>;
+                        default-state = "on";
+                        linux,default-trigger = "heartbeat";
+                };
+                led2 {
+                        label = "led2:mmc0";
+                        gpios = <&gpc1 2 1>;
+                        default-state = "on";
+                        linux,default-trigger = "mmc0";
+                };
+        };
+
+        mshc@12550000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
+                pinctrl-names = "default";
+                status = "okay";
+
+                num-slots = <1>;
+                supports-highspeed;
+                broken-cd;
+                fifo-depth = <0x80>;
+                card-detect-delay = <200>;
+                samsung,dw-mshc-ciu-div = <3>;
+                samsung,dw-mshc-sdr-timing = <2 3>;
+                samsung,dw-mshc-ddr-timing = <1 2>;
+
+                slot@0 {
+                        reg = <0>;
+                        bus-width = <8>;
+                };
+        };
+
+        regulator_p3v3 {
+                compatible = "regulator-fixed";
+                regulator-name = "p3v3_en";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                gpio = <&gpa1 1 1>;
+                enable-active-high;
+                regulator-boot-on;
+        };
+
+        rtc@10070000 {
+                status = "okay";
+        };
+
+        sdhci@12530000 {
+                bus-width = <4>;
+                pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
+                pinctrl-names = "default";
+                status = "okay";
+        };
+
+        serial@13800000 {
+                status = "okay";
+        };
+
+        serial@13810000 {
+                status = "okay";
+        };
+
+        serial@13820000 {
+                status = "okay";
+        };
+
+        serial@13830000 {
+                status = "okay";
+        };
+
+        fixed-rate-clocks {
+                xxti {
+                        compatible = "samsung,clock-xxti";
+                        clock-frequency = <0>;
+                };
+
+                xusbxti {
+                        compatible = "samsung,clock-xusbxti";
+                        clock-frequency = <24000000>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts
new file mode 100644
index 000000000000..1fecf7666dc0
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -0,0 +1,432 @@
+/*
+ * Insignal's Exynos4412 based Origen board device tree source
+ *
+ * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Device tree source file for Insignal's Origen board which is based on
+ * Samsung's Exynos4412 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ "exynos4412.dtsi"
+
+/ {
+        model = "Insignal Origen evaluation board based on Exynos4412";
+        compatible = "insignal,origen4412", "samsung,exynos4412";
+
+        memory {
+                reg = <0x40000000 0x40000000>;
+        };
+
+        chosen {
+                bootargs ="console=ttySAC2,115200";
+        };
+
+        mmc_reg: voltage-regulator {
+                compatible = "regulator-fixed";
+                regulator-name = "VMEM_VDD_2.8V";
+                regulator-min-microvolt = <2800000>;
+                regulator-max-microvolt = <2800000>;
+                gpio = <&gpx1 1 0>;
+                enable-active-high;
+        };
+
+        sdhci@12530000 {
+                bus-width = <4>;
+                pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>;
+                pinctrl-names = "default";
+                vmmc-supply = <&mmc_reg>;
+                status = "okay";
+        };
+
+        mshc@12550000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
+                pinctrl-names = "default";
+                status = "okay";
+
+                num-slots = <1>;
+                supports-highspeed;
+                broken-cd;
+                fifo-depth = <0x80>;
+                card-detect-delay = <200>;
+                samsung,dw-mshc-ciu-div = <3>;
+                samsung,dw-mshc-sdr-timing = <2 3>;
+                samsung,dw-mshc-ddr-timing = <1 2>;
+
+                slot@0 {
+                        reg = <0>;
+                        bus-width = <8>;
+                };
+        };
+
+        codec@13400000 {
+                samsung,mfc-r = <0x43000000 0x800000>;
+                samsung,mfc-l = <0x51000000 0x800000>;
+                status = "okay";
+        };
+
+        serial@13800000 {
+                status = "okay";
+        };
+
+        serial@13810000 {
+                status = "okay";
+        };
+
+        serial@13820000 {
+                status = "okay";
+        };
+
+        serial@13830000 {
+                status = "okay";
+        };
+
+        i2c@13860000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <20000>;
+                pinctrl-0 = <&i2c0_bus>;
+                pinctrl-names = "default";
+                status = "okay";
+
+                s5m8767_pmic@66 {
+                        compatible = "samsung,s5m8767-pmic";
+                        reg = <0x66>;
+
+                        s5m8767,pmic-buck-default-dvs-idx = <3>;
+
+                        s5m8767,pmic-buck-dvs-gpios = <&gpx2 3 0>,
+                                                         <&gpx2 4 0>,
+                                                         <&gpx2 5 0>;
+
+                        s5m8767,pmic-buck-ds-gpios = <&gpm3 5 0>,
+                                                        <&gpm3 6 0>,
+                                                        <&gpm3 7 0>;
+
+                        s5m8767,pmic-buck2-dvs-voltage = <1250000>, <1200000>,
+                                                         <1200000>, <1200000>,
+                                                         <1200000>, <1200000>,
+                                                         <1200000>, <1200000>;
+
+                        s5m8767,pmic-buck3-dvs-voltage = <1100000>, <1100000>,
+                                                         <1100000>, <1100000>,
+                                                         <1100000>, <1100000>,
+                                                         <1100000>, <1100000>;
+
+                        s5m8767,pmic-buck4-dvs-voltage = <1200000>, <1200000>,
+                                                         <1200000>, <1200000>,
+                                                         <1200000>, <1200000>,
+                                                         <1200000>, <1200000>;
+
+                        regulators {
+                                ldo1_reg: LDO1 {
+                                        regulator-name = "VDD_ALIVE";
+                                        regulator-min-microvolt = <1100000>;
+                                        regulator-max-microvolt = <1100000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo2_reg: LDO2 {
+                                        regulator-name = "VDDQ_M12";
+                                        regulator-min-microvolt = <1200000>;
+                                        regulator-max-microvolt = <1200000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo3_reg: LDO3 {
+                                        regulator-name = "VDDIOAP_18";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo4_reg: LDO4 {
+                                        regulator-name = "VDDQ_PRE";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo5_reg: LDO5 {
+                                        regulator-name = "VDD18_2M";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo6_reg: LDO6 {
+                                        regulator-name = "VDD10_MPLL";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1000000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo7_reg: LDO7 {
+                                        regulator-name = "VDD10_XPLL";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1000000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo8_reg: LDO8 {
+                                        regulator-name = "VDD10_MIPI";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1000000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo9_reg: LDO9 {
+                                        regulator-name = "VDD33_LCD";
+                                        regulator-min-microvolt = <3300000>;
+                                        regulator-max-microvolt = <3300000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo10_reg: LDO10 {
+                                        regulator-name = "VDD18_MIPI";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo11_reg: LDO11 {
+                                        regulator-name = "VDD18_ABB1";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo12_reg: LDO12 {
+                                        regulator-name = "VDD33_UOTG";
+                                        regulator-min-microvolt = <3300000>;
+                                        regulator-max-microvolt = <3300000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo13_reg: LDO13 {
+                                        regulator-name = "VDDIOPERI_18";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo14_reg: LDO14 {
+                                        regulator-name = "VDD18_ABB02";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo15_reg: LDO15 {
+                                        regulator-name = "VDD10_USH";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1000000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo16_reg: LDO16 {
+                                        regulator-name = "VDD18_HSIC";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo17_reg: LDO17 {
+                                        regulator-name = "VDDIOAP_MMC012_28";
+                                        regulator-min-microvolt = <2800000>;
+                                        regulator-max-microvolt = <2800000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo18_reg: LDO18 {
+                                        regulator-name = "VDDIOPERI_28";
+                                        regulator-min-microvolt = <2800000>;
+                                        regulator-max-microvolt = <2800000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo19_reg: LDO19 {
+                                        regulator-name = "DVDD25";
+                                        regulator-min-microvolt = <2500000>;
+                                        regulator-max-microvolt = <2500000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo20_reg: LDO20 {
+                                        regulator-name = "VDD28_CAM";
+                                        regulator-min-microvolt = <2800000>;
+                                        regulator-max-microvolt = <2800000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo21_reg: LDO21 {
+                                        regulator-name = "VDD28_AF";
+                                        regulator-min-microvolt = <2800000>;
+                                        regulator-max-microvolt = <2800000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo22_reg: LDO22 {
+                                        regulator-name = "VDDA28_2M";
+                                        regulator-min-microvolt = <2800000>;
+                                        regulator-max-microvolt = <2800000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo23_reg: LDO23 {
+                                        regulator-name = "VDD28_TF";
+                                        regulator-min-microvolt = <2800000>;
+                                        regulator-max-microvolt = <2800000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo24_reg: LDO24 {
+                                        regulator-name = "VDD33_A31";
+                                        regulator-min-microvolt = <3300000>;
+                                        regulator-max-microvolt = <3300000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo25_reg: LDO25 {
+                                        regulator-name = "VDD18_CAM";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo26_reg: LDO26 {
+                                        regulator-name = "VDD18_A31";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo27_reg: LDO27 {
+                                        regulator-name = "GPS_1V8";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                ldo28_reg: LDO28 {
+                                        regulator-name = "DVDD12";
+                                        regulator-min-microvolt = <1200000>;
+                                        regulator-max-microvolt = <1200000>;
+                                        regulator-always-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                buck1_reg: BUCK1 {
+                                        regulator-name = "vdd_mif";
+                                        regulator-min-microvolt = <950000>;
+                                        regulator-max-microvolt = <1100000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                buck2_reg: BUCK2 {
+                                        regulator-name = "vdd_arm";
+                                        regulator-min-microvolt = <925000>;
+                                        regulator-max-microvolt = <1300000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                buck3_reg: BUCK3 {
+                                        regulator-name = "vdd_int";
+                                        regulator-min-microvolt = <900000>;
+                                        regulator-max-microvolt = <1200000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                buck4_reg: BUCK4 {
+                                        regulator-name = "vdd_g3d";
+                                        regulator-min-microvolt = <750000>;
+                                        regulator-max-microvolt = <1500000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                buck5_reg: BUCK5 {
+                                        regulator-name = "vdd_m12";
+                                        regulator-min-microvolt = <750000>;
+                                        regulator-max-microvolt = <1500000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                buck6_reg: BUCK6 {
+                                        regulator-name = "vdd12_5m";
+                                        regulator-min-microvolt = <750000>;
+                                        regulator-max-microvolt = <1500000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+
+                                buck9_reg: BUCK9 {
+                                        regulator-name = "vddf28_emmc";
+                                        regulator-min-microvolt = <750000>;
+                                        regulator-max-microvolt = <3000000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                        op_mode = <1>; /* Normal Mode */
+                                };
+                        };
+                };
+        };
+
+        fixed-rate-clocks {
+                xxti {
+                        compatible = "samsung,clock-xxti";
+                        clock-frequency = <0>;
+                };
+
+                xusbxti {
+                        compatible = "samsung,clock-xusbxti";
+                        clock-frequency = <24000000>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts b/arch/arm/boot/dts/exynos4412-smdk4412.dts
index f05bf575cc45..874beeaef99d 100644
--- a/arch/arm/boot/dts/exynos4412-smdk4412.dts
+++ b/arch/arm/boot/dts/exynos4412-smdk4412.dts
@@ -27,6 +27,19 @@
                 bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc";
         };
 
+        sdhci@12530000 {
+                bus-width = <4>;
+                pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>;
+                pinctrl-names = "default";
+                status = "okay";
+        };
+
+        codec@13400000 {
+                samsung,mfc-r = <0x43000000 0x800000>;
+                samsung,mfc-l = <0x51000000 0x800000>;
+                status = "okay";
+        };
+
         serial@13800000 {
                 status = "okay";
         };
@@ -42,4 +55,16 @@
         serial@13830000 {
                 status = "okay";
         };
+
+        fixed-rate-clocks {
+                xxti {
+                        compatible = "samsung,clock-xxti";
+                        clock-frequency = <0>;
+                };
+
+                xusbxti {
+                        compatible = "samsung,clock-xusbxti";
+                        clock-frequency = <24000000>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index d7dfe312772a..d75c047e80a9 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -25,4 +25,30 @@
         gic:interrupt-controller@10490000 {
                 cpu-offset = <0x4000>;
         };
+
+        mct@10050000 {
+                compatible = "samsung,exynos4412-mct";
+                reg = <0x10050000 0x800>;
+                interrupt-controller;
+                #interrups-cells = <2>;
+                interrupt-parent = <&mct_map>;
+                interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
+                             <4 0>, <5 0>, <6 0>, <7 0>;
+                clocks = <&clock 3>, <&clock 344>;
+                clock-names = "fin_pll", "mct";
+
+                mct_map: mct-map {
+                        #interrupt-cells = <2>;
+                        #address-cells = <0>;
+                        #size-cells = <0>;
+                        interrupt-map = <0x0 0 &gic 0 57 0>,
+                                        <0x1 0 &combiner 12 5>,
+                                        <0x2 0 &combiner 12 6>,
+                                        <0x3 0 &combiner 12 7>,
+                                        <0x4 0 &gic 1 12 0>,
+                                        <0x5 0 &gic 1 12 0>,
+                                        <0x6 0 &gic 1 12 0>,
+                                        <0x7 0 &gic 1 12 0>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index 9a8780694909..7496b8d633ea 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -36,6 +36,12 @@
                              <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>;
         };
 
+        clock: clock-controller@0x10030000 {
+                compatible = "samsung,exynos4412-clock";
+                reg = <0x10030000 0x20000>;
+                #clock-cells = <1>;
+        };
+
         pinctrl_0: pinctrl@11400000 {
                 compatible = "samsung,exynos4x12-pinctrl";
                 reg = <0x11400000 0x1000>;
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
new file mode 100644
index 000000000000..5de019cb0e58
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -0,0 +1,129 @@
+/*
+ * Samsung's Exynos5250 based Arndale board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ "exynos5250.dtsi"
+
+/ {
+        model = "Insignal Arndale evaluation board based on EXYNOS5250";
+        compatible = "insignal,arndale", "samsung,exynos5250";
+
+        memory {
+                reg = <0x40000000 0x80000000>;
+        };
+
+        chosen {
+                bootargs = "console=ttySAC2,115200";
+        };
+
+        i2c@12C60000 {
+                status = "disabled";
+        };
+
+        i2c@12C70000 {
+                status = "disabled";
+        };
+
+        i2c@12C80000 {
+                status = "disabled";
+        };
+
+        i2c@12C90000 {
+                status = "disabled";
+        };
+
+        i2c@12CA0000 {
+                status = "disabled";
+        };
+
+        i2c@12CB0000 {
+                status = "disabled";
+        };
+
+        i2c@12CC0000 {
+                status = "disabled";
+        };
+
+        i2c@12CD0000 {
+                status = "disabled";
+        };
+
+        i2c@121D0000 {
+                status = "disabled";
+        };
+
+        dwmmc_0: dwmmc0@12200000 {
+                num-slots = <1>;
+                supports-highspeed;
+                broken-cd;
+                fifo-depth = <0x80>;
+                card-detect-delay = <200>;
+                samsung,dw-mshc-ciu-div = <3>;
+                samsung,dw-mshc-sdr-timing = <2 3>;
+                samsung,dw-mshc-ddr-timing = <1 2>;
+
+                slot@0 {
+                        reg = <0>;
+                        bus-width = <8>;
+                        gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
+                                <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
+                                <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>,
+                                <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
+                                <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>;
+                };
+        };
+
+        dwmmc_1: dwmmc1@12210000 {
+                status = "disabled";
+        };
+
+        dwmmc_2: dwmmc2@12220000 {
+                num-slots = <1>;
+                supports-highspeed;
+                fifo-depth = <0x80>;
+                card-detect-delay = <200>;
+                samsung,dw-mshc-ciu-div = <3>;
+                samsung,dw-mshc-sdr-timing = <2 3>;
+                samsung,dw-mshc-ddr-timing = <1 2>;
+
+                slot@0 {
+                        reg = <0>;
+                        bus-width = <4>;
+                        samsung,cd-pinmux-gpio = <&gpc3 2 2 3 3>;
+                        gpios = <&gpc3 0 2 0 3>, <&gpc3 1 2 0 3>,
+                                <&gpc3 3 2 3 3>, <&gpc3 4 2 3 3>,
+                                <&gpc3 5 2 3 3>, <&gpc3 6 2 3 3>;
+                };
+        };
+
+        dwmmc_3: dwmmc3@12230000 {
+                status = "disabled";
+        };
+
+        spi_0: spi@12d20000 {
+                status = "disabled";
+        };
+
+        spi_1: spi@12d30000 {
+                status = "disabled";
+        };
+
+        spi_2: spi@12d40000 {
+                status = "disabled";
+        };
+
+        fixed-rate-clocks {
+                xxti {
+                        compatible = "samsung,clock-xxti";
+                        clock-frequency = <24000000>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 1b8d4106d338..872ae1f93c75 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -231,4 +231,24 @@
                 samsung,i2s-controller = <&i2s0>;
                 samsung,audio-codec = <&wm8994>;
         };
+
+        usb@12110000 {
+                samsung,vbus-gpio = <&gpx2 6 1 3 3>;
+        };
+
+        dp-controller {
+                samsung,color-space = <0>;
+                samsung,dynamic-range = <0>;
+                samsung,ycbcr-coeff = <0>;
+                samsung,color-depth = <1>;
+                samsung,link-rate = <0x0a>;
+                samsung,lane-count = <4>;
+        };
+
+        fixed-rate-clocks {
+                xxti {
+                        compatible = "samsung,clock-xxti";
+                        clock-frequency = <24000000>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts
index 17dd951c1cd2..babd9f9b1bf9 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -40,4 +40,15 @@
                                 <&gpc4 5 2 3 0>, <&gpc4 6 2 3 0>;
                 };
         };
+
+        usb@12110000 {
+                samsung,vbus-gpio = <&gpx1 1 1 3 3>;
+        };
+
+        fixed-rate-clocks {
+                xxti {
+                        compatible = "samsung,clock-xxti";
+                        clock-frequency = <24000000>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index b1ac73e21c80..28758e5dd15c 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -46,6 +46,22 @@
                 i2c8 = &i2c_8;
         };
 
+        pd_gsc: gsc-power-domain@0x10044000 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10044000 0x20>;
+        };
+
+        pd_mfc: mfc-power-domain@0x10044040 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10044040 0x20>;
+        };
+
+        clock: clock-controller@0x10010000 {
+                compatible = "samsung,exynos5250-clock";
+                reg = <0x10010000 0x30000>;
+                #clock-cells = <1>;
+        };
+
         gic:interrupt-controller@10481000 {
                 compatible = "arm,cortex-a9-gic";
                 #interrupt-cells = <3>;
@@ -69,58 +85,106 @@
                              <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
         };
 
+        mct@101C0000 {
+                compatible = "samsung,exynos4210-mct";
+                reg = <0x101C0000 0x800>;
+                interrupt-controller;
+                #interrups-cells = <2>;
+                interrupt-parent = <&mct_map>;
+                interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
+                             <4 0>, <5 0>;
+                clocks = <&clock 1>, <&clock 335>;
+                clock-names = "fin_pll", "mct";
+
+                mct_map: mct-map {
+                        #interrupt-cells = <2>;
+                        #address-cells = <0>;
+                        #size-cells = <0>;
+                        interrupt-map = <0x0 0 &combiner 23 3>,
+                                        <0x1 0 &combiner 23 4>,
+                                        <0x2 0 &combiner 25 2>,
+                                        <0x3 0 &combiner 25 3>,
+                                        <0x4 0 &gic 0 120 0>,
+                                        <0x5 0 &gic 0 121 0>;
+                };
+        };
+
+        pmu {
+                compatible = "arm,cortex-a15-pmu";
+                interrupt-parent = <&combiner>;
+                interrupts = <1 2>, <22 4>;
+        };
+
         watchdog {
                 compatible = "samsung,s3c2410-wdt";
                 reg = <0x101D0000 0x100>;
                 interrupts = <0 42 0>;
+                clocks = <&clock 336>;
+                clock-names = "watchdog";
         };
 
         codec@11000000 {
                 compatible = "samsung,mfc-v6";
                 reg = <0x11000000 0x10000>;
                 interrupts = <0 96 0>;
+                samsung,power-domain = <&pd_mfc>;
         };
 
         rtc {
                 compatible = "samsung,s3c6410-rtc";
                 reg = <0x101E0000 0x100>;
                 interrupts = <0 43 0>, <0 44 0>;
+                clocks = <&clock 337>;
+                clock-names = "rtc";
+                status = "disabled";
         };
 
         tmu@10060000 {
                 compatible = "samsung,exynos5250-tmu";
                 reg = <0x10060000 0x100>;
                 interrupts = <0 65 0>;
+                clocks = <&clock 338>;
+                clock-names = "tmu_apbif";
         };
 
         serial@12C00000 {
                 compatible = "samsung,exynos4210-uart";
                 reg = <0x12C00000 0x100>;
                 interrupts = <0 51 0>;
+                clocks = <&clock 289>, <&clock 146>;
+                clock-names = "uart", "clk_uart_baud0";
         };
 
         serial@12C10000 {
                 compatible = "samsung,exynos4210-uart";
                 reg = <0x12C10000 0x100>;
                 interrupts = <0 52 0>;
+                clocks = <&clock 290>, <&clock 147>;
+                clock-names = "uart", "clk_uart_baud0";
         };
 
         serial@12C20000 {
                 compatible = "samsung,exynos4210-uart";
                 reg = <0x12C20000 0x100>;
                 interrupts = <0 53 0>;
+                clocks = <&clock 291>, <&clock 148>;
+                clock-names = "uart", "clk_uart_baud0";
         };
 
         serial@12C30000 {
                 compatible = "samsung,exynos4210-uart";
                 reg = <0x12C30000 0x100>;
                 interrupts = <0 54 0>;
+                clocks = <&clock 292>, <&clock 149>;
+                clock-names = "uart", "clk_uart_baud0";
         };
 
         sata@122F0000 {
                 compatible = "samsung,exynos5-sata-ahci";
                 reg = <0x122F0000 0x1ff>;
                 interrupts = <0 115 0>;
+                clocks = <&clock 277>, <&clock 143>;
+                clock-names = "sata", "sclk_sata";
         };
 
         sata-phy@12170000 {
@@ -134,6 +198,8 @@
                 interrupts = <0 56 0>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 294>;
+                clock-names = "i2c";
         };
 
         i2c_1: i2c@12C70000 {
@@ -142,6 +208,8 @@
                 interrupts = <0 57 0>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 295>;
+                clock-names = "i2c";
         };
 
         i2c_2: i2c@12C80000 {
@@ -150,6 +218,8 @@
                 interrupts = <0 58 0>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 296>;
+                clock-names = "i2c";
         };
 
         i2c_3: i2c@12C90000 {
@@ -158,6 +228,8 @@
                 interrupts = <0 59 0>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 297>;
+                clock-names = "i2c";
         };
 
         i2c_4: i2c@12CA0000 {
@@ -166,6 +238,8 @@
                 interrupts = <0 60 0>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 298>;
+                clock-names = "i2c";
         };
 
         i2c_5: i2c@12CB0000 {
@@ -174,6 +248,8 @@
                 interrupts = <0 61 0>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 299>;
+                clock-names = "i2c";
         };
 
         i2c_6: i2c@12CC0000 {
@@ -182,6 +258,8 @@
                 interrupts = <0 62 0>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 300>;
+                clock-names = "i2c";
         };
 
         i2c_7: i2c@12CD0000 {
@@ -190,6 +268,8 @@
                 interrupts = <0 63 0>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 301>;
+                clock-names = "i2c";
         };
 
         i2c_8: i2c@12CE0000 {
@@ -198,6 +278,8 @@
                 interrupts = <0 64 0>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 302>;
+                clock-names = "i2c";
         };
 
         i2c@121D0000 {
@@ -205,6 +287,8 @@
                 reg = <0x121D0000 0x100>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 288>;
+                clock-names = "i2c";
         };
 
         spi_0: spi@12d20000 {
@@ -216,6 +300,8 @@
                 dma-names = "tx", "rx";
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 304>, <&clock 154>;
+                clock-names = "spi", "spi_busclk0";
         };
 
         spi_1: spi@12d30000 {
@@ -227,6 +313,8 @@
                 dma-names = "tx", "rx";
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 305>, <&clock 155>;
+                clock-names = "spi", "spi_busclk0";
         };
 
         spi_2: spi@12d40000 {
@@ -238,6 +326,8 @@
                 dma-names = "tx", "rx";
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 306>, <&clock 156>;
+                clock-names = "spi", "spi_busclk0";
         };
 
         dwmmc_0: dwmmc0@12200000 {
@@ -246,6 +336,8 @@
                 interrupts = <0 75 0>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 280>, <&clock 139>;
+                clock-names = "biu", "ciu";
         };
 
         dwmmc_1: dwmmc1@12210000 {
@@ -254,6 +346,8 @@
                 interrupts = <0 76 0>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 281>, <&clock 140>;
+                clock-names = "biu", "ciu";
         };
 
         dwmmc_2: dwmmc2@12220000 {
@@ -262,6 +356,8 @@
                 interrupts = <0 77 0>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 282>, <&clock 141>;
+                clock-names = "biu", "ciu";
         };
 
         dwmmc_3: dwmmc3@12230000 {
@@ -270,6 +366,8 @@
                 interrupts = <0 78 0>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 283>, <&clock 142>;
+                clock-names = "biu", "ciu";
         };
 
         i2s0: i2s@03830000 {
@@ -301,6 +399,18 @@
                 dma-names = "tx", "rx";
         };
 
+        usb@12110000 {
+                compatible = "samsung,exynos4210-ehci";
+                reg = <0x12110000 0x100>;
+                interrupts = <0 71 0>;
+        };
+
+        usb@12120000 {
+                compatible = "samsung,exynos4210-ohci";
+                reg = <0x12120000 0x100>;
+                interrupts = <0 71 0>;
+        };
+
         amba {
                 #address-cells = <1>;
                 #size-cells = <1>;
@@ -312,6 +422,8 @@
                         compatible = "arm,pl330", "arm,primecell";
                         reg = <0x121A0000 0x1000>;
                         interrupts = <0 34 0>;
+                        clocks = <&clock 275>;
+                        clock-names = "apb_pclk";
                         #dma-cells = <1>;
                         #dma-channels = <8>;
                         #dma-requests = <32>;
@@ -321,6 +433,8 @@
                         compatible = "arm,pl330", "arm,primecell";
                         reg = <0x121B0000 0x1000>;
                         interrupts = <0 35 0>;
+                        clocks = <&clock 276>;
+                        clock-names = "apb_pclk";
                         #dma-cells = <1>;
                         #dma-channels = <8>;
                         #dma-requests = <32>;
@@ -330,6 +444,8 @@
                         compatible = "arm,pl330", "arm,primecell";
                         reg = <0x10800000 0x1000>;
                         interrupts = <0 33 0>;
+                        clocks = <&clock 271>;
+                        clock-names = "apb_pclk";
                         #dma-cells = <1>;
                         #dma-channels = <8>;
                         #dma-requests = <1>;
@@ -339,6 +455,8 @@
                         compatible = "arm,pl330", "arm,primecell";
                         reg = <0x11C10000 0x1000>;
                         interrupts = <0 124 0>;
+                        clocks = <&clock 271>;
+                        clock-names = "apb_pclk";
                         #dma-cells = <1>;
                         #dma-channels = <8>;
                         #dma-requests = <1>;
@@ -592,34 +710,51 @@
                 };
         };
 
+
         gsc_0:  gsc@0x13e00000 {
                 compatible = "samsung,exynos5-gsc";
                 reg = <0x13e00000 0x1000>;
                 interrupts = <0 85 0>;
+                samsung,power-domain = <&pd_gsc>;
+                clocks = <&clock 256>;
+                clock-names = "gscl";
         };
 
         gsc_1:  gsc@0x13e10000 {
                 compatible = "samsung,exynos5-gsc";
                 reg = <0x13e10000 0x1000>;
                 interrupts = <0 86 0>;
+                samsung,power-domain = <&pd_gsc>;
+                clocks = <&clock 257>;
+                clock-names = "gscl";
         };
 
         gsc_2:  gsc@0x13e20000 {
                 compatible = "samsung,exynos5-gsc";
                 reg = <0x13e20000 0x1000>;
                 interrupts = <0 87 0>;
+                samsung,power-domain = <&pd_gsc>;
+                clocks = <&clock 258>;
+                clock-names = "gscl";
         };
 
         gsc_3:  gsc@0x13e30000 {
                 compatible = "samsung,exynos5-gsc";
                 reg = <0x13e30000 0x1000>;
                 interrupts = <0 88 0>;
+                samsung,power-domain = <&pd_gsc>;
+                clocks = <&clock 259>;
+                clock-names = "gscl";
         };
 
         hdmi {
                 compatible = "samsung,exynos5-hdmi";
                 reg = <0x14530000 0x70000>;
                 interrupts = <0 95 0>;
+                clocks = <&clock 333>, <&clock 136>, <&clock 137>,
+                                <&clock 333>, <&clock 333>;
+                clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
+                                "sclk_hdmiphy", "hdmiphy";
         };
 
         mixer {
@@ -627,4 +762,18 @@
                 reg = <0x14450000 0x10000>;
                 interrupts = <0 94 0>;
         };
+
+        dp-controller {
+                compatible = "samsung,exynos5-dp";
+                reg = <0x145b0000 0x1000>;
+                interrupts = <10 3>;
+                interrupt-parent = <&combiner>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                dptx-phy {
+                        reg = <0x10040720>;
+                        samsung,enable-mask = <1>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/exynos5440-ssdk5440.dts b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
index 81e2c964a900..a21eb4cbe893 100644
--- a/arch/arm/boot/dts/exynos5440-ssdk5440.dts
+++ b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
@@ -28,19 +28,10 @@
                 status = "disabled";
         };
 
-        i2c@F0000 {
-                status = "disabled";
-        };
-
-        i2c@100000 {
-                status = "disabled";
-        };
-
-        watchdog {
-                status = "disabled";
-        };
-
-        rtc {
-                status = "disabled";
+        fixed-rate-clocks {
+                xtal {
+                        compatible = "samsung,clock-xtal";
+                        clock-frequency = <50000000>;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 9a99755920c0..48cc96aa0b5f 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -16,6 +16,12 @@
 
         interrupt-parent = <&gic>;
 
+        clock: clock-controller@0x160000 {
+                compatible = "samsung,exynos5440-clock";
+                reg = <0x160000 0x1000>;
+                #clock-cells = <1>;
+        };
+
         gic:interrupt-controller@2E0000 {
                 compatible = "arm,cortex-a15-gic";
                 #interrupt-cells = <3>;
@@ -24,55 +30,51 @@
         };
 
         cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
                 cpu@0 {
                         compatible = "arm,cortex-a15";
-                        timer {
-                                compatible = "arm,armv7-timer";
-                                interrupts = <1 13 0xf08>;
-                                clock-frequency = <1000000>;
-                        };
+                        reg = <0>;
                 };
                 cpu@1 {
                         compatible = "arm,cortex-a15";
-                        timer {
-                                compatible = "arm,armv7-timer";
-                                interrupts = <1 14 0xf08>;
-                                clock-frequency = <1000000>;
-                        };
+                        reg = <1>;
                 };
                 cpu@2 {
                         compatible = "arm,cortex-a15";
-                        timer {
-                                compatible = "arm,armv7-timer";
-                                interrupts = <1 14 0xf08>;
-                                clock-frequency = <1000000>;
-                        };
+                        reg = <2>;
                 };
                 cpu@3 {
                         compatible = "arm,cortex-a15";
-                        timer {
-                                compatible = "arm,armv7-timer";
-                                interrupts = <1 14 0xf08>;
-                                clock-frequency = <1000000>;
-                        };
+                        reg = <3>;
                 };
         };
 
-        common {
-                compatible = "samsung,exynos5440";
-
+        timer {
+                compatible = "arm,cortex-a15-timer",
+                             "arm,armv7-timer";
+                interrupts = <1 13 0xf08>,
+                             <1 14 0xf08>,
+                             <1 11 0xf08>,
+                             <1 10 0xf08>;
+                clock-frequency = <50000000>;
         };
 
         serial@B0000 {
                 compatible = "samsung,exynos4210-uart";
                 reg = <0xB0000 0x1000>;
                 interrupts = <0 2 0>;
+                clocks = <&clock 21>, <&clock 21>;
+                clock-names = "uart", "clk_uart_baud0";
         };
 
         serial@C0000 {
                 compatible = "samsung,exynos4210-uart";
                 reg = <0xC0000 0x1000>;
                 interrupts = <0 3 0>;
+                clocks = <&clock 21>, <&clock 21>;
+                clock-names = "uart", "clk_uart_baud0";
         };
 
         spi {
@@ -83,6 +85,8 @@
                 rx-dma-channel = <&pdma0 4>; /* preliminary */
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 21>, <&clock 16>;
+                clock-names = "spi", "spi_busclk0";
         };
 
         pinctrl {
@@ -110,25 +114,31 @@
         };
 
         i2c@F0000 {
-                compatible = "samsung,s3c2440-i2c";
+                compatible = "samsung,exynos5440-i2c";
                 reg = <0xF0000 0x1000>;
                 interrupts = <0 5 0>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 21>;
+                clock-names = "i2c";
         };
 
         i2c@100000 {
-                compatible = "samsung,s3c2440-i2c";
+                compatible = "samsung,exynos5440-i2c";
                 reg = <0x100000 0x1000>;
                 interrupts = <0 6 0>;
                 #address-cells = <1>;
                 #size-cells = <0>;
+                clocks = <&clock 21>;
+                clock-names = "i2c";
         };
 
         watchdog {
                 compatible = "samsung,s3c2410-wdt";
                 reg = <0x110000 0x1000>;
                 interrupts = <0 1 0>;
+                clocks = <&clock 21>;
+                clock-names = "watchdog";
         };
 
         amba {
@@ -142,6 +152,8 @@
                         compatible = "arm,pl330", "arm,primecell";
                         reg = <0x120000 0x1000>;
                         interrupts = <0 34 0>;
+                        clocks = <&clock 21>;
+                        clock-names = "apb_pclk";
                         #dma-cells = <1>;
                         #dma-channels = <8>;
                         #dma-requests = <32>;
@@ -151,6 +163,8 @@
                         compatible = "arm,pl330", "arm,primecell";
                         reg = <0x121000 0x1000>;
                         interrupts = <0 35 0>;
+                        clocks = <&clock 21>;
+                        clock-names = "apb_pclk";
                         #dma-cells = <1>;
                         #dma-channels = <8>;
                         #dma-requests = <32>;
@@ -161,5 +175,8 @@
                 compatible = "samsung,s3c6410-rtc";
                 reg = <0x130000 0x1000>;
                 interrupts = <0 17 0>, <0 16 0>;
+                clocks = <&clock 21>;
+                clock-names = "rtc";
+                status = "disabled";
         };
 };
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index f624dc85d441..02d23f15fd86 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -38,6 +38,57 @@
                 };
         };
 
+        /* HS USB Port 2 RESET */
+        hsusb2_reset: hsusb2_reset_reg {
+                compatible = "regulator-fixed";
+                regulator-name = "hsusb2_reset";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                gpio = <&gpio5 19 0>;   /* gpio_147 */
+                startup-delay-us = <70000>;
+                enable-active-high;
+        };
+
+        /* HS USB Port 2 Power */
+        hsusb2_power: hsusb2_power_reg {
+                compatible = "regulator-fixed";
+                regulator-name = "hsusb2_vbus";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                gpio = <&twl_gpio 18 0>;        /* GPIO LEDA */
+                startup-delay-us = <70000>;
+        };
+
+        /* HS USB Host PHY on PORT 2 */
+        hsusb2_phy: hsusb2_phy {
+                compatible = "usb-nop-xceiv";
+                reset-supply = <&hsusb2_reset>;
+                vcc-supply = <&hsusb2_power>;
+        };
+};
+
+&omap3_pmx_core {
+        pinctrl-names = "default";
+        pinctrl-0 = <
+                        &hsusbb2_pins
+        >;
+
+        hsusbb2_pins: pinmux_hsusbb2_pins {
+                pinctrl-single,pins = <
+                        0x5c0 0x3  /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_clk OUTPUT */
+                        0x5c2 0x3  /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_stp OUTPUT */
+                        0x5c4 0x10b  /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dir INPUT | PULLDOWN */
+                        0x5c6 0x10b  /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_nxt INPUT | PULLDOWN */
+                        0x5c8 0x10b  /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat0 INPUT | PULLDOWN */
+                        0x5cA 0x10b  /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat1 INPUT | PULLDOWN */
+                        0x1a4 0x10b  /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat2 INPUT | PULLDOWN */
+                        0x1a6 0x10b  /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat3 INPUT | PULLDOWN */
+                        0x1a8 0x10b  /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat4 INPUT | PULLDOWN */
+                        0x1aa 0x10b  /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat5 INPUT | PULLDOWN */
+                        0x1ac 0x10b  /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat6 INPUT | PULLDOWN */
+                        0x1ae 0x10b  /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat7 INPUT | PULLDOWN */
+                >;
+        };
 };
 
 &i2c1 {
@@ -65,3 +116,23 @@
 &mmc3 {
         status = "disabled";
 };
+
+&usbhshost {
+        port2-mode = "ehci-phy";
+};
+
+&usbhsehci {
+        phys = <0 &hsusb2_phy>;
+};
+
+&twl_gpio {
+        ti,use-leds;
+        /* pullups: BIT(1) */
+        ti,pullups = <0x000002>;
+        /*
+         * pulldowns:
+         * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
+         * BIT(15), BIT(16), BIT(17)
+         */
+        ti,pulldowns = <0x03a1c4>;
+};
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 1acc26148ffc..a14f74bbce7c 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -397,5 +397,36 @@
                         ti,timer-alwon;
                         ti,timer-secure;
                 };
+
+                usbhstll: usbhstll@48062000 {
+                        compatible = "ti,usbhs-tll";
+                        reg = <0x48062000 0x1000>;
+                        interrupts = <78>;
+                        ti,hwmods = "usb_tll_hs";
+                };
+
+                usbhshost: usbhshost@48064000 {
+                        compatible = "ti,usbhs-host";
+                        reg = <0x48064000 0x400>;
+                        ti,hwmods = "usb_host_hs";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges;
+
+                        usbhsohci: ohci@48064400 {
+                                compatible = "ti,ohci-omap3", "usb-ohci";
+                                reg = <0x48064400 0x400>;
+                                interrupt-parent = <&intc>;
+                                interrupts = <76>;
+                        };
+
+                        usbhsehci: ehci@48064800 {
+                                compatible = "ti,ehci-omap", "usb-ehci";
+                                reg = <0x48064800 0x400>;
+                                interrupt-parent = <&intc>;
+                                interrupts = <77>;
+                        };
+                };
+
         };
 };
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 739bb79e410e..b7db1a2b6ca7 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -529,5 +529,35 @@
                         ti,hwmods = "timer11";
                         ti,timer-pwm;
                 };
+
+                usbhstll: usbhstll@4a062000 {
+                        compatible = "ti,usbhs-tll";
+                        reg = <0x4a062000 0x1000>;
+                        interrupts = <0 78 0x4>;
+                        ti,hwmods = "usb_tll_hs";
+                };
+
+                usbhshost: usbhshost@4a064000 {
+                        compatible = "ti,usbhs-host";
+                        reg = <0x4a064000 0x800>;
+                        ti,hwmods = "usb_host_hs";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges;
+
+                        usbhsohci: ohci@4a064800 {
+                                compatible = "ti,ohci-omap3", "usb-ohci";
+                                reg = <0x4a064800 0x400>;
+                                interrupt-parent = <&gic>;
+                                interrupts = <0 76 0x4>;
+                        };
+
+                        usbhsehci: ehci@4a064c00 {
+                                compatible = "ti,ehci-omap", "usb-ehci";
+                                reg = <0x4a064c00 0x400>;
+                                interrupt-parent = <&gic>;
+                                interrupts = <0 77 0x4>;
+                        };
+                };
         };
 };
diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts
index 6ebc1b704190..616990dc92db 100644
--- a/arch/arm/boot/dts/tegra114-dalmore.dts
+++ b/arch/arm/boot/dts/tegra114-dalmore.dts
@@ -12,7 +12,6 @@
 
         serial@70006300 {
                 status = "okay";
-                clock-frequency = <408000000>;
         };
 
         pmc {
diff --git a/arch/arm/boot/dts/tegra114-pluto.dts b/arch/arm/boot/dts/tegra114-pluto.dts
index 5deb8692b350..6bbc8efae9c0 100644
--- a/arch/arm/boot/dts/tegra114-pluto.dts
+++ b/arch/arm/boot/dts/tegra114-pluto.dts
@@ -12,7 +12,6 @@
 
         serial@70006300 {
                 status = "okay";
-                clock-frequency = <408000000>;
         };
 
         pmc {
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index c0b527d15fda..c1110a9b2a91 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -24,10 +24,11 @@
                               0 42 0x04
                               0 121 0x04
                               0 122 0x04>;
+                clocks = <&tegra_car 5>;
         };
 
         tegra_car: clock {
-                compatible = "nvidia,tegra114-car, nvidia,tegra30-car";
+                compatible = "nvidia,tegra114-car";
                 reg = <0x60006000 0x1000>;
                 #clock-cells = <1>;
         };
@@ -66,6 +67,7 @@
                 reg-shift = <2>;
                 interrupts = <0 36 0x04>;
                 status = "disabled";
+                clocks = <&tegra_car 6>;
         };
 
         serial@70006040 {
@@ -74,6 +76,7 @@
                 reg-shift = <2>;
                 interrupts = <0 37 0x04>;
                 status = "disabled";
+                clocks = <&tegra_car 192>;
         };
 
         serial@70006200 {
@@ -82,6 +85,7 @@
                 reg-shift = <2>;
                 interrupts = <0 46 0x04>;
                 status = "disabled";
+                clocks = <&tegra_car 55>;
         };
 
         serial@70006300 {
@@ -90,12 +94,14 @@
                 reg-shift = <2>;
                 interrupts = <0 90 0x04>;
                 status = "disabled";
+                clocks = <&tegra_car 65>;
         };
 
         rtc {
                 compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc";
                 reg = <0x7000e000 0x100>;
                 interrupts = <0 2 0x04>;
+                clocks = <&tegra_car 4>;
         };
 
         pmc {
diff --git a/arch/arm/boot/dts/vt8500.dtsi b/arch/arm/boot/dts/vt8500.dtsi
index 68c8dc644383..4a4b96f6827e 100644
--- a/arch/arm/boot/dts/vt8500.dtsi
+++ b/arch/arm/boot/dts/vt8500.dtsi
@@ -25,11 +25,13 @@
                         #interrupt-cells = <1>;
                 };
 
-                gpio: gpio-controller@d8110000 {
-                        compatible = "via,vt8500-gpio";
-                        gpio-controller;
+                pinctrl: pinctrl@d8110000 {
+                        compatible = "via,vt8500-pinctrl";
                         reg = <0xd8110000 0x10000>;
-                        #gpio-cells = <3>;
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
                 };
 
                 pmc@d8130000 {
diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi
index 398b8bca791e..b2bf359e852f 100644
--- a/arch/arm/boot/dts/wm8505.dtsi
+++ b/arch/arm/boot/dts/wm8505.dtsi
@@ -40,11 +40,13 @@
                         interrupts = <56 57 58 59 60 61 62 63>;
                 };
 
-                gpio: gpio-controller@d8110000 {
-                        compatible = "wm,wm8505-gpio";
-                        gpio-controller;
+                pinctrl: pinctrl@d8110000 {
+                        compatible = "wm,wm8505-pinctrl";
                         reg = <0xd8110000 0x10000>;
-                        #gpio-cells = <3>;
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
                 };
 
                 pmc@d8130000 {
diff --git a/arch/arm/boot/dts/wm8650.dtsi b/arch/arm/boot/dts/wm8650.dtsi
index 9313407bbc30..dd8464eeb40d 100644
--- a/arch/arm/boot/dts/wm8650.dtsi
+++ b/arch/arm/boot/dts/wm8650.dtsi
@@ -34,11 +34,13 @@
                         interrupts = <56 57 58 59 60 61 62 63>;
                 };
 
-                gpio: gpio-controller@d8110000 {
-                        compatible = "wm,wm8650-gpio";
-                        gpio-controller;
+                pinctrl: pinctrl@d8110000 {
+                        compatible = "wm,wm8650-pinctrl";
                         reg = <0xd8110000 0x10000>;
-                        #gpio-cells = <3>;
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
                 };
 
                 pmc@d8130000 {
diff --git a/arch/arm/boot/dts/wm8850.dtsi b/arch/arm/boot/dts/wm8850.dtsi
index 7149cd13e3b9..fc790d0aee66 100644
--- a/arch/arm/boot/dts/wm8850.dtsi
+++ b/arch/arm/boot/dts/wm8850.dtsi
@@ -41,11 +41,13 @@
                         interrupts = <56 57 58 59 60 61 62 63>;
                 };
 
-                gpio: gpio-controller@d8110000 {
-                        compatible = "wm,wm8650-gpio";
-                        gpio-controller;
+                pinctrl: pinctrl@d8110000 {
+                        compatible = "wm,wm8850-pinctrl";
                         reg = <0xd8110000 0x10000>;
-                        #gpio-cells = <3>;
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
                 };
 
                 pmc@d8130000 {
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 9e1c339c4491..748fc347ed18 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -118,56 +118,23 @@
                 };
 
                 ttc0: ttc0@f8001000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "xlnx,ttc";
+                        interrupt-parent = <&intc>;
+                        interrupts = < 0 10 4 0 11 4 0 12 4 >;
+                        compatible = "cdns,ttc";
                         reg = <0xF8001000 0x1000>;
                         clocks = <&cpu_clk 3>;
                         clock-names = "cpu_1x";
                         clock-ranges;
-
-                        ttc0_0: ttc0.0 {
-                                status = "disabled";
-                                reg = <0>;
-                                interrupts = <0 10 4>;
-                        };
-                        ttc0_1: ttc0.1 {
-                                status = "disabled";
-                                reg = <1>;
-                                interrupts = <0 11 4>;
-                        };
-                        ttc0_2: ttc0.2 {
-                                status = "disabled";
-                                reg = <2>;
-                                interrupts = <0 12 4>;
-                        };
                 };
 
                 ttc1: ttc1@f8002000 {
-                        #interrupt-parent = <&intc>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "xlnx,ttc";
+                        interrupt-parent = <&intc>;
+                        interrupts = < 0 37 4 0 38 4 0 39 4 >;
+                        compatible = "cdns,ttc";
                         reg = <0xF8002000 0x1000>;
                         clocks = <&cpu_clk 3>;
                         clock-names = "cpu_1x";
                         clock-ranges;
-
-                        ttc1_0: ttc1.0 {
-                                status = "disabled";
-                                reg = <0>;
-                                interrupts = <0 37 4>;
-                        };
-                        ttc1_1: ttc1.1 {
-                                status = "disabled";
-                                reg = <1>;
-                                interrupts = <0 38 4>;
-                        };
-                        ttc1_2: ttc1.2 {
-                                status = "disabled";
-                                reg = <2>;
-                                interrupts = <0 39 4>;
-                        };
                 };
         };
 };
diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
index c772942a399a..86f44d5b0265 100644
--- a/arch/arm/boot/dts/zynq-zc702.dts
+++ b/arch/arm/boot/dts/zynq-zc702.dts
@@ -32,13 +32,3 @@
 &ps_clk {
         clock-frequency = <33333330>;
 };
-
-&ttc0_0 {
-        status = "ok";
-        compatible = "xlnx,ttc-counter-clocksource";
-};
-
-&ttc0_1 {
-        status = "ok";
-        compatible = "xlnx,ttc-counter-clockevent";
-};