diff options
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/dts/at91sam9x5.dtsi | 28 | ||||
-rw-r--r-- | arch/arm/boot/dts/dbx5x0.dtsi | 3 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos4.dtsi | 9 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5440.dtsi | 6 | ||||
-rw-r--r-- | arch/arm/boot/dts/href.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/hrefv60plus.dts | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/snowball.dts | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/tegra20.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/tegra30.dtsi | 2 |
9 files changed, 47 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index aa98e641931f..a98c0d50fbbe 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi | |||
@@ -238,8 +238,32 @@ | |||
238 | nand { | 238 | nand { |
239 | pinctrl_nand: nand-0 { | 239 | pinctrl_nand: nand-0 { |
240 | atmel,pins = | 240 | atmel,pins = |
241 | <3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */ | 241 | <3 0 0x1 0x0 /* PD0 periph A Read Enable */ |
242 | 3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */ | 242 | 3 1 0x1 0x0 /* PD1 periph A Write Enable */ |
243 | 3 2 0x1 0x0 /* PD2 periph A Address Latch Enable */ | ||
244 | 3 3 0x1 0x0 /* PD3 periph A Command Latch Enable */ | ||
245 | 3 4 0x0 0x1 /* PD4 gpio Chip Enable pin pull_up */ | ||
246 | 3 5 0x0 0x1 /* PD5 gpio RDY/BUSY pin pull_up */ | ||
247 | 3 6 0x1 0x0 /* PD6 periph A Data bit 0 */ | ||
248 | 3 7 0x1 0x0 /* PD7 periph A Data bit 1 */ | ||
249 | 3 8 0x1 0x0 /* PD8 periph A Data bit 2 */ | ||
250 | 3 9 0x1 0x0 /* PD9 periph A Data bit 3 */ | ||
251 | 3 10 0x1 0x0 /* PD10 periph A Data bit 4 */ | ||
252 | 3 11 0x1 0x0 /* PD11 periph A Data bit 5 */ | ||
253 | 3 12 0x1 0x0 /* PD12 periph A Data bit 6 */ | ||
254 | 3 13 0x1 0x0>; /* PD13 periph A Data bit 7 */ | ||
255 | }; | ||
256 | |||
257 | pinctrl_nand_16bits: nand_16bits-0 { | ||
258 | atmel,pins = | ||
259 | <3 14 0x1 0x0 /* PD14 periph A Data bit 8 */ | ||
260 | 3 15 0x1 0x0 /* PD15 periph A Data bit 9 */ | ||
261 | 3 16 0x1 0x0 /* PD16 periph A Data bit 10 */ | ||
262 | 3 17 0x1 0x0 /* PD17 periph A Data bit 11 */ | ||
263 | 3 18 0x1 0x0 /* PD18 periph A Data bit 12 */ | ||
264 | 3 19 0x1 0x0 /* PD19 periph A Data bit 13 */ | ||
265 | 3 20 0x1 0x0 /* PD20 periph A Data bit 14 */ | ||
266 | 3 21 0x1 0x0>; /* PD21 periph A Data bit 15 */ | ||
243 | }; | 267 | }; |
244 | }; | 268 | }; |
245 | 269 | ||
diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi index 69140ba99f46..9de93096601a 100644 --- a/arch/arm/boot/dts/dbx5x0.dtsi +++ b/arch/arm/boot/dts/dbx5x0.dtsi | |||
@@ -319,9 +319,8 @@ | |||
319 | }; | 319 | }; |
320 | }; | 320 | }; |
321 | 321 | ||
322 | ab8500@5 { | 322 | ab8500 { |
323 | compatible = "stericsson,ab8500"; | 323 | compatible = "stericsson,ab8500"; |
324 | reg = <5>; /* mailbox 5 is i2c */ | ||
325 | interrupt-parent = <&intc>; | 324 | interrupt-parent = <&intc>; |
326 | interrupts = <0 40 0x4>; | 325 | interrupts = <0 40 0x4>; |
327 | interrupt-controller; | 326 | interrupt-controller; |
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index e1347fceb5bc..1a62bcf18aa3 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi | |||
@@ -275,18 +275,27 @@ | |||
275 | compatible = "arm,pl330", "arm,primecell"; | 275 | compatible = "arm,pl330", "arm,primecell"; |
276 | reg = <0x12680000 0x1000>; | 276 | reg = <0x12680000 0x1000>; |
277 | interrupts = <0 35 0>; | 277 | interrupts = <0 35 0>; |
278 | #dma-cells = <1>; | ||
279 | #dma-channels = <8>; | ||
280 | #dma-requests = <32>; | ||
278 | }; | 281 | }; |
279 | 282 | ||
280 | pdma1: pdma@12690000 { | 283 | pdma1: pdma@12690000 { |
281 | compatible = "arm,pl330", "arm,primecell"; | 284 | compatible = "arm,pl330", "arm,primecell"; |
282 | reg = <0x12690000 0x1000>; | 285 | reg = <0x12690000 0x1000>; |
283 | interrupts = <0 36 0>; | 286 | interrupts = <0 36 0>; |
287 | #dma-cells = <1>; | ||
288 | #dma-channels = <8>; | ||
289 | #dma-requests = <32>; | ||
284 | }; | 290 | }; |
285 | 291 | ||
286 | mdma1: mdma@12850000 { | 292 | mdma1: mdma@12850000 { |
287 | compatible = "arm,pl330", "arm,primecell"; | 293 | compatible = "arm,pl330", "arm,primecell"; |
288 | reg = <0x12850000 0x1000>; | 294 | reg = <0x12850000 0x1000>; |
289 | interrupts = <0 34 0>; | 295 | interrupts = <0 34 0>; |
296 | #dma-cells = <1>; | ||
297 | #dma-channels = <8>; | ||
298 | #dma-requests = <1>; | ||
290 | }; | 299 | }; |
291 | }; | 300 | }; |
292 | }; | 301 | }; |
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index 5f3562ad6746..9a99755920c0 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi | |||
@@ -142,12 +142,18 @@ | |||
142 | compatible = "arm,pl330", "arm,primecell"; | 142 | compatible = "arm,pl330", "arm,primecell"; |
143 | reg = <0x120000 0x1000>; | 143 | reg = <0x120000 0x1000>; |
144 | interrupts = <0 34 0>; | 144 | interrupts = <0 34 0>; |
145 | #dma-cells = <1>; | ||
146 | #dma-channels = <8>; | ||
147 | #dma-requests = <32>; | ||
145 | }; | 148 | }; |
146 | 149 | ||
147 | pdma1: pdma@121B0000 { | 150 | pdma1: pdma@121B0000 { |
148 | compatible = "arm,pl330", "arm,primecell"; | 151 | compatible = "arm,pl330", "arm,primecell"; |
149 | reg = <0x121000 0x1000>; | 152 | reg = <0x121000 0x1000>; |
150 | interrupts = <0 35 0>; | 153 | interrupts = <0 35 0>; |
154 | #dma-cells = <1>; | ||
155 | #dma-channels = <8>; | ||
156 | #dma-requests = <32>; | ||
151 | }; | 157 | }; |
152 | }; | 158 | }; |
153 | 159 | ||
diff --git a/arch/arm/boot/dts/href.dtsi b/arch/arm/boot/dts/href.dtsi index 592fb9dc35bd..379128eb9d98 100644 --- a/arch/arm/boot/dts/href.dtsi +++ b/arch/arm/boot/dts/href.dtsi | |||
@@ -221,7 +221,7 @@ | |||
221 | }; | 221 | }; |
222 | }; | 222 | }; |
223 | 223 | ||
224 | ab8500@5 { | 224 | ab8500 { |
225 | ab8500-regulators { | 225 | ab8500-regulators { |
226 | ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { | 226 | ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { |
227 | regulator-name = "V-DISPLAY"; | 227 | regulator-name = "V-DISPLAY"; |
diff --git a/arch/arm/boot/dts/hrefv60plus.dts b/arch/arm/boot/dts/hrefv60plus.dts index 55f4191a626e..2b587a74b813 100644 --- a/arch/arm/boot/dts/hrefv60plus.dts +++ b/arch/arm/boot/dts/hrefv60plus.dts | |||
@@ -158,7 +158,7 @@ | |||
158 | }; | 158 | }; |
159 | }; | 159 | }; |
160 | 160 | ||
161 | ab8500@5 { | 161 | ab8500 { |
162 | ab8500-regulators { | 162 | ab8500-regulators { |
163 | ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { | 163 | ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { |
164 | regulator-name = "V-DISPLAY"; | 164 | regulator-name = "V-DISPLAY"; |
diff --git a/arch/arm/boot/dts/snowball.dts b/arch/arm/boot/dts/snowball.dts index 27f31a5fa494..d3ec32f6b790 100644 --- a/arch/arm/boot/dts/snowball.dts +++ b/arch/arm/boot/dts/snowball.dts | |||
@@ -298,7 +298,7 @@ | |||
298 | }; | 298 | }; |
299 | }; | 299 | }; |
300 | 300 | ||
301 | ab8500@5 { | 301 | ab8500 { |
302 | ab8500-regulators { | 302 | ab8500-regulators { |
303 | ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { | 303 | ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { |
304 | regulator-name = "V-DISPLAY"; | 304 | regulator-name = "V-DISPLAY"; |
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 48d00a099ce3..3d3f64d2111a 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi | |||
@@ -385,7 +385,7 @@ | |||
385 | 385 | ||
386 | spi@7000d800 { | 386 | spi@7000d800 { |
387 | compatible = "nvidia,tegra20-slink"; | 387 | compatible = "nvidia,tegra20-slink"; |
388 | reg = <0x7000d480 0x200>; | 388 | reg = <0x7000d800 0x200>; |
389 | interrupts = <0 83 0x04>; | 389 | interrupts = <0 83 0x04>; |
390 | nvidia,dma-request-selector = <&apbdma 17>; | 390 | nvidia,dma-request-selector = <&apbdma 17>; |
391 | #address-cells = <1>; | 391 | #address-cells = <1>; |
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 9d87a3ffe998..dbf46c272562 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi | |||
@@ -372,7 +372,7 @@ | |||
372 | 372 | ||
373 | spi@7000d800 { | 373 | spi@7000d800 { |
374 | compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; | 374 | compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; |
375 | reg = <0x7000d480 0x200>; | 375 | reg = <0x7000d800 0x200>; |
376 | interrupts = <0 83 0x04>; | 376 | interrupts = <0 83 0x04>; |
377 | nvidia,dma-request-selector = <&apbdma 17>; | 377 | nvidia,dma-request-selector = <&apbdma 17>; |
378 | #address-cells = <1>; | 378 | #address-cells = <1>; |