2 files changed, 0 insertions, 90 deletions
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index c47f2a3f8f8f..fbe5eef1f6c9 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -23,10 +23,6 @@ ifeq ($(CONFIG_ARCH_L7200),y)
 OBJS            += head-l7200.o
 endif
-ifeq ($(CONFIG_ARCH_CLPS7500),y)
-HEAD            = head-clps7500.o
-endif
 ifeq ($(CONFIG_ARCH_P720T),y)
 # Borrow this code from SA1100
 OBJS            += head-sa1100.o
diff --git a/arch/arm/boot/compressed/head-clps7500.S b/arch/arm/boot/compressed/head-clps7500.S
deleted file mode 100644
index 4f3c78ac30a0..000000000000
--- a/arch/arm/boot/compressed/head-clps7500.S
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * linux/arch/arm/boot/compressed/head-clps7500.S
- *
- * Copyright (C) 1999, 2000, 2001 Nexus Electronics Ltd
- */
-                /* There are three different ways the kernel can be
-                   booted on a 7500 system: from Angel (loaded in RAM), from
-                   16-bit ROM or from 32-bit Flash.  Luckily, a single kernel
-                   image does for them all. */
-                /* This branch is taken if the CPU memory width matches the
-                   actual device in use.  The default at power on is 16 bits
-                   so we must be prepared for a mismatch. */
-                .section ".start", "ax"
-2:
-                b       1f
-                .word   0xffff
-                .word   0xb632          @ mov r11, #0x03200000
-                .word   0xe3a0
-                .word   0x0000          @ mov r0, #0
-                .word   0xe3a0
-                .word   0x0080          @ strb r0, [r11, #0x80]
-                .word   0xe5cb
-                .word   0xf000          @ mov pc, #0
-                .word   0xe3a0
-1:
-                adr     r1, 2b
-                teq     r1, #0
-                bne     .Langel
-                /* This is a direct-from-ROM boot.  Copy the kernel into 
-                   RAM and run it there. */
-                mov     r0, #0x30
-                mcr     p15, 0, r0, c1, c0, 0
-                mov     r0, #0x13
-                msr     cpsr_cxsf, r0
-                mov     r12, #0x03000000        @ point to LEDs
-                orr     r12, r12, #0x00020000
-                orr     r12, r12, #0xba00
-                mov     r0, #0x5500
-                str     r0, [r12]
-                mov     r0, #0x10000000
-                orr     r0, r0, #0x8000
-                mov     r4, r0
-                ldr     r2, =_end
-2:
-                ldr     r3, [r1], #4
-                str     r3, [r0], #4
-                teq     r0, r2
-                bne     2b
-                mov     r0, #0xff00
-                str     r0, [r12]
-1:      
-                mov     r12, #0x03000000        @ point to LEDs
-                orr     r12, r12, #0x00020000
-                orr     r12, r12, #0xba00
-                mov     r0, #0xfe00
-                str     r0, [r12]
-                adr     lr, 1f
-                mov     r0, #0
-                mov     r1, #14         /* MACH_TYPE_CLPS7500 */
-                mov     pc, lr
-.Langel:
-#ifdef CONFIG_ANGELBOOT
-                /* Call Angel to switch into SVC mode. */
-                mov     r0, #0x17
-                swi     0x123456
-#endif
-                /* Ensure all interrupts are off and MMU disabled */
-                mrs     r0, cpsr
-                orr     r0, r0, #0xc0
-                msr     cpsr_cxsf, r0
-                adr     lr, 1b
-                orr     lr, lr, #0x10000000
-                mov     r0, #0x30               @ MMU off
-                mcr     p15, 0, r0, c1, c0, 0
-                mov     r0, r0
-                mov     pc, lr
-                .ltorg
-1:
-/* And the rest */
-#include "head.S"

diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index c47f2a3f8f8f..fbe5eef1f6c9 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile
@@ -23,10 +23,6 @@ ifeq ($(CONFIG_ARCH_L7200),y)
23	OBJS += head-l7200.o	23	OBJS += head-l7200.o
24	endif	24	endif
25		25
26	ifeq ($(CONFIG_ARCH_CLPS7500),y)
27	HEAD = head-clps7500.o
28	endif
29
30	ifeq ($(CONFIG_ARCH_P720T),y)	26	ifeq ($(CONFIG_ARCH_P720T),y)
31	# Borrow this code from SA1100	27	# Borrow this code from SA1100
32	OBJS += head-sa1100.o	28	OBJS += head-sa1100.o


diff --git a/arch/arm/boot/compressed/head-clps7500.S b/arch/arm/boot/compressed/head-clps7500.S deleted file mode 100644 index 4f3c78ac30a0..000000000000 --- a/arch/arm/boot/compressed/head-clps7500.S +++ /dev/null
@@ -1,86 +0,0 @@
1	/*
2	* linux/arch/arm/boot/compressed/head-clps7500.S
3	*
4	* Copyright (C) 1999, 2000, 2001 Nexus Electronics Ltd
5	*/
6
7
8	/* There are three different ways the kernel can be
9	booted on a 7500 system: from Angel (loaded in RAM), from
10	16-bit ROM or from 32-bit Flash. Luckily, a single kernel
11	image does for them all. */
12	/* This branch is taken if the CPU memory width matches the
13	actual device in use. The default at power on is 16 bits
14	so we must be prepared for a mismatch. */
15	.section ".start", "ax"
16	2:
17	b 1f
18	.word 0xffff
19	.word 0xb632 @ mov r11, #0x03200000
20	.word 0xe3a0
21	.word 0x0000 @ mov r0, #0
22	.word 0xe3a0
23	.word 0x0080 @ strb r0, [r11, #0x80]
24	.word 0xe5cb
25	.word 0xf000 @ mov pc, #0
26	.word 0xe3a0
27	1:
28	adr r1, 2b
29	teq r1, #0
30	bne .Langel
31	/* This is a direct-from-ROM boot. Copy the kernel into
32	RAM and run it there. */
33	mov r0, #0x30
34	mcr p15, 0, r0, c1, c0, 0
35	mov r0, #0x13
36	msr cpsr_cxsf, r0
37	mov r12, #0x03000000 @ point to LEDs
38	orr r12, r12, #0x00020000
39	orr r12, r12, #0xba00
40	mov r0, #0x5500
41	str r0, [r12]
42	mov r0, #0x10000000
43	orr r0, r0, #0x8000
44	mov r4, r0
45	ldr r2, =_end
46	2:
47	ldr r3, [r1], #4
48	str r3, [r0], #4
49	teq r0, r2
50	bne 2b
51	mov r0, #0xff00
52	str r0, [r12]
53	1:
54	mov r12, #0x03000000 @ point to LEDs
55	orr r12, r12, #0x00020000
56	orr r12, r12, #0xba00
57	mov r0, #0xfe00
58	str r0, [r12]
59
60	adr lr, 1f
61	mov r0, #0
62	mov r1, #14 /* MACH_TYPE_CLPS7500 */
63	mov pc, lr
64	.Langel:
65	#ifdef CONFIG_ANGELBOOT
66	/* Call Angel to switch into SVC mode. */
67	mov r0, #0x17
68	swi 0x123456
69	#endif
70	/* Ensure all interrupts are off and MMU disabled */
71	mrs r0, cpsr
72	orr r0, r0, #0xc0
73	msr cpsr_cxsf, r0
74
75	adr lr, 1b
76	orr lr, lr, #0x10000000
77	mov r0, #0x30 @ MMU off
78	mcr p15, 0, r0, c1, c0, 0
79	mov r0, r0
80	mov pc, lr
81
82	.ltorg
83
84	1:
85	/* And the rest */
86	#include "head.S"