aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/at91sam9g25ek.dts37
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi172
-rw-r--r--arch/arm/boot/dts/at91sam9x5cm.dtsi14
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi1
-rw-r--r--arch/arm/boot/dts/tegra-paz00.dts6
5 files changed, 227 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/at91sam9g25ek.dts b/arch/arm/boot/dts/at91sam9g25ek.dts
new file mode 100644
index 000000000000..e64eb932083b
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9g25ek.dts
@@ -0,0 +1,37 @@
1/*
2 * at91sam9g25ek.dts - Device Tree file for AT91SAM9G25-EK board
3 *
4 * Copyright (C) 2012 Atmel,
5 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9/dts-v1/;
10/include/ "at91sam9x5.dtsi"
11/include/ "at91sam9x5cm.dtsi"
12
13/ {
14 model = "Atmel AT91SAM9G25-EK";
15 compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
16
17 chosen {
18 bootargs = "128M console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
19 };
20
21 ahb {
22 apb {
23 dbgu: serial@fffff200 {
24 status = "okay";
25 };
26
27 usart0: serial@f801c000 {
28 status = "okay";
29 };
30
31 macb0: ethernet@f802c000 {
32 phy-mode = "rmii";
33 status = "okay";
34 };
35 };
36 };
37};
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
new file mode 100644
index 000000000000..e91391f50730
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -0,0 +1,172 @@
1/*
2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
5 *
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 model = "Atmel AT91SAM9x5 family SoC";
16 compatible = "atmel,at91sam9x5";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 gpio0 = &pioA;
25 gpio1 = &pioB;
26 gpio2 = &pioC;
27 gpio3 = &pioD;
28 tcb0 = &tcb0;
29 tcb1 = &tcb1;
30 };
31 cpus {
32 cpu@0 {
33 compatible = "arm,arm926ejs";
34 };
35 };
36
37 memory@20000000 {
38 reg = <0x20000000 0x10000000>;
39 };
40
41 ahb {
42 compatible = "simple-bus";
43 #address-cells = <1>;
44 #size-cells = <1>;
45 ranges;
46
47 apb {
48 compatible = "simple-bus";
49 #address-cells = <1>;
50 #size-cells = <1>;
51 ranges;
52
53 aic: interrupt-controller@fffff000 {
54 #interrupt-cells = <2>;
55 compatible = "atmel,at91rm9200-aic";
56 interrupt-controller;
57 interrupt-parent;
58 reg = <0xfffff000 0x200>;
59 };
60
61 pit: timer@fffffe30 {
62 compatible = "atmel,at91sam9260-pit";
63 reg = <0xfffffe30 0xf>;
64 interrupts = <1 4>;
65 };
66
67 tcb0: timer@f8008000 {
68 compatible = "atmel,at91sam9x5-tcb";
69 reg = <0xf8008000 0x100>;
70 interrupts = <17 4>;
71 };
72
73 tcb1: timer@f800c000 {
74 compatible = "atmel,at91sam9x5-tcb";
75 reg = <0xf800c000 0x100>;
76 interrupts = <17 4>;
77 };
78
79 dma0: dma-controller@ffffec00 {
80 compatible = "atmel,at91sam9g45-dma";
81 reg = <0xffffec00 0x200>;
82 interrupts = <20 4>;
83 };
84
85 dma1: dma-controller@ffffee00 {
86 compatible = "atmel,at91sam9g45-dma";
87 reg = <0xffffee00 0x200>;
88 interrupts = <21 4>;
89 };
90
91 pioA: gpio@fffff400 {
92 compatible = "atmel,at91rm9200-gpio";
93 reg = <0xfffff400 0x100>;
94 interrupts = <2 4>;
95 #gpio-cells = <2>;
96 gpio-controller;
97 };
98
99 pioB: gpio@fffff600 {
100 compatible = "atmel,at91rm9200-gpio";
101 reg = <0xfffff600 0x100>;
102 interrupts = <2 4>;
103 #gpio-cells = <2>;
104 gpio-controller;
105 };
106
107 pioC: gpio@fffff800 {
108 compatible = "atmel,at91rm9200-gpio";
109 reg = <0xfffff800 0x100>;
110 interrupts = <3 4>;
111 #gpio-cells = <2>;
112 gpio-controller;
113 };
114
115 pioD: gpio@fffffa00 {
116 compatible = "atmel,at91rm9200-gpio";
117 reg = <0xfffffa00 0x100>;
118 interrupts = <3 4>;
119 #gpio-cells = <2>;
120 gpio-controller;
121 };
122
123 dbgu: serial@fffff200 {
124 compatible = "atmel,at91sam9260-usart";
125 reg = <0xfffff200 0x200>;
126 interrupts = <1 4>;
127 status = "disabled";
128 };
129
130 usart0: serial@f801c000 {
131 compatible = "atmel,at91sam9260-usart";
132 reg = <0xf801c000 0x200>;
133 interrupts = <5 4>;
134 atmel,use-dma-rx;
135 atmel,use-dma-tx;
136 status = "disabled";
137 };
138
139 usart1: serial@f8020000 {
140 compatible = "atmel,at91sam9260-usart";
141 reg = <0xf8020000 0x200>;
142 interrupts = <6 4>;
143 atmel,use-dma-rx;
144 atmel,use-dma-tx;
145 status = "disabled";
146 };
147
148 usart2: serial@f8024000 {
149 compatible = "atmel,at91sam9260-usart";
150 reg = <0xf8024000 0x200>;
151 interrupts = <7 4>;
152 atmel,use-dma-rx;
153 atmel,use-dma-tx;
154 status = "disabled";
155 };
156
157 macb0: ethernet@f802c000 {
158 compatible = "cdns,at32ap7000-macb", "cdns,macb";
159 reg = <0xf802c000 0x100>;
160 interrupts = <24 4>;
161 status = "disabled";
162 };
163
164 macb1: ethernet@f8030000 {
165 compatible = "cdns,at32ap7000-macb", "cdns,macb";
166 reg = <0xf8030000 0x100>;
167 interrupts = <27 4>;
168 status = "disabled";
169 };
170 };
171 };
172};
diff --git a/arch/arm/boot/dts/at91sam9x5cm.dtsi b/arch/arm/boot/dts/at91sam9x5cm.dtsi
new file mode 100644
index 000000000000..4ab5a77f4afc
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x5cm.dtsi
@@ -0,0 +1,14 @@
1/*
2 * at91sam9x5cm.dtsi - Device Tree Include file for AT91SAM9x5 CPU Module
3 *
4 * Copyright (C) 2012 Atmel,
5 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9
10/ {
11 memory@20000000 {
12 reg = <0x20000000 0x8000000>;
13 };
14};
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 63d7578856c1..a1dd2ee83753 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -29,6 +29,7 @@
29 compatible = "arm,cortex-a9-gic"; 29 compatible = "arm,cortex-a9-gic";
30 #interrupt-cells = <3>; 30 #interrupt-cells = <3>;
31 interrupt-controller; 31 interrupt-controller;
32 cpu-offset = <0x8000>;
32 reg = <0x10490000 0x1000>, <0x10480000 0x100>; 33 reg = <0x10490000 0x1000>, <0x10480000 0x100>;
33 }; 34 };
34 35
diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts
index 1a1d7023b69b..825d2957da0b 100644
--- a/arch/arm/boot/dts/tegra-paz00.dts
+++ b/arch/arm/boot/dts/tegra-paz00.dts
@@ -46,11 +46,11 @@
46 }; 46 };
47 47
48 serial@70006200 { 48 serial@70006200 {
49 status = "disable"; 49 clock-frequency = <216000000>;
50 }; 50 };
51 51
52 serial@70006300 { 52 serial@70006300 {
53 clock-frequency = <216000000>; 53 status = "disable";
54 }; 54 };
55 55
56 serial@70006400 { 56 serial@70006400 {
@@ -60,7 +60,7 @@
60 sdhci@c8000000 { 60 sdhci@c8000000 {
61 cd-gpios = <&gpio 173 0>; /* gpio PV5 */ 61 cd-gpios = <&gpio 173 0>; /* gpio PV5 */
62 wp-gpios = <&gpio 57 0>; /* gpio PH1 */ 62 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
63 power-gpios = <&gpio 155 0>; /* gpio PT3 */ 63 power-gpios = <&gpio 169 0>; /* gpio PV1 */
64 }; 64 };
65 65
66 sdhci@c8000200 { 66 sdhci@c8000200 {
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-24 12:21:52 -0500