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-rw-r--r--arch/arm/boot/dts/r8a7791.dtsi31
1 files changed, 0 insertions, 31 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 240c4ece1f0c..41194fe18c3c 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -53,7 +53,6 @@
53 gpio0: gpio@e6050000 { 53 gpio0: gpio@e6050000 {
54 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; 54 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
55 reg = <0 0xe6050000 0 0x50>; 55 reg = <0 0xe6050000 0 0x50>;
56 interrupt-parent = <&gic>;
57 interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>; 56 interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
58 #gpio-cells = <2>; 57 #gpio-cells = <2>;
59 gpio-controller; 58 gpio-controller;
@@ -65,7 +64,6 @@
65 gpio1: gpio@e6051000 { 64 gpio1: gpio@e6051000 {
66 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; 65 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
67 reg = <0 0xe6051000 0 0x50>; 66 reg = <0 0xe6051000 0 0x50>;
68 interrupt-parent = <&gic>;
69 interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>; 67 interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
70 #gpio-cells = <2>; 68 #gpio-cells = <2>;
71 gpio-controller; 69 gpio-controller;
@@ -77,7 +75,6 @@
77 gpio2: gpio@e6052000 { 75 gpio2: gpio@e6052000 {
78 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; 76 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
79 reg = <0 0xe6052000 0 0x50>; 77 reg = <0 0xe6052000 0 0x50>;
80 interrupt-parent = <&gic>;
81 interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>; 78 interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
82 #gpio-cells = <2>; 79 #gpio-cells = <2>;
83 gpio-controller; 80 gpio-controller;
@@ -89,7 +86,6 @@
89 gpio3: gpio@e6053000 { 86 gpio3: gpio@e6053000 {
90 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; 87 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
91 reg = <0 0xe6053000 0 0x50>; 88 reg = <0 0xe6053000 0 0x50>;
92 interrupt-parent = <&gic>;
93 interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>; 89 interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
94 #gpio-cells = <2>; 90 #gpio-cells = <2>;
95 gpio-controller; 91 gpio-controller;
@@ -101,7 +97,6 @@
101 gpio4: gpio@e6054000 { 97 gpio4: gpio@e6054000 {
102 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; 98 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
103 reg = <0 0xe6054000 0 0x50>; 99 reg = <0 0xe6054000 0 0x50>;
104 interrupt-parent = <&gic>;
105 interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>; 100 interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
106 #gpio-cells = <2>; 101 #gpio-cells = <2>;
107 gpio-controller; 102 gpio-controller;
@@ -113,7 +108,6 @@
113 gpio5: gpio@e6055000 { 108 gpio5: gpio@e6055000 {
114 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; 109 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
115 reg = <0 0xe6055000 0 0x50>; 110 reg = <0 0xe6055000 0 0x50>;
116 interrupt-parent = <&gic>;
117 interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; 111 interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
118 #gpio-cells = <2>; 112 #gpio-cells = <2>;
119 gpio-controller; 113 gpio-controller;
@@ -125,7 +119,6 @@
125 gpio6: gpio@e6055400 { 119 gpio6: gpio@e6055400 {
126 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; 120 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
127 reg = <0 0xe6055400 0 0x50>; 121 reg = <0 0xe6055400 0 0x50>;
128 interrupt-parent = <&gic>;
129 interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>; 122 interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
130 #gpio-cells = <2>; 123 #gpio-cells = <2>;
131 gpio-controller; 124 gpio-controller;
@@ -137,7 +130,6 @@
137 gpio7: gpio@e6055800 { 130 gpio7: gpio@e6055800 {
138 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; 131 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
139 reg = <0 0xe6055800 0 0x50>; 132 reg = <0 0xe6055800 0 0x50>;
140 interrupt-parent = <&gic>;
141 interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; 133 interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
142 #gpio-cells = <2>; 134 #gpio-cells = <2>;
143 gpio-controller; 135 gpio-controller;
@@ -149,7 +141,6 @@
149 thermal@e61f0000 { 141 thermal@e61f0000 {
150 compatible = "renesas,thermal-r8a7791", "renesas,rcar-thermal"; 142 compatible = "renesas,thermal-r8a7791", "renesas,rcar-thermal";
151 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>; 143 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
152 interrupt-parent = <&gic>;
153 interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; 144 interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
154 clocks = <&mstp5_clks R8A7791_CLK_THERMAL>; 145 clocks = <&mstp5_clks R8A7791_CLK_THERMAL>;
155 }; 146 };
@@ -167,7 +158,6 @@
167 #interrupt-cells = <2>; 158 #interrupt-cells = <2>;
168 interrupt-controller; 159 interrupt-controller;
169 reg = <0 0xe61c0000 0 0x200>; 160 reg = <0 0xe61c0000 0 0x200>;
170 interrupt-parent = <&gic>;
171 interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>, 161 interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
172 <0 1 IRQ_TYPE_LEVEL_HIGH>, 162 <0 1 IRQ_TYPE_LEVEL_HIGH>,
173 <0 2 IRQ_TYPE_LEVEL_HIGH>, 163 <0 2 IRQ_TYPE_LEVEL_HIGH>,
@@ -189,7 +179,6 @@
189 scifa0: serial@e6c40000 { 179 scifa0: serial@e6c40000 {
190 compatible = "renesas,scifa-r8a7791", "renesas,scifa"; 180 compatible = "renesas,scifa-r8a7791", "renesas,scifa";
191 reg = <0 0xe6c40000 0 64>; 181 reg = <0 0xe6c40000 0 64>;
192 interrupt-parent = <&gic>;
193 interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>; 182 interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
194 clocks = <&mstp2_clks R8A7791_CLK_SCIFA0>; 183 clocks = <&mstp2_clks R8A7791_CLK_SCIFA0>;
195 clock-names = "sci_ick"; 184 clock-names = "sci_ick";
@@ -198,7 +187,6 @@
198 187
199 scifa1: serial@e6c50000 { 188 scifa1: serial@e6c50000 {
200 compatible = "renesas,scifa-r8a7791", "renesas,scifa"; 189 compatible = "renesas,scifa-r8a7791", "renesas,scifa";
201 interrupt-parent = <&gic>;
202 reg = <0 0xe6c50000 0 64>; 190 reg = <0 0xe6c50000 0 64>;
203 interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>; 191 interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
204 clocks = <&mstp2_clks R8A7791_CLK_SCIFA1>; 192 clocks = <&mstp2_clks R8A7791_CLK_SCIFA1>;
@@ -208,7 +196,6 @@
208 196
209 scifa2: serial@e6c60000 { 197 scifa2: serial@e6c60000 {
210 compatible = "renesas,scifa-r8a7791", "renesas,scifa"; 198 compatible = "renesas,scifa-r8a7791", "renesas,scifa";
211 interrupt-parent = <&gic>;
212 reg = <0 0xe6c60000 0 64>; 199 reg = <0 0xe6c60000 0 64>;
213 interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>; 200 interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>;
214 clocks = <&mstp2_clks R8A7791_CLK_SCIFA2>; 201 clocks = <&mstp2_clks R8A7791_CLK_SCIFA2>;
@@ -218,7 +205,6 @@
218 205
219 scifa3: serial@e6c70000 { 206 scifa3: serial@e6c70000 {
220 compatible = "renesas,scifa-r8a7791", "renesas,scifa"; 207 compatible = "renesas,scifa-r8a7791", "renesas,scifa";
221 interrupt-parent = <&gic>;
222 reg = <0 0xe6c70000 0 64>; 208 reg = <0 0xe6c70000 0 64>;
223 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>; 209 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
224 clocks = <&mstp11_clks R8A7791_CLK_SCIFA3>; 210 clocks = <&mstp11_clks R8A7791_CLK_SCIFA3>;
@@ -228,7 +214,6 @@
228 214
229 scifa4: serial@e6c78000 { 215 scifa4: serial@e6c78000 {
230 compatible = "renesas,scifa-r8a7791", "renesas,scifa"; 216 compatible = "renesas,scifa-r8a7791", "renesas,scifa";
231 interrupt-parent = <&gic>;
232 reg = <0 0xe6c78000 0 64>; 217 reg = <0 0xe6c78000 0 64>;
233 interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>; 218 interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
234 clocks = <&mstp11_clks R8A7791_CLK_SCIFA4>; 219 clocks = <&mstp11_clks R8A7791_CLK_SCIFA4>;
@@ -238,7 +223,6 @@
238 223
239 scifa5: serial@e6c80000 { 224 scifa5: serial@e6c80000 {
240 compatible = "renesas,scifa-r8a7791", "renesas,scifa"; 225 compatible = "renesas,scifa-r8a7791", "renesas,scifa";
241 interrupt-parent = <&gic>;
242 reg = <0 0xe6c80000 0 64>; 226 reg = <0 0xe6c80000 0 64>;
243 interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; 227 interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
244 clocks = <&mstp11_clks R8A7791_CLK_SCIFA5>; 228 clocks = <&mstp11_clks R8A7791_CLK_SCIFA5>;
@@ -248,7 +232,6 @@
248 232
249 scifb0: serial@e6c20000 { 233 scifb0: serial@e6c20000 {
250 compatible = "renesas,scifb-r8a7791", "renesas,scifb"; 234 compatible = "renesas,scifb-r8a7791", "renesas,scifb";
251 interrupt-parent = <&gic>;
252 reg = <0 0xe6c20000 0 64>; 235 reg = <0 0xe6c20000 0 64>;
253 interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>; 236 interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;
254 clocks = <&mstp2_clks R8A7791_CLK_SCIFB0>; 237 clocks = <&mstp2_clks R8A7791_CLK_SCIFB0>;
@@ -258,7 +241,6 @@
258 241
259 scifb1: serial@e6c30000 { 242 scifb1: serial@e6c30000 {
260 compatible = "renesas,scifb-r8a7791", "renesas,scifb"; 243 compatible = "renesas,scifb-r8a7791", "renesas,scifb";
261 interrupt-parent = <&gic>;
262 reg = <0 0xe6c30000 0 64>; 244 reg = <0 0xe6c30000 0 64>;
263 interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>; 245 interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;
264 clocks = <&mstp2_clks R8A7791_CLK_SCIFB1>; 246 clocks = <&mstp2_clks R8A7791_CLK_SCIFB1>;
@@ -268,7 +250,6 @@
268 250
269 scifb2: serial@e6ce0000 { 251 scifb2: serial@e6ce0000 {
270 compatible = "renesas,scifb-r8a7791", "renesas,scifb"; 252 compatible = "renesas,scifb-r8a7791", "renesas,scifb";
271 interrupt-parent = <&gic>;
272 reg = <0 0xe6ce0000 0 64>; 253 reg = <0 0xe6ce0000 0 64>;
273 interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>; 254 interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;
274 clocks = <&mstp2_clks R8A7791_CLK_SCIFB2>; 255 clocks = <&mstp2_clks R8A7791_CLK_SCIFB2>;
@@ -278,7 +259,6 @@
278 259
279 scif0: serial@e6e60000 { 260 scif0: serial@e6e60000 {
280 compatible = "renesas,scif-r8a7791", "renesas,scif"; 261 compatible = "renesas,scif-r8a7791", "renesas,scif";
281 interrupt-parent = <&gic>;
282 reg = <0 0xe6e60000 0 64>; 262 reg = <0 0xe6e60000 0 64>;
283 interrupts = <0 152 IRQ_TYPE_LEVEL_HIGH>; 263 interrupts = <0 152 IRQ_TYPE_LEVEL_HIGH>;
284 clocks = <&mstp7_clks R8A7791_CLK_SCIF0>; 264 clocks = <&mstp7_clks R8A7791_CLK_SCIF0>;
@@ -288,7 +268,6 @@
288 268
289 scif1: serial@e6e68000 { 269 scif1: serial@e6e68000 {
290 compatible = "renesas,scif-r8a7791", "renesas,scif"; 270 compatible = "renesas,scif-r8a7791", "renesas,scif";
291 interrupt-parent = <&gic>;
292 reg = <0 0xe6e68000 0 64>; 271 reg = <0 0xe6e68000 0 64>;
293 interrupts = <0 153 IRQ_TYPE_LEVEL_HIGH>; 272 interrupts = <0 153 IRQ_TYPE_LEVEL_HIGH>;
294 clocks = <&mstp7_clks R8A7791_CLK_SCIF1>; 273 clocks = <&mstp7_clks R8A7791_CLK_SCIF1>;
@@ -298,7 +277,6 @@
298 277
299 scif2: serial@e6e58000 { 278 scif2: serial@e6e58000 {
300 compatible = "renesas,scif-r8a7791", "renesas,scif"; 279 compatible = "renesas,scif-r8a7791", "renesas,scif";
301 interrupt-parent = <&gic>;
302 reg = <0 0xe6e58000 0 64>; 280 reg = <0 0xe6e58000 0 64>;
303 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>; 281 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
304 clocks = <&mstp7_clks R8A7791_CLK_SCIF2>; 282 clocks = <&mstp7_clks R8A7791_CLK_SCIF2>;
@@ -308,7 +286,6 @@
308 286
309 scif3: serial@e6ea8000 { 287 scif3: serial@e6ea8000 {
310 compatible = "renesas,scif-r8a7791", "renesas,scif"; 288 compatible = "renesas,scif-r8a7791", "renesas,scif";
311 interrupt-parent = <&gic>;
312 reg = <0 0xe6ea8000 0 64>; 289 reg = <0 0xe6ea8000 0 64>;
313 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; 290 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
314 clocks = <&mstp7_clks R8A7791_CLK_SCIF3>; 291 clocks = <&mstp7_clks R8A7791_CLK_SCIF3>;
@@ -318,7 +295,6 @@
318 295
319 scif4: serial@e6ee0000 { 296 scif4: serial@e6ee0000 {
320 compatible = "renesas,scif-r8a7791", "renesas,scif"; 297 compatible = "renesas,scif-r8a7791", "renesas,scif";
321 interrupt-parent = <&gic>;
322 reg = <0 0xe6ee0000 0 64>; 298 reg = <0 0xe6ee0000 0 64>;
323 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; 299 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
324 clocks = <&mstp7_clks R8A7791_CLK_SCIF4>; 300 clocks = <&mstp7_clks R8A7791_CLK_SCIF4>;
@@ -328,7 +304,6 @@
328 304
329 scif5: serial@e6ee8000 { 305 scif5: serial@e6ee8000 {
330 compatible = "renesas,scif-r8a7791", "renesas,scif"; 306 compatible = "renesas,scif-r8a7791", "renesas,scif";
331 interrupt-parent = <&gic>;
332 reg = <0 0xe6ee8000 0 64>; 307 reg = <0 0xe6ee8000 0 64>;
333 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>; 308 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
334 clocks = <&mstp7_clks R8A7791_CLK_SCIF5>; 309 clocks = <&mstp7_clks R8A7791_CLK_SCIF5>;
@@ -338,7 +313,6 @@
338 313
339 hscif0: serial@e62c0000 { 314 hscif0: serial@e62c0000 {
340 compatible = "renesas,hscif-r8a7791", "renesas,hscif"; 315 compatible = "renesas,hscif-r8a7791", "renesas,hscif";
341 interrupt-parent = <&gic>;
342 reg = <0 0xe62c0000 0 96>; 316 reg = <0 0xe62c0000 0 96>;
343 interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>; 317 interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>;
344 clocks = <&mstp7_clks R8A7791_CLK_HSCIF0>; 318 clocks = <&mstp7_clks R8A7791_CLK_HSCIF0>;
@@ -348,7 +322,6 @@
348 322
349 hscif1: serial@e62c8000 { 323 hscif1: serial@e62c8000 {
350 compatible = "renesas,hscif-r8a7791", "renesas,hscif"; 324 compatible = "renesas,hscif-r8a7791", "renesas,hscif";
351 interrupt-parent = <&gic>;
352 reg = <0 0xe62c8000 0 96>; 325 reg = <0 0xe62c8000 0 96>;
353 interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>; 326 interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>;
354 clocks = <&mstp7_clks R8A7791_CLK_HSCIF1>; 327 clocks = <&mstp7_clks R8A7791_CLK_HSCIF1>;
@@ -358,7 +331,6 @@
358 331
359 hscif2: serial@e62d0000 { 332 hscif2: serial@e62d0000 {
360 compatible = "renesas,hscif-r8a7791", "renesas,hscif"; 333 compatible = "renesas,hscif-r8a7791", "renesas,hscif";
361 interrupt-parent = <&gic>;
362 reg = <0 0xe62d0000 0 96>; 334 reg = <0 0xe62d0000 0 96>;
363 interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>; 335 interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
364 clocks = <&mstp7_clks R8A7791_CLK_HSCIF2>; 336 clocks = <&mstp7_clks R8A7791_CLK_HSCIF2>;
@@ -369,7 +341,6 @@
369 sata0: sata@ee300000 { 341 sata0: sata@ee300000 {
370 compatible = "renesas,sata-r8a7791"; 342 compatible = "renesas,sata-r8a7791";
371 reg = <0 0xee300000 0 0x2000>; 343 reg = <0 0xee300000 0 0x2000>;
372 interrupt-parent = <&gic>;
373 interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; 344 interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
374 clocks = <&mstp8_clks R8A7791_CLK_SATA0>; 345 clocks = <&mstp8_clks R8A7791_CLK_SATA0>;
375 status = "disabled"; 346 status = "disabled";
@@ -378,7 +349,6 @@
378 sata1: sata@ee500000 { 349 sata1: sata@ee500000 {
379 compatible = "renesas,sata-r8a7791"; 350 compatible = "renesas,sata-r8a7791";
380 reg = <0 0xee500000 0 0x2000>; 351 reg = <0 0xee500000 0 0x2000>;
381 interrupt-parent = <&gic>;
382 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; 352 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
383 clocks = <&mstp8_clks R8A7791_CLK_SATA1>; 353 clocks = <&mstp8_clks R8A7791_CLK_SATA1>;
384 status = "disabled"; 354 status = "disabled";
@@ -714,7 +684,6 @@
714 spi: spi@e6b10000 { 684 spi: spi@e6b10000 {
715 compatible = "renesas,qspi-r8a7791", "renesas,qspi"; 685 compatible = "renesas,qspi-r8a7791", "renesas,qspi";
716 reg = <0 0xe6b10000 0 0x2c>; 686 reg = <0 0xe6b10000 0 0x2c>;
717 interrupt-parent = <&gic>;
718 interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; 687 interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
719 clocks = <&mstp9_clks R8A7791_CLK_QSPI_MOD>; 688 clocks = <&mstp9_clks R8A7791_CLK_QSPI_MOD>;
720 num-cs = <1>; 689 num-cs = <1>;