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-rw-r--r--arch/arm/boot/dts/Makefile17
-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi6
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi6
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi6
-rw-r--r--arch/arm/boot/dts/ccu9540.dts72
-rw-r--r--arch/arm/boot/dts/cros5250-common.dtsi184
-rw-r--r--arch/arm/boot/dts/dbx5x0.dtsi56
-rw-r--r--arch/arm/boot/dts/dove-cubox.dts10
-rw-r--r--arch/arm/boot/dts/dove.dtsi19
-rw-r--r--arch/arm/boot/dts/evk-pro3.dts12
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi54
-rw-r--r--arch/arm/boot/dts/exynos4210-origen.dts70
-rw-r--r--arch/arm/boot/dts/exynos4210-pinctrl.dtsi56
-rw-r--r--arch/arm/boot/dts/exynos4210-smdkv310.dts16
-rw-r--r--arch/arm/boot/dts/exynos4210-trats.dts87
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi12
-rw-r--r--arch/arm/boot/dts/exynos4212.dtsi28
-rw-r--r--arch/arm/boot/dts/exynos4412-smdk4412.dts45
-rw-r--r--arch/arm/boot/dts/exynos4412.dtsi28
-rw-r--r--arch/arm/boot/dts/exynos4x12-pinctrl.dtsi965
-rw-r--r--arch/arm/boot/dts/exynos4x12.dtsi69
-rw-r--r--arch/arm/boot/dts/exynos5250-smdk5250.dts56
-rw-r--r--arch/arm/boot/dts/exynos5250-snow.dts43
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi62
-rw-r--r--arch/arm/boot/dts/href.dtsi273
-rw-r--r--arch/arm/boot/dts/hrefprev60.dts48
-rw-r--r--arch/arm/boot/dts/hrefv60plus.dts217
-rw-r--r--arch/arm/boot/dts/imx23-olinuxino.dts23
-rw-r--r--arch/arm/boot/dts/imx23.dtsi13
-rw-r--r--arch/arm/boot/dts/imx25-karo-tx25.dts44
-rw-r--r--arch/arm/boot/dts/imx25.dtsi515
-rw-r--r--arch/arm/boot/dts/imx27-apf27.dts89
-rw-r--r--arch/arm/boot/dts/imx27.dtsi5
-rw-r--r--arch/arm/boot/dts/imx28-apf28.dts85
-rw-r--r--arch/arm/boot/dts/imx28-apf28dev.dts154
-rw-r--r--arch/arm/boot/dts/imx28-cfa10036.dts46
-rw-r--r--arch/arm/boot/dts/imx28-cfa10049.dts33
-rw-r--r--arch/arm/boot/dts/imx28-evk.dts13
-rw-r--r--arch/arm/boot/dts/imx28-sps1.dts169
-rw-r--r--arch/arm/boot/dts/imx28.dtsi35
-rw-r--r--arch/arm/boot/dts/imx51.dtsi43
-rw-r--r--arch/arm/boot/dts/imx53-qsb.dts62
-rw-r--r--arch/arm/boot/dts/imx53.dtsi92
-rw-r--r--arch/arm/boot/dts/imx6q-sabreauto.dts64
-rw-r--r--arch/arm/boot/dts/imx6q-sabresd.dts18
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi114
-rw-r--r--arch/arm/boot/dts/kirkwood-6281.dtsi44
-rw-r--r--arch/arm/boot/dts/kirkwood-6282.dtsi45
-rw-r--r--arch/arm/boot/dts/kirkwood-98dx4122.dtsi31
-rw-r--r--arch/arm/boot/dts/kirkwood-dnskw.dtsi140
-rw-r--r--arch/arm/boot/dts/kirkwood-dockstar.dts37
-rw-r--r--arch/arm/boot/dts/kirkwood-dreamplug.dts21
-rw-r--r--arch/arm/boot/dts/kirkwood-goflexnet.dts73
-rw-r--r--arch/arm/boot/dts/kirkwood-ib62x0.dts40
-rw-r--r--arch/arm/boot/dts/kirkwood-iconnect.dts51
-rw-r--r--arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts89
-rw-r--r--arch/arm/boot/dts/kirkwood-km_kirkwood.dts17
-rw-r--r--arch/arm/boot/dts/kirkwood-lsxl.dtsi95
-rw-r--r--arch/arm/boot/dts/kirkwood-mplcec4.dts59
-rw-r--r--arch/arm/boot/dts/kirkwood-openblocks_a6.dts59
-rw-r--r--arch/arm/boot/dts/kirkwood-ts219-6281.dts31
-rw-r--r--arch/arm/boot/dts/kirkwood-ts219-6282.dts31
-rw-r--r--arch/arm/boot/dts/kirkwood.dtsi17
-rw-r--r--arch/arm/boot/dts/lpc32xx.dtsi7
-rw-r--r--arch/arm/boot/dts/snowball.dts140
-rw-r--r--arch/arm/boot/dts/stuib.dtsi78
-rw-r--r--arch/arm/boot/dts/tegra20-harmony.dts25
-rw-r--r--arch/arm/boot/dts/tegra20-plutux.dts6
-rw-r--r--arch/arm/boot/dts/tegra20-seaboard.dts6
-rw-r--r--arch/arm/boot/dts/tegra20-tamonten.dtsi88
-rw-r--r--arch/arm/boot/dts/tegra20-tec.dts9
-rw-r--r--arch/arm/boot/dts/tegra20-trimslice.dts54
-rw-r--r--arch/arm/boot/dts/tegra20-ventana.dts90
-rw-r--r--arch/arm/boot/dts/tegra20-whistler.dts21
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi137
-rw-r--r--arch/arm/boot/dts/tegra30-cardhu-a02.dts6
-rw-r--r--arch/arm/boot/dts/tegra30-cardhu-a04.dts6
-rw-r--r--arch/arm/boot/dts/tegra30-cardhu.dtsi37
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi147
-rw-r--r--arch/arm/boot/dts/u9540.dts72
-rw-r--r--arch/arm/boot/dts/zynq-7000.dtsi166
-rw-r--r--arch/arm/boot/dts/zynq-ep107.dts63
-rw-r--r--arch/arm/boot/dts/zynq-zc702.dts44
83 files changed, 5824 insertions, 392 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f3f2f80cdf3b..2af359cfe985 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -34,6 +34,8 @@ dtb-$(CONFIG_ARCH_AT91) += at91sam9x35ek.dtb
34 34
35dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb 35dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
36dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb 36dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb
37dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
38 da850-evm.dtb
37dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \ 39dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
38 dove-cubox.dtb \ 40 dove-cubox.dtb \
39 dove-dove-db.dtb 41 dove-dove-db.dtb
@@ -41,7 +43,10 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
41 exynos4210-smdkv310.dtb \ 43 exynos4210-smdkv310.dtb \
42 exynos4210-trats.dtb \ 44 exynos4210-trats.dtb \
43 exynos5250-smdk5250.dtb \ 45 exynos5250-smdk5250.dtb \
44 exynos5440-ssdk5440.dtb 46 exynos5440-ssdk5440.dtb \
47 exynos4412-smdk4412.dtb \
48 exynos5250-smdk5250.dtb \
49 exynos5250-snow.dtb
45dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \ 50dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \
46 ecx-2000.dtb 51 ecx-2000.dtb
47dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \ 52dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \
@@ -79,16 +84,20 @@ dtb-$(CONFIG_ARCH_MXC) += imx51-babbage.dtb \
79 imx53-qsb.dtb \ 84 imx53-qsb.dtb \
80 imx53-smd.dtb \ 85 imx53-smd.dtb \
81 imx6q-arm2.dtb \ 86 imx6q-arm2.dtb \
87 imx6q-sabreauto.dtb \
82 imx6q-sabrelite.dtb \ 88 imx6q-sabrelite.dtb \
83 imx6q-sabresd.dtb 89 imx6q-sabresd.dtb
84dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ 90dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
85 imx23-olinuxino.dtb \ 91 imx23-olinuxino.dtb \
86 imx23-stmp378x_devb.dtb \ 92 imx23-stmp378x_devb.dtb \
93 imx28-apf28.dtb \
94 imx28-apf28dev.dtb \
87 imx28-apx4devkit.dtb \ 95 imx28-apx4devkit.dtb \
88 imx28-cfa10036.dtb \ 96 imx28-cfa10036.dtb \
89 imx28-cfa10049.dtb \ 97 imx28-cfa10049.dtb \
90 imx28-evk.dtb \ 98 imx28-evk.dtb \
91 imx28-m28evk.dtb \ 99 imx28-m28evk.dtb \
100 imx28-sps1.dtb \
92 imx28-tx28.dtb 101 imx28-tx28.dtb
93dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ 102dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
94 omap3-beagle.dtb \ 103 omap3-beagle.dtb \
@@ -105,7 +114,10 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
105 am335x-bone.dtb 114 am335x-bone.dtb
106dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb 115dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
107dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb 116dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
108dtb-$(CONFIG_ARCH_U8500) += snowball.dtb 117dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \
118 hrefprev60.dtb \
119 hrefv60plus.dtb \
120 ccu9540.dtb
109dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \ 121dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
110 r8a7740-armadillo800eva.dtb \ 122 r8a7740-armadillo800eva.dtb \
111 sh73a0-kzm9g.dtb \ 123 sh73a0-kzm9g.dtb \
@@ -137,6 +149,7 @@ dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
137dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \ 149dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \
138 wm8505-ref.dtb \ 150 wm8505-ref.dtb \
139 wm8650-mid.dtb 151 wm8650-mid.dtb
152dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb
140 153
141targets += dtbs 154targets += dtbs
142endif 155endif
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index b1d3fab60e0a..c528b4b429b9 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -479,6 +479,12 @@
479 trigger-external; 479 trigger-external;
480 }; 480 };
481 }; 481 };
482
483 watchdog@fffffd40 {
484 compatible = "atmel,at91sam9260-wdt";
485 reg = <0xfffffd40 0x10>;
486 status = "disabled";
487 };
482 }; 488 };
483 489
484 nand0: nand@40000000 { 490 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 66106eecf1ed..00485e1dff93 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -404,6 +404,12 @@
404 #size-cells = <0>; 404 #size-cells = <0>;
405 status = "disabled"; 405 status = "disabled";
406 }; 406 };
407
408 watchdog@fffffd40 {
409 compatible = "atmel,at91sam9260-wdt";
410 reg = <0xfffffd40 0x10>;
411 status = "disabled";
412 };
407 }; 413 };
408 414
409 nand0: nand@40000000 { 415 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 0741caeeced1..485fc395efc6 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -473,6 +473,12 @@
473 #size-cells = <0>; 473 #size-cells = <0>;
474 status = "disabled"; 474 status = "disabled";
475 }; 475 };
476
477 watchdog@fffffd40 {
478 compatible = "atmel,at91sam9260-wdt";
479 reg = <0xfffffd40 0x10>;
480 status = "disabled";
481 };
476 }; 482 };
477 483
478 nand0: nand@40000000 { 484 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/ccu9540.dts b/arch/arm/boot/dts/ccu9540.dts
new file mode 100644
index 000000000000..04305463f00d
--- /dev/null
+++ b/arch/arm/boot/dts/ccu9540.dts
@@ -0,0 +1,72 @@
1/*
2 * Copyright 2012 ST-Ericsson AB
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13/include/ "dbx5x0.dtsi"
14
15/ {
16 model = "ST-Ericsson CCU9540 platform with Device Tree";
17 compatible = "st-ericsson,ccu9540", "st-ericsson,u9540";
18
19 memory {
20 reg = <0x00000000 0x20000000>;
21 };
22
23 soc-u9500 {
24 uart@80120000 {
25 status = "okay";
26 };
27
28 uart@80121000 {
29 status = "okay";
30 };
31
32 uart@80007000 {
33 status = "okay";
34 };
35
36 // External Micro SD slot
37 sdi0_per1@80126000 {
38 arm,primecell-periphid = <0x10480180>;
39 max-frequency = <100000000>;
40 bus-width = <4>;
41 mmc-cap-sd-highspeed;
42 mmc-cap-mmc-highspeed;
43 vmmc-supply = <&ab8500_ldo_aux3_reg>;
44
45 cd-gpios = <&gpio7 6 0x4>; // 230
46 cd-inverted;
47
48 status = "okay";
49 };
50
51
52 // WLAN SDIO channel
53 sdi1_per2@80118000 {
54 arm,primecell-periphid = <0x10480180>;
55 max-frequency = <50000000>;
56 bus-width = <4>;
57
58 status = "okay";
59 };
60
61 // On-board eMMC
62 sdi4_per2@80114000 {
63 arm,primecell-periphid = <0x10480180>;
64 max-frequency = <100000000>;
65 bus-width = <8>;
66 mmc-cap-mmc-highspeed;
67 vmmc-supply = <&ab8500_ldo_aux2_reg>;
68
69 status = "okay";
70 };
71 };
72};
diff --git a/arch/arm/boot/dts/cros5250-common.dtsi b/arch/arm/boot/dts/cros5250-common.dtsi
new file mode 100644
index 000000000000..fddd17417433
--- /dev/null
+++ b/arch/arm/boot/dts/cros5250-common.dtsi
@@ -0,0 +1,184 @@
1/*
2 * Common device tree include for all Exynos 5250 boards based off of Daisy.
3 *
4 * Copyright (c) 2012 Google, Inc
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11/ {
12 aliases {
13 };
14
15 memory {
16 reg = <0x40000000 0x80000000>;
17 };
18
19 chosen {
20 };
21
22 i2c@12C60000 {
23 samsung,i2c-sda-delay = <100>;
24 samsung,i2c-max-bus-freq = <378000>;
25 gpios = <&gpb3 0 2 3 0>,
26 <&gpb3 1 2 3 0>;
27 };
28
29 i2c@12C70000 {
30 samsung,i2c-sda-delay = <100>;
31 samsung,i2c-max-bus-freq = <378000>;
32 gpios = <&gpb3 2 2 3 0>,
33 <&gpb3 3 2 3 0>;
34 };
35
36 i2c@12C80000 {
37 samsung,i2c-sda-delay = <100>;
38 samsung,i2c-max-bus-freq = <66000>;
39
40 /*
41 * Disabled pullups since external part has its own pullups and
42 * double-pulling gets us out of spec in some cases.
43 */
44 gpios = <&gpa0 6 3 0 0>,
45 <&gpa0 7 3 0 0>;
46
47 hdmiddc@50 {
48 compatible = "samsung,exynos5-hdmiddc";
49 reg = <0x50>;
50 };
51 };
52
53 i2c@12C90000 {
54 samsung,i2c-sda-delay = <100>;
55 samsung,i2c-max-bus-freq = <66000>;
56 gpios = <&gpa1 2 3 3 0>,
57 <&gpa1 3 3 3 0>;
58 };
59
60 i2c@12CA0000 {
61 status = "disabled";
62 };
63
64 i2c@12CB0000 {
65 samsung,i2c-sda-delay = <100>;
66 samsung,i2c-max-bus-freq = <66000>;
67 gpios = <&gpa2 2 3 3 0>,
68 <&gpa2 3 3 3 0>;
69 };
70
71 i2c@12CC0000 {
72 status = "disabled";
73 };
74
75 i2c@12CD0000 {
76 samsung,i2c-sda-delay = <100>;
77 samsung,i2c-max-bus-freq = <66000>;
78 gpios = <&gpb2 2 3 3 0>,
79 <&gpb2 3 3 3 0>;
80 };
81
82 i2c@12CE0000 {
83 samsung,i2c-sda-delay = <100>;
84 samsung,i2c-max-bus-freq = <378000>;
85
86 hdmiphy@38 {
87 compatible = "samsung,exynos5-hdmiphy";
88 reg = <0x38>;
89 };
90 };
91
92 dwmmc0@12200000 {
93 num-slots = <1>;
94 supports-highspeed;
95 broken-cd;
96 fifo-depth = <0x80>;
97 card-detect-delay = <200>;
98 samsung,dw-mshc-ciu-div = <3>;
99 samsung,dw-mshc-sdr-timing = <2 3 3>;
100 samsung,dw-mshc-ddr-timing = <1 2 3>;
101
102 slot@0 {
103 reg = <0>;
104 bus-width = <8>;
105 gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
106 <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
107 <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
108 <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
109 <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
110 };
111 };
112
113 dwmmc1@12210000 {
114 status = "disabled";
115 };
116
117 dwmmc2@12220000 {
118 num-slots = <1>;
119 supports-highspeed;
120 fifo-depth = <0x80>;
121 card-detect-delay = <200>;
122 samsung,dw-mshc-ciu-div = <3>;
123 samsung,dw-mshc-sdr-timing = <2 3 3>;
124 samsung,dw-mshc-ddr-timing = <1 2 3>;
125
126 slot@0 {
127 reg = <0>;
128 bus-width = <4>;
129 samsung,cd-pinmux-gpio = <&gpc3 2 2 3 3>;
130 wp-gpios = <&gpc2 1 0 0 3>;
131 gpios = <&gpc3 0 2 0 3>, <&gpc3 1 2 0 3>,
132 <&gpc3 3 2 3 3>, <&gpc3 4 2 3 3>,
133 <&gpc3 5 2 3 3>, <&gpc3 6 2 3 3>;
134 };
135 };
136
137 dwmmc3@12230000 {
138 num-slots = <1>;
139 supports-highspeed;
140 broken-cd;
141 fifo-depth = <0x80>;
142 card-detect-delay = <200>;
143 samsung,dw-mshc-ciu-div = <3>;
144 samsung,dw-mshc-sdr-timing = <2 3 3>;
145 samsung,dw-mshc-ddr-timing = <1 2 3>;
146
147 slot@0 {
148 reg = <0>;
149 bus-width = <4>;
150 /* See board-specific dts files for GPIOs */
151 };
152 };
153
154 spi_0: spi@12d20000 {
155 status = "disabled";
156 };
157
158 spi_1: spi@12d30000 {
159 gpios = <&gpa2 4 2 3 0>,
160 <&gpa2 6 2 3 0>,
161 <&gpa2 7 2 3 0>;
162 samsung,spi-src-clk = <0>;
163 num-cs = <1>;
164 };
165
166 spi_2: spi@12d40000 {
167 status = "disabled";
168 };
169
170 hdmi {
171 hpd-gpio = <&gpx3 7 0xf 1 3>;
172 };
173
174 gpio-keys {
175 compatible = "gpio-keys";
176
177 power {
178 label = "Power";
179 gpios = <&gpx1 3 0 0x10000 0>;
180 linux,code = <116>; /* KEY_POWER */
181 gpio-key,wakeup;
182 };
183 };
184};
diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi
index 731086b2fca2..0d69322f689f 100644
--- a/arch/arm/boot/dts/dbx5x0.dtsi
+++ b/arch/arm/boot/dts/dbx5x0.dtsi
@@ -217,123 +217,103 @@
217 // DB8500_REGULATOR_VAPE 217 // DB8500_REGULATOR_VAPE
218 db8500_vape_reg: db8500_vape { 218 db8500_vape_reg: db8500_vape {
219 regulator-compatible = "db8500_vape"; 219 regulator-compatible = "db8500_vape";
220 regulator-name = "db8500-vape";
221 regulator-always-on; 220 regulator-always-on;
222 }; 221 };
223 222
224 // DB8500_REGULATOR_VARM 223 // DB8500_REGULATOR_VARM
225 db8500_varm_reg: db8500_varm { 224 db8500_varm_reg: db8500_varm {
226 regulator-compatible = "db8500_varm"; 225 regulator-compatible = "db8500_varm";
227 regulator-name = "db8500-varm";
228 }; 226 };
229 227
230 // DB8500_REGULATOR_VMODEM 228 // DB8500_REGULATOR_VMODEM
231 db8500_vmodem_reg: db8500_vmodem { 229 db8500_vmodem_reg: db8500_vmodem {
232 regulator-compatible = "db8500_vmodem"; 230 regulator-compatible = "db8500_vmodem";
233 regulator-name = "db8500-vmodem";
234 }; 231 };
235 232
236 // DB8500_REGULATOR_VPLL 233 // DB8500_REGULATOR_VPLL
237 db8500_vpll_reg: db8500_vpll { 234 db8500_vpll_reg: db8500_vpll {
238 regulator-compatible = "db8500_vpll"; 235 regulator-compatible = "db8500_vpll";
239 regulator-name = "db8500-vpll";
240 }; 236 };
241 237
242 // DB8500_REGULATOR_VSMPS1 238 // DB8500_REGULATOR_VSMPS1
243 db8500_vsmps1_reg: db8500_vsmps1 { 239 db8500_vsmps1_reg: db8500_vsmps1 {
244 regulator-compatible = "db8500_vsmps1"; 240 regulator-compatible = "db8500_vsmps1";
245 regulator-name = "db8500-vsmps1";
246 }; 241 };
247 242
248 // DB8500_REGULATOR_VSMPS2 243 // DB8500_REGULATOR_VSMPS2
249 db8500_vsmps2_reg: db8500_vsmps2 { 244 db8500_vsmps2_reg: db8500_vsmps2 {
250 regulator-compatible = "db8500_vsmps2"; 245 regulator-compatible = "db8500_vsmps2";
251 regulator-name = "db8500-vsmps2";
252 }; 246 };
253 247
254 // DB8500_REGULATOR_VSMPS3 248 // DB8500_REGULATOR_VSMPS3
255 db8500_vsmps3_reg: db8500_vsmps3 { 249 db8500_vsmps3_reg: db8500_vsmps3 {
256 regulator-compatible = "db8500_vsmps3"; 250 regulator-compatible = "db8500_vsmps3";
257 regulator-name = "db8500-vsmps3";
258 }; 251 };
259 252
260 // DB8500_REGULATOR_VRF1 253 // DB8500_REGULATOR_VRF1
261 db8500_vrf1_reg: db8500_vrf1 { 254 db8500_vrf1_reg: db8500_vrf1 {
262 regulator-compatible = "db8500_vrf1"; 255 regulator-compatible = "db8500_vrf1";
263 regulator-name = "db8500-vrf1";
264 }; 256 };
265 257
266 // DB8500_REGULATOR_SWITCH_SVAMMDSP 258 // DB8500_REGULATOR_SWITCH_SVAMMDSP
267 db8500_sva_mmdsp_reg: db8500_sva_mmdsp { 259 db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
268 regulator-compatible = "db8500_sva_mmdsp"; 260 regulator-compatible = "db8500_sva_mmdsp";
269 regulator-name = "db8500-sva-mmdsp";
270 }; 261 };
271 262
272 // DB8500_REGULATOR_SWITCH_SVAMMDSPRET 263 // DB8500_REGULATOR_SWITCH_SVAMMDSPRET
273 db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret { 264 db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
274 regulator-compatible = "db8500_sva_mmdsp_ret"; 265 regulator-compatible = "db8500_sva_mmdsp_ret";
275 regulator-name = "db8500-sva-mmdsp-ret";
276 }; 266 };
277 267
278 // DB8500_REGULATOR_SWITCH_SVAPIPE 268 // DB8500_REGULATOR_SWITCH_SVAPIPE
279 db8500_sva_pipe_reg: db8500_sva_pipe { 269 db8500_sva_pipe_reg: db8500_sva_pipe {
280 regulator-compatible = "db8500_sva_pipe"; 270 regulator-compatible = "db8500_sva_pipe";
281 regulator-name = "db8500_sva_pipe";
282 }; 271 };
283 272
284 // DB8500_REGULATOR_SWITCH_SIAMMDSP 273 // DB8500_REGULATOR_SWITCH_SIAMMDSP
285 db8500_sia_mmdsp_reg: db8500_sia_mmdsp { 274 db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
286 regulator-compatible = "db8500_sia_mmdsp"; 275 regulator-compatible = "db8500_sia_mmdsp";
287 regulator-name = "db8500_sia_mmdsp";
288 }; 276 };
289 277
290 // DB8500_REGULATOR_SWITCH_SIAMMDSPRET 278 // DB8500_REGULATOR_SWITCH_SIAMMDSPRET
291 db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret { 279 db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
292 regulator-name = "db8500-sia-mmdsp-ret";
293 }; 280 };
294 281
295 // DB8500_REGULATOR_SWITCH_SIAPIPE 282 // DB8500_REGULATOR_SWITCH_SIAPIPE
296 db8500_sia_pipe_reg: db8500_sia_pipe { 283 db8500_sia_pipe_reg: db8500_sia_pipe {
297 regulator-compatible = "db8500_sia_pipe"; 284 regulator-compatible = "db8500_sia_pipe";
298 regulator-name = "db8500-sia-pipe";
299 }; 285 };
300 286
301 // DB8500_REGULATOR_SWITCH_SGA 287 // DB8500_REGULATOR_SWITCH_SGA
302 db8500_sga_reg: db8500_sga { 288 db8500_sga_reg: db8500_sga {
303 regulator-compatible = "db8500_sga"; 289 regulator-compatible = "db8500_sga";
304 regulator-name = "db8500-sga";
305 vin-supply = <&db8500_vape_reg>; 290 vin-supply = <&db8500_vape_reg>;
306 }; 291 };
307 292
308 // DB8500_REGULATOR_SWITCH_B2R2_MCDE 293 // DB8500_REGULATOR_SWITCH_B2R2_MCDE
309 db8500_b2r2_mcde_reg: db8500_b2r2_mcde { 294 db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
310 regulator-compatible = "db8500_b2r2_mcde"; 295 regulator-compatible = "db8500_b2r2_mcde";
311 regulator-name = "db8500-b2r2-mcde";
312 vin-supply = <&db8500_vape_reg>; 296 vin-supply = <&db8500_vape_reg>;
313 }; 297 };
314 298
315 // DB8500_REGULATOR_SWITCH_ESRAM12 299 // DB8500_REGULATOR_SWITCH_ESRAM12
316 db8500_esram12_reg: db8500_esram12 { 300 db8500_esram12_reg: db8500_esram12 {
317 regulator-compatible = "db8500_esram12"; 301 regulator-compatible = "db8500_esram12";
318 regulator-name = "db8500-esram12";
319 }; 302 };
320 303
321 // DB8500_REGULATOR_SWITCH_ESRAM12RET 304 // DB8500_REGULATOR_SWITCH_ESRAM12RET
322 db8500_esram12_ret_reg: db8500_esram12_ret { 305 db8500_esram12_ret_reg: db8500_esram12_ret {
323 regulator-compatible = "db8500_esram12_ret"; 306 regulator-compatible = "db8500_esram12_ret";
324 regulator-name = "db8500-esram12-ret";
325 }; 307 };
326 308
327 // DB8500_REGULATOR_SWITCH_ESRAM34 309 // DB8500_REGULATOR_SWITCH_ESRAM34
328 db8500_esram34_reg: db8500_esram34 { 310 db8500_esram34_reg: db8500_esram34 {
329 regulator-compatible = "db8500_esram34"; 311 regulator-compatible = "db8500_esram34";
330 regulator-name = "db8500-esram34";
331 }; 312 };
332 313
333 // DB8500_REGULATOR_SWITCH_ESRAM34RET 314 // DB8500_REGULATOR_SWITCH_ESRAM34RET
334 db8500_esram34_ret_reg: db8500_esram34_ret { 315 db8500_esram34_ret_reg: db8500_esram34_ret {
335 regulator-compatible = "db8500_esram34_ret"; 316 regulator-compatible = "db8500_esram34_ret";
336 regulator-name = "db8500-esram34-ret";
337 }; 317 };
338 }; 318 };
339 319
@@ -412,7 +392,6 @@
412 // supplies to the display/camera 392 // supplies to the display/camera
413 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { 393 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
414 regulator-compatible = "ab8500_ldo_aux1"; 394 regulator-compatible = "ab8500_ldo_aux1";
415 regulator-name = "V-DISPLAY";
416 regulator-min-microvolt = <2500000>; 395 regulator-min-microvolt = <2500000>;
417 regulator-max-microvolt = <2900000>; 396 regulator-max-microvolt = <2900000>;
418 regulator-boot-on; 397 regulator-boot-on;
@@ -423,7 +402,6 @@
423 // supplies to the on-board eMMC 402 // supplies to the on-board eMMC
424 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { 403 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
425 regulator-compatible = "ab8500_ldo_aux2"; 404 regulator-compatible = "ab8500_ldo_aux2";
426 regulator-name = "V-eMMC1";
427 regulator-min-microvolt = <1100000>; 405 regulator-min-microvolt = <1100000>;
428 regulator-max-microvolt = <3300000>; 406 regulator-max-microvolt = <3300000>;
429 }; 407 };
@@ -431,7 +409,6 @@
431 // supply for VAUX3; SDcard slots 409 // supply for VAUX3; SDcard slots
432 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { 410 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
433 regulator-compatible = "ab8500_ldo_aux3"; 411 regulator-compatible = "ab8500_ldo_aux3";
434 regulator-name = "V-MMC-SD";
435 regulator-min-microvolt = <1100000>; 412 regulator-min-microvolt = <1100000>;
436 regulator-max-microvolt = <3300000>; 413 regulator-max-microvolt = <3300000>;
437 }; 414 };
@@ -439,49 +416,41 @@
439 // supply for v-intcore12; VINTCORE12 LDO 416 // supply for v-intcore12; VINTCORE12 LDO
440 ab8500_ldo_initcore_reg: ab8500_ldo_initcore { 417 ab8500_ldo_initcore_reg: ab8500_ldo_initcore {
441 regulator-compatible = "ab8500_ldo_initcore"; 418 regulator-compatible = "ab8500_ldo_initcore";
442 regulator-name = "V-INTCORE";
443 }; 419 };
444 420
445 // supply for tvout; gpadc; TVOUT LDO 421 // supply for tvout; gpadc; TVOUT LDO
446 ab8500_ldo_tvout_reg: ab8500_ldo_tvout { 422 ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
447 regulator-compatible = "ab8500_ldo_tvout"; 423 regulator-compatible = "ab8500_ldo_tvout";
448 regulator-name = "V-TVOUT";
449 }; 424 };
450 425
451 // supply for ab8500-usb; USB LDO 426 // supply for ab8500-usb; USB LDO
452 ab8500_ldo_usb_reg: ab8500_ldo_usb { 427 ab8500_ldo_usb_reg: ab8500_ldo_usb {
453 regulator-compatible = "ab8500_ldo_usb"; 428 regulator-compatible = "ab8500_ldo_usb";
454 regulator-name = "dummy";
455 }; 429 };
456 430
457 // supply for ab8500-vaudio; VAUDIO LDO 431 // supply for ab8500-vaudio; VAUDIO LDO
458 ab8500_ldo_audio_reg: ab8500_ldo_audio { 432 ab8500_ldo_audio_reg: ab8500_ldo_audio {
459 regulator-compatible = "ab8500_ldo_audio"; 433 regulator-compatible = "ab8500_ldo_audio";
460 regulator-name = "V-AUD";
461 }; 434 };
462 435
463 // supply for v-anamic1 VAMic1-LDO 436 // supply for v-anamic1 VAMic1-LDO
464 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { 437 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
465 regulator-compatible = "ab8500_ldo_anamic1"; 438 regulator-compatible = "ab8500_ldo_anamic1";
466 regulator-name = "V-AMIC1";
467 }; 439 };
468 440
469 // supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1 441 // supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1
470 ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 { 442 ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 {
471 regulator-compatible = "ab8500_ldo_amamic2"; 443 regulator-compatible = "ab8500_ldo_amamic2";
472 regulator-name = "V-AMIC2";
473 }; 444 };
474 445
475 // supply for v-dmic; VDMIC LDO 446 // supply for v-dmic; VDMIC LDO
476 ab8500_ldo_dmic_reg: ab8500_ldo_dmic { 447 ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
477 regulator-compatible = "ab8500_ldo_dmic"; 448 regulator-compatible = "ab8500_ldo_dmic";
478 regulator-name = "V-DMIC";
479 }; 449 };
480 450
481 // supply for U8500 CSI/DSI; VANA LDO 451 // supply for U8500 CSI/DSI; VANA LDO
482 ab8500_ldo_ana_reg: ab8500_ldo_ana { 452 ab8500_ldo_ana_reg: ab8500_ldo_ana {
483 regulator-compatible = "ab8500_ldo_ana"; 453 regulator-compatible = "ab8500_ldo_ana";
484 regulator-name = "V-CSI/DSI";
485 }; 454 };
486 }; 455 };
487 }; 456 };
@@ -585,42 +554,42 @@
585 status = "disabled"; 554 status = "disabled";
586 }; 555 };
587 556
588 sdi@80126000 { 557 sdi0_per1@80126000 {
589 compatible = "arm,pl18x", "arm,primecell"; 558 compatible = "arm,pl18x", "arm,primecell";
590 reg = <0x80126000 0x1000>; 559 reg = <0x80126000 0x1000>;
591 interrupts = <0 60 0x4>; 560 interrupts = <0 60 0x4>;
592 status = "disabled"; 561 status = "disabled";
593 }; 562 };
594 563
595 sdi@80118000 { 564 sdi1_per2@80118000 {
596 compatible = "arm,pl18x", "arm,primecell"; 565 compatible = "arm,pl18x", "arm,primecell";
597 reg = <0x80118000 0x1000>; 566 reg = <0x80118000 0x1000>;
598 interrupts = <0 50 0x4>; 567 interrupts = <0 50 0x4>;
599 status = "disabled"; 568 status = "disabled";
600 }; 569 };
601 570
602 sdi@80005000 { 571 sdi2_per3@80005000 {
603 compatible = "arm,pl18x", "arm,primecell"; 572 compatible = "arm,pl18x", "arm,primecell";
604 reg = <0x80005000 0x1000>; 573 reg = <0x80005000 0x1000>;
605 interrupts = <0 41 0x4>; 574 interrupts = <0 41 0x4>;
606 status = "disabled"; 575 status = "disabled";
607 }; 576 };
608 577
609 sdi@80119000 { 578 sdi3_per2@80119000 {
610 compatible = "arm,pl18x", "arm,primecell"; 579 compatible = "arm,pl18x", "arm,primecell";
611 reg = <0x80119000 0x1000>; 580 reg = <0x80119000 0x1000>;
612 interrupts = <0 59 0x4>; 581 interrupts = <0 59 0x4>;
613 status = "disabled"; 582 status = "disabled";
614 }; 583 };
615 584
616 sdi@80114000 { 585 sdi4_per2@80114000 {
617 compatible = "arm,pl18x", "arm,primecell"; 586 compatible = "arm,pl18x", "arm,primecell";
618 reg = <0x80114000 0x1000>; 587 reg = <0x80114000 0x1000>;
619 interrupts = <0 99 0x4>; 588 interrupts = <0 99 0x4>;
620 status = "disabled"; 589 status = "disabled";
621 }; 590 };
622 591
623 sdi@80008000 { 592 sdi5_per3@80008000 {
624 compatible = "arm,pl18x", "arm,primecell"; 593 compatible = "arm,pl18x", "arm,primecell";
625 reg = <0x80008000 0x1000>; 594 reg = <0x80008000 0x1000>;
626 interrupts = <0 100 0x4>; 595 interrupts = <0 100 0x4>;
@@ -674,5 +643,18 @@
674 status = "disabled"; 643 status = "disabled";
675 }; 644 };
676 645
646 vmmci: regulator-gpio {
647 compatible = "regulator-gpio";
648
649 regulator-min-microvolt = <1800000>;
650 regulator-max-microvolt = <2600000>;
651 regulator-name = "mmci-reg";
652 regulator-type = "voltage";
653
654 states = <1800000 0x1
655 2900000 0x0>;
656
657 status = "disabled";
658 };
677 }; 659 };
678}; 660};
diff --git a/arch/arm/boot/dts/dove-cubox.dts b/arch/arm/boot/dts/dove-cubox.dts
index 0adbd5a38095..fed7d3f9f431 100644
--- a/arch/arm/boot/dts/dove-cubox.dts
+++ b/arch/arm/boot/dts/dove-cubox.dts
@@ -40,3 +40,13 @@
40 reg = <0>; 40 reg = <0>;
41 }; 41 };
42}; 42};
43
44&pinctrl {
45 pinctrl-0 = <&pmx_gpio_18>;
46 pinctrl-names = "default";
47
48 pmx_gpio_18: pmx-gpio-18 {
49 marvell,pins = "mpp18";
50 marvell,function = "gpio";
51 };
52};
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index 5a00022383e7..61f391412a5a 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -4,6 +4,12 @@
4 compatible = "marvell,dove"; 4 compatible = "marvell,dove";
5 model = "Marvell Armada 88AP510 SoC"; 5 model = "Marvell Armada 88AP510 SoC";
6 6
7 aliases {
8 gpio0 = &gpio0;
9 gpio1 = &gpio1;
10 gpio2 = &gpio2;
11 };
12
7 soc@f1000000 { 13 soc@f1000000 {
8 compatible = "simple-bus"; 14 compatible = "simple-bus";
9 #address-cells = <1>; 15 #address-cells = <1>;
@@ -72,7 +78,8 @@
72 #gpio-cells = <2>; 78 #gpio-cells = <2>;
73 gpio-controller; 79 gpio-controller;
74 reg = <0xd0400 0x20>; 80 reg = <0xd0400 0x20>;
75 ngpio = <32>; 81 ngpios = <32>;
82 interrupt-controller;
76 interrupts = <12>, <13>, <14>, <60>; 83 interrupts = <12>, <13>, <14>, <60>;
77 }; 84 };
78 85
@@ -81,7 +88,8 @@
81 #gpio-cells = <2>; 88 #gpio-cells = <2>;
82 gpio-controller; 89 gpio-controller;
83 reg = <0xd0420 0x20>; 90 reg = <0xd0420 0x20>;
84 ngpio = <32>; 91 ngpios = <32>;
92 interrupt-controller;
85 interrupts = <61>; 93 interrupts = <61>;
86 }; 94 };
87 95
@@ -90,7 +98,12 @@
90 #gpio-cells = <2>; 98 #gpio-cells = <2>;
91 gpio-controller; 99 gpio-controller;
92 reg = <0xe8400 0x0c>; 100 reg = <0xe8400 0x0c>;
93 ngpio = <8>; 101 ngpios = <8>;
102 };
103
104 pinctrl: pinctrl@d0200 {
105 compatible = "marvell,dove-pinctrl";
106 reg = <0xd0200 0x10>;
94 }; 107 };
95 108
96 spi0: spi@10600 { 109 spi0: spi@10600 {
diff --git a/arch/arm/boot/dts/evk-pro3.dts b/arch/arm/boot/dts/evk-pro3.dts
index b7354e6506de..96e50f569433 100644
--- a/arch/arm/boot/dts/evk-pro3.dts
+++ b/arch/arm/boot/dts/evk-pro3.dts
@@ -22,10 +22,22 @@
22 status = "okay"; 22 status = "okay";
23 }; 23 };
24 24
25 usart0: serial@fffb0000 {
26 status = "okay";
27 };
28
29 usart2: serial@fffb8000 {
30 status = "okay";
31 };
32
25 usb1: gadget@fffa4000 { 33 usb1: gadget@fffa4000 {
26 atmel,vbus-gpio = <&pioC 5 0>; 34 atmel,vbus-gpio = <&pioC 5 0>;
27 status = "okay"; 35 status = "okay";
28 }; 36 };
37
38 watchdog@fffffd40 {
39 status = "okay";
40 };
29 }; 41 };
30 42
31 usb0: ohci@00500000 { 43 usb0: ohci@00500000 {
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 96d4462730fb..e1347fceb5bc 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -28,6 +28,44 @@
28 spi0 = &spi_0; 28 spi0 = &spi_0;
29 spi1 = &spi_1; 29 spi1 = &spi_1;
30 spi2 = &spi_2; 30 spi2 = &spi_2;
31 i2c0 = &i2c_0;
32 i2c1 = &i2c_1;
33 i2c2 = &i2c_2;
34 i2c3 = &i2c_3;
35 i2c4 = &i2c_4;
36 i2c5 = &i2c_5;
37 i2c6 = &i2c_6;
38 i2c7 = &i2c_7;
39 };
40
41 pd_mfc: mfc-power-domain@10023C40 {
42 compatible = "samsung,exynos4210-pd";
43 reg = <0x10023C40 0x20>;
44 };
45
46 pd_g3d: g3d-power-domain@10023C60 {
47 compatible = "samsung,exynos4210-pd";
48 reg = <0x10023C60 0x20>;
49 };
50
51 pd_lcd0: lcd0-power-domain@10023C80 {
52 compatible = "samsung,exynos4210-pd";
53 reg = <0x10023C80 0x20>;
54 };
55
56 pd_tv: tv-power-domain@10023C20 {
57 compatible = "samsung,exynos4210-pd";
58 reg = <0x10023C20 0x20>;
59 };
60
61 pd_cam: cam-power-domain@10023C00 {
62 compatible = "samsung,exynos4210-pd";
63 reg = <0x10023C00 0x20>;
64 };
65
66 pd_gps: gps-power-domain@10023CE0 {
67 compatible = "samsung,exynos4210-pd";
68 reg = <0x10023CE0 0x20>;
31 }; 69 };
32 70
33 gic:interrupt-controller@10490000 { 71 gic:interrupt-controller@10490000 {
@@ -121,7 +159,7 @@
121 status = "disabled"; 159 status = "disabled";
122 }; 160 };
123 161
124 i2c@13860000 { 162 i2c_0: i2c@13860000 {
125 #address-cells = <1>; 163 #address-cells = <1>;
126 #size-cells = <0>; 164 #size-cells = <0>;
127 compatible = "samsung,s3c2440-i2c"; 165 compatible = "samsung,s3c2440-i2c";
@@ -130,7 +168,7 @@
130 status = "disabled"; 168 status = "disabled";
131 }; 169 };
132 170
133 i2c@13870000 { 171 i2c_1: i2c@13870000 {
134 #address-cells = <1>; 172 #address-cells = <1>;
135 #size-cells = <0>; 173 #size-cells = <0>;
136 compatible = "samsung,s3c2440-i2c"; 174 compatible = "samsung,s3c2440-i2c";
@@ -139,7 +177,7 @@
139 status = "disabled"; 177 status = "disabled";
140 }; 178 };
141 179
142 i2c@13880000 { 180 i2c_2: i2c@13880000 {
143 #address-cells = <1>; 181 #address-cells = <1>;
144 #size-cells = <0>; 182 #size-cells = <0>;
145 compatible = "samsung,s3c2440-i2c"; 183 compatible = "samsung,s3c2440-i2c";
@@ -148,7 +186,7 @@
148 status = "disabled"; 186 status = "disabled";
149 }; 187 };
150 188
151 i2c@13890000 { 189 i2c_3: i2c@13890000 {
152 #address-cells = <1>; 190 #address-cells = <1>;
153 #size-cells = <0>; 191 #size-cells = <0>;
154 compatible = "samsung,s3c2440-i2c"; 192 compatible = "samsung,s3c2440-i2c";
@@ -157,7 +195,7 @@
157 status = "disabled"; 195 status = "disabled";
158 }; 196 };
159 197
160 i2c@138A0000 { 198 i2c_4: i2c@138A0000 {
161 #address-cells = <1>; 199 #address-cells = <1>;
162 #size-cells = <0>; 200 #size-cells = <0>;
163 compatible = "samsung,s3c2440-i2c"; 201 compatible = "samsung,s3c2440-i2c";
@@ -166,7 +204,7 @@
166 status = "disabled"; 204 status = "disabled";
167 }; 205 };
168 206
169 i2c@138B0000 { 207 i2c_5: i2c@138B0000 {
170 #address-cells = <1>; 208 #address-cells = <1>;
171 #size-cells = <0>; 209 #size-cells = <0>;
172 compatible = "samsung,s3c2440-i2c"; 210 compatible = "samsung,s3c2440-i2c";
@@ -175,7 +213,7 @@
175 status = "disabled"; 213 status = "disabled";
176 }; 214 };
177 215
178 i2c@138C0000 { 216 i2c_6: i2c@138C0000 {
179 #address-cells = <1>; 217 #address-cells = <1>;
180 #size-cells = <0>; 218 #size-cells = <0>;
181 compatible = "samsung,s3c2440-i2c"; 219 compatible = "samsung,s3c2440-i2c";
@@ -184,7 +222,7 @@
184 status = "disabled"; 222 status = "disabled";
185 }; 223 };
186 224
187 i2c@138D0000 { 225 i2c_7: i2c@138D0000 {
188 #address-cells = <1>; 226 #address-cells = <1>;
189 #size-cells = <0>; 227 #size-cells = <0>;
190 compatible = "samsung,s3c2440-i2c"; 228 compatible = "samsung,s3c2440-i2c";
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index 3e68f52e8454..f2710018e84e 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -22,38 +22,54 @@
22 compatible = "insignal,origen", "samsung,exynos4210"; 22 compatible = "insignal,origen", "samsung,exynos4210";
23 23
24 memory { 24 memory {
25 reg = <0x40000000 0x40000000>; 25 reg = <0x40000000 0x10000000
26 0x50000000 0x10000000
27 0x60000000 0x10000000
28 0x70000000 0x10000000>;
26 }; 29 };
27 30
28 chosen { 31 chosen {
29 bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc"; 32 bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc";
30 }; 33 };
31 34
35 mmc_reg: voltage-regulator {
36 compatible = "regulator-fixed";
37 regulator-name = "VMEM_VDD_2.8V";
38 regulator-min-microvolt = <2800000>;
39 regulator-max-microvolt = <2800000>;
40 gpio = <&gpx1 1 0>;
41 enable-active-high;
42 };
43
32 sdhci@12530000 { 44 sdhci@12530000 {
33 samsung,sdhci-bus-width = <4>; 45 bus-width = <4>;
34 linux,mmc_cap_4_bit_data; 46 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>;
35 samsung,sdhci-cd-internal; 47 pinctrl-names = "default";
36 gpio-cd = <&gpk2 2 2 3 3>; 48 vmmc-supply = <&mmc_reg>;
37 gpios = <&gpk2 0 2 0 3>,
38 <&gpk2 1 2 0 3>,
39 <&gpk2 3 2 3 3>,
40 <&gpk2 4 2 3 3>,
41 <&gpk2 5 2 3 3>,
42 <&gpk2 6 2 3 3>;
43 status = "okay"; 49 status = "okay";
44 }; 50 };
45 51
46 sdhci@12510000 { 52 sdhci@12510000 {
47 samsung,sdhci-bus-width = <4>; 53 bus-width = <4>;
48 linux,mmc_cap_4_bit_data; 54 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_cd>;
49 samsung,sdhci-cd-internal; 55 pinctrl-names = "default";
50 gpio-cd = <&gpk0 2 2 3 3>; 56 vmmc-supply = <&mmc_reg>;
51 gpios = <&gpk0 0 2 0 3>, 57 status = "okay";
52 <&gpk0 1 2 0 3>, 58 };
53 <&gpk0 3 2 3 3>, 59
54 <&gpk0 4 2 3 3>, 60 serial@13800000 {
55 <&gpk0 5 2 3 3>, 61 status = "okay";
56 <&gpk0 6 2 3 3>; 62 };
63
64 serial@13810000 {
65 status = "okay";
66 };
67
68 serial@13820000 {
69 status = "okay";
70 };
71
72 serial@13830000 {
57 status = "okay"; 73 status = "okay";
58 }; 74 };
59 75
@@ -64,35 +80,35 @@
64 80
65 up { 81 up {
66 label = "Up"; 82 label = "Up";
67 gpios = <&gpx2 0 0 0x10000 2>; 83 gpios = <&gpx2 0 1>;
68 linux,code = <103>; 84 linux,code = <103>;
69 gpio-key,wakeup; 85 gpio-key,wakeup;
70 }; 86 };
71 87
72 down { 88 down {
73 label = "Down"; 89 label = "Down";
74 gpios = <&gpx2 1 0 0x10000 2>; 90 gpios = <&gpx2 1 1>;
75 linux,code = <108>; 91 linux,code = <108>;
76 gpio-key,wakeup; 92 gpio-key,wakeup;
77 }; 93 };
78 94
79 back { 95 back {
80 label = "Back"; 96 label = "Back";
81 gpios = <&gpx1 7 0 0x10000 2>; 97 gpios = <&gpx1 7 1>;
82 linux,code = <158>; 98 linux,code = <158>;
83 gpio-key,wakeup; 99 gpio-key,wakeup;
84 }; 100 };
85 101
86 home { 102 home {
87 label = "Home"; 103 label = "Home";
88 gpios = <&gpx1 6 0 0x10000 2>; 104 gpios = <&gpx1 6 1>;
89 linux,code = <102>; 105 linux,code = <102>;
90 gpio-key,wakeup; 106 gpio-key,wakeup;
91 }; 107 };
92 108
93 menu { 109 menu {
94 label = "Menu"; 110 label = "Menu";
95 gpios = <&gpx1 5 0 0x10000 2>; 111 gpios = <&gpx1 5 1>;
96 linux,code = <139>; 112 linux,code = <139>;
97 gpio-key,wakeup; 113 gpio-key,wakeup;
98 }; 114 };
@@ -101,7 +117,7 @@
101 leds { 117 leds {
102 compatible = "gpio-leds"; 118 compatible = "gpio-leds";
103 status { 119 status {
104 gpios = <&gpx1 3 0 0x10000 2>; 120 gpios = <&gpx1 3 1>;
105 linux,default-trigger = "heartbeat"; 121 linux,default-trigger = "heartbeat";
106 }; 122 };
107 }; 123 };
diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
index 6a4a1a04221c..55a2efb763d1 100644
--- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
@@ -482,196 +482,196 @@
482 samsung,pins = "gpk0-0"; 482 samsung,pins = "gpk0-0";
483 samsung,pin-function = <2>; 483 samsung,pin-function = <2>;
484 samsung,pin-pud = <0>; 484 samsung,pin-pud = <0>;
485 samsung,pin-drv = <0>; 485 samsung,pin-drv = <3>;
486 }; 486 };
487 487
488 sd0_cmd: sd0-cmd { 488 sd0_cmd: sd0-cmd {
489 samsung,pins = "gpk0-1"; 489 samsung,pins = "gpk0-1";
490 samsung,pin-function = <2>; 490 samsung,pin-function = <2>;
491 samsung,pin-pud = <0>; 491 samsung,pin-pud = <0>;
492 samsung,pin-drv = <0>; 492 samsung,pin-drv = <3>;
493 }; 493 };
494 494
495 sd0_cd: sd0-cd { 495 sd0_cd: sd0-cd {
496 samsung,pins = "gpk0-2"; 496 samsung,pins = "gpk0-2";
497 samsung,pin-function = <2>; 497 samsung,pin-function = <2>;
498 samsung,pin-pud = <3>; 498 samsung,pin-pud = <3>;
499 samsung,pin-drv = <0>; 499 samsung,pin-drv = <3>;
500 }; 500 };
501 501
502 sd0_bus1: sd0-bus-width1 { 502 sd0_bus1: sd0-bus-width1 {
503 samsung,pins = "gpk0-3"; 503 samsung,pins = "gpk0-3";
504 samsung,pin-function = <2>; 504 samsung,pin-function = <2>;
505 samsung,pin-pud = <3>; 505 samsung,pin-pud = <3>;
506 samsung,pin-drv = <0>; 506 samsung,pin-drv = <3>;
507 }; 507 };
508 508
509 sd0_bus4: sd0-bus-width4 { 509 sd0_bus4: sd0-bus-width4 {
510 samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; 510 samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
511 samsung,pin-function = <2>; 511 samsung,pin-function = <2>;
512 samsung,pin-pud = <3>; 512 samsung,pin-pud = <3>;
513 samsung,pin-drv = <0>; 513 samsung,pin-drv = <3>;
514 }; 514 };
515 515
516 sd0_bus8: sd0-bus-width8 { 516 sd0_bus8: sd0-bus-width8 {
517 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; 517 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
518 samsung,pin-function = <3>; 518 samsung,pin-function = <3>;
519 samsung,pin-pud = <3>; 519 samsung,pin-pud = <3>;
520 samsung,pin-drv = <0>; 520 samsung,pin-drv = <3>;
521 }; 521 };
522 522
523 sd4_clk: sd4-clk { 523 sd4_clk: sd4-clk {
524 samsung,pins = "gpk0-0"; 524 samsung,pins = "gpk0-0";
525 samsung,pin-function = <3>; 525 samsung,pin-function = <3>;
526 samsung,pin-pud = <0>; 526 samsung,pin-pud = <0>;
527 samsung,pin-drv = <0>; 527 samsung,pin-drv = <3>;
528 }; 528 };
529 529
530 sd4_cmd: sd4-cmd { 530 sd4_cmd: sd4-cmd {
531 samsung,pins = "gpk0-1"; 531 samsung,pins = "gpk0-1";
532 samsung,pin-function = <3>; 532 samsung,pin-function = <3>;
533 samsung,pin-pud = <0>; 533 samsung,pin-pud = <0>;
534 samsung,pin-drv = <0>; 534 samsung,pin-drv = <3>;
535 }; 535 };
536 536
537 sd4_cd: sd4-cd { 537 sd4_cd: sd4-cd {
538 samsung,pins = "gpk0-2"; 538 samsung,pins = "gpk0-2";
539 samsung,pin-function = <3>; 539 samsung,pin-function = <3>;
540 samsung,pin-pud = <3>; 540 samsung,pin-pud = <3>;
541 samsung,pin-drv = <0>; 541 samsung,pin-drv = <3>;
542 }; 542 };
543 543
544 sd4_bus1: sd4-bus-width1 { 544 sd4_bus1: sd4-bus-width1 {
545 samsung,pins = "gpk0-3"; 545 samsung,pins = "gpk0-3";
546 samsung,pin-function = <3>; 546 samsung,pin-function = <3>;
547 samsung,pin-pud = <3>; 547 samsung,pin-pud = <3>;
548 samsung,pin-drv = <0>; 548 samsung,pin-drv = <3>;
549 }; 549 };
550 550
551 sd4_bus4: sd4-bus-width4 { 551 sd4_bus4: sd4-bus-width4 {
552 samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; 552 samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
553 samsung,pin-function = <3>; 553 samsung,pin-function = <3>;
554 samsung,pin-pud = <3>; 554 samsung,pin-pud = <3>;
555 samsung,pin-drv = <0>; 555 samsung,pin-drv = <3>;
556 }; 556 };
557 557
558 sd4_bus8: sd4-bus-width8 { 558 sd4_bus8: sd4-bus-width8 {
559 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; 559 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
560 samsung,pin-function = <3>; 560 samsung,pin-function = <3>;
561 samsung,pin-pud = <4>; 561 samsung,pin-pud = <4>;
562 samsung,pin-drv = <0>; 562 samsung,pin-drv = <3>;
563 }; 563 };
564 564
565 sd1_clk: sd1-clk { 565 sd1_clk: sd1-clk {
566 samsung,pins = "gpk1-0"; 566 samsung,pins = "gpk1-0";
567 samsung,pin-function = <2>; 567 samsung,pin-function = <2>;
568 samsung,pin-pud = <0>; 568 samsung,pin-pud = <0>;
569 samsung,pin-drv = <0>; 569 samsung,pin-drv = <3>;
570 }; 570 };
571 571
572 sd1_cmd: sd1-cmd { 572 sd1_cmd: sd1-cmd {
573 samsung,pins = "gpk1-1"; 573 samsung,pins = "gpk1-1";
574 samsung,pin-function = <2>; 574 samsung,pin-function = <2>;
575 samsung,pin-pud = <0>; 575 samsung,pin-pud = <0>;
576 samsung,pin-drv = <0>; 576 samsung,pin-drv = <3>;
577 }; 577 };
578 578
579 sd1_cd: sd1-cd { 579 sd1_cd: sd1-cd {
580 samsung,pins = "gpk1-2"; 580 samsung,pins = "gpk1-2";
581 samsung,pin-function = <2>; 581 samsung,pin-function = <2>;
582 samsung,pin-pud = <3>; 582 samsung,pin-pud = <3>;
583 samsung,pin-drv = <0>; 583 samsung,pin-drv = <3>;
584 }; 584 };
585 585
586 sd1_bus1: sd1-bus-width1 { 586 sd1_bus1: sd1-bus-width1 {
587 samsung,pins = "gpk1-3"; 587 samsung,pins = "gpk1-3";
588 samsung,pin-function = <2>; 588 samsung,pin-function = <2>;
589 samsung,pin-pud = <3>; 589 samsung,pin-pud = <3>;
590 samsung,pin-drv = <0>; 590 samsung,pin-drv = <3>;
591 }; 591 };
592 592
593 sd1_bus4: sd1-bus-width4 { 593 sd1_bus4: sd1-bus-width4 {
594 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; 594 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
595 samsung,pin-function = <2>; 595 samsung,pin-function = <2>;
596 samsung,pin-pud = <3>; 596 samsung,pin-pud = <3>;
597 samsung,pin-drv = <0>; 597 samsung,pin-drv = <3>;
598 }; 598 };
599 599
600 sd2_clk: sd2-clk { 600 sd2_clk: sd2-clk {
601 samsung,pins = "gpk2-0"; 601 samsung,pins = "gpk2-0";
602 samsung,pin-function = <2>; 602 samsung,pin-function = <2>;
603 samsung,pin-pud = <0>; 603 samsung,pin-pud = <0>;
604 samsung,pin-drv = <0>; 604 samsung,pin-drv = <3>;
605 }; 605 };
606 606
607 sd2_cmd: sd2-cmd { 607 sd2_cmd: sd2-cmd {
608 samsung,pins = "gpk2-1"; 608 samsung,pins = "gpk2-1";
609 samsung,pin-function = <2>; 609 samsung,pin-function = <2>;
610 samsung,pin-pud = <0>; 610 samsung,pin-pud = <0>;
611 samsung,pin-drv = <0>; 611 samsung,pin-drv = <3>;
612 }; 612 };
613 613
614 sd2_cd: sd2-cd { 614 sd2_cd: sd2-cd {
615 samsung,pins = "gpk2-2"; 615 samsung,pins = "gpk2-2";
616 samsung,pin-function = <2>; 616 samsung,pin-function = <2>;
617 samsung,pin-pud = <3>; 617 samsung,pin-pud = <3>;
618 samsung,pin-drv = <0>; 618 samsung,pin-drv = <3>;
619 }; 619 };
620 620
621 sd2_bus1: sd2-bus-width1 { 621 sd2_bus1: sd2-bus-width1 {
622 samsung,pins = "gpk2-3"; 622 samsung,pins = "gpk2-3";
623 samsung,pin-function = <2>; 623 samsung,pin-function = <2>;
624 samsung,pin-pud = <3>; 624 samsung,pin-pud = <3>;
625 samsung,pin-drv = <0>; 625 samsung,pin-drv = <3>;
626 }; 626 };
627 627
628 sd2_bus4: sd2-bus-width4 { 628 sd2_bus4: sd2-bus-width4 {
629 samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6"; 629 samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6";
630 samsung,pin-function = <2>; 630 samsung,pin-function = <2>;
631 samsung,pin-pud = <3>; 631 samsung,pin-pud = <3>;
632 samsung,pin-drv = <0>; 632 samsung,pin-drv = <3>;
633 }; 633 };
634 634
635 sd2_bus8: sd2-bus-width8 { 635 sd2_bus8: sd2-bus-width8 {
636 samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; 636 samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
637 samsung,pin-function = <3>; 637 samsung,pin-function = <3>;
638 samsung,pin-pud = <3>; 638 samsung,pin-pud = <3>;
639 samsung,pin-drv = <0>; 639 samsung,pin-drv = <3>;
640 }; 640 };
641 641
642 sd3_clk: sd3-clk { 642 sd3_clk: sd3-clk {
643 samsung,pins = "gpk3-0"; 643 samsung,pins = "gpk3-0";
644 samsung,pin-function = <2>; 644 samsung,pin-function = <2>;
645 samsung,pin-pud = <0>; 645 samsung,pin-pud = <0>;
646 samsung,pin-drv = <0>; 646 samsung,pin-drv = <3>;
647 }; 647 };
648 648
649 sd3_cmd: sd3-cmd { 649 sd3_cmd: sd3-cmd {
650 samsung,pins = "gpk3-1"; 650 samsung,pins = "gpk3-1";
651 samsung,pin-function = <2>; 651 samsung,pin-function = <2>;
652 samsung,pin-pud = <0>; 652 samsung,pin-pud = <0>;
653 samsung,pin-drv = <0>; 653 samsung,pin-drv = <3>;
654 }; 654 };
655 655
656 sd3_cd: sd3-cd { 656 sd3_cd: sd3-cd {
657 samsung,pins = "gpk3-2"; 657 samsung,pins = "gpk3-2";
658 samsung,pin-function = <2>; 658 samsung,pin-function = <2>;
659 samsung,pin-pud = <3>; 659 samsung,pin-pud = <3>;
660 samsung,pin-drv = <0>; 660 samsung,pin-drv = <3>;
661 }; 661 };
662 662
663 sd3_bus1: sd3-bus-width1 { 663 sd3_bus1: sd3-bus-width1 {
664 samsung,pins = "gpk3-3"; 664 samsung,pins = "gpk3-3";
665 samsung,pin-function = <2>; 665 samsung,pin-function = <2>;
666 samsung,pin-pud = <3>; 666 samsung,pin-pud = <3>;
667 samsung,pin-drv = <0>; 667 samsung,pin-drv = <3>;
668 }; 668 };
669 669
670 sd3_bus4: sd3-bus-width4 { 670 sd3_bus4: sd3-bus-width4 {
671 samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; 671 samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
672 samsung,pin-function = <2>; 672 samsung,pin-function = <2>;
673 samsung,pin-pud = <3>; 673 samsung,pin-pud = <3>;
674 samsung,pin-drv = <0>; 674 samsung,pin-drv = <3>;
675 }; 675 };
676 676
677 eint0: ext-int0 { 677 eint0: ext-int0 {
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index 63610c3ba3af..9b23a8255e39 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -43,6 +43,22 @@
43 status = "okay"; 43 status = "okay";
44 }; 44 };
45 45
46 serial@13800000 {
47 status = "okay";
48 };
49
50 serial@13810000 {
51 status = "okay";
52 };
53
54 serial@13820000 {
55 status = "okay";
56 };
57
58 serial@13830000 {
59 status = "okay";
60 };
61
46 keypad@100A0000 { 62 keypad@100A0000 {
47 samsung,keypad-num-rows = <2>; 63 samsung,keypad-num-rows = <2>;
48 samsung,keypad-num-columns = <8>; 64 samsung,keypad-num-columns = <8>;
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index a21511c14071..c346b64dff55 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -35,24 +35,15 @@
35 regulator-name = "VMEM_VDD_2.8V"; 35 regulator-name = "VMEM_VDD_2.8V";
36 regulator-min-microvolt = <2800000>; 36 regulator-min-microvolt = <2800000>;
37 regulator-max-microvolt = <2800000>; 37 regulator-max-microvolt = <2800000>;
38 gpio = <&gpk0 2 1 0 0>; 38 gpio = <&gpk0 2 0>;
39 enable-active-high; 39 enable-active-high;
40 }; 40 };
41 41
42 sdhci_emmc: sdhci@12510000 { 42 sdhci_emmc: sdhci@12510000 {
43 bus-width = <8>; 43 bus-width = <8>;
44 non-removable; 44 non-removable;
45 broken-voltage; 45 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>;
46 gpios = <&gpk0 0 2 0 3>, 46 pinctrl-names = "default";
47 <&gpk0 1 2 0 3>,
48 <&gpk0 3 2 2 3>,
49 <&gpk0 4 2 2 3>,
50 <&gpk0 5 2 2 3>,
51 <&gpk0 6 2 2 3>,
52 <&gpk1 3 3 3 3>,
53 <&gpk1 4 3 3 3>,
54 <&gpk1 5 3 3 3>,
55 <&gpk1 6 3 3 3>;
56 vmmc-supply = <&vemmc_reg>; 47 vmmc-supply = <&vemmc_reg>;
57 status = "okay"; 48 status = "okay";
58 }; 49 };
@@ -73,12 +64,74 @@
73 status = "okay"; 64 status = "okay";
74 }; 65 };
75 66
67 gpio-keys {
68 compatible = "gpio-keys";
69
70 vol-down-key {
71 gpios = <&gpx2 1 1>;
72 linux,code = <114>;
73 label = "volume down";
74 debounce-interval = <10>;
75 };
76
77 vol-up-key {
78 gpios = <&gpx2 0 1>;
79 linux,code = <115>;
80 label = "volume up";
81 debounce-interval = <10>;
82 };
83
84 power-key {
85 gpios = <&gpx2 7 1>;
86 linux,code = <116>;
87 label = "power";
88 debounce-interval = <10>;
89 gpio-key,wakeup;
90 };
91
92 ok-key {
93 gpios = <&gpx3 5 1>;
94 linux,code = <352>;
95 label = "ok";
96 debounce-interval = <10>;
97 };
98 };
99
100 tsp_reg: voltage-regulator {
101 compatible = "regulator-fixed";
102 regulator-name = "TSP_FIXED_VOLTAGES";
103 regulator-min-microvolt = <2800000>;
104 regulator-max-microvolt = <2800000>;
105 gpio = <&gpl0 3 0>;
106 enable-active-high;
107 };
108
109 i2c@13890000 {
110 samsung,i2c-sda-delay = <100>;
111 samsung,i2c-slave-addr = <0x10>;
112 samsung,i2c-max-bus-freq = <400000>;
113 pinctrl-0 = <&i2c3_bus>;
114 pinctrl-names = "default";
115 status = "okay";
116
117 mms114-touchscreen@48 {
118 compatible = "melfas,mms114";
119 reg = <0x48>;
120 interrupt-parent = <&gpx0>;
121 interrupts = <4 2>;
122 x-size = <720>;
123 y-size = <1280>;
124 avdd-supply = <&tsp_reg>;
125 vdd-supply = <&tsp_reg>;
126 };
127 };
128
76 i2c@138B0000 { 129 i2c@138B0000 {
77 samsung,i2c-sda-delay = <100>; 130 samsung,i2c-sda-delay = <100>;
78 samsung,i2c-slave-addr = <0x10>; 131 samsung,i2c-slave-addr = <0x10>;
79 samsung,i2c-max-bus-freq = <100000>; 132 samsung,i2c-max-bus-freq = <100000>;
80 gpios = <&gpb 6 3 3 0>, 133 pinctrl-0 = <&i2c5_bus>;
81 <&gpb 7 3 3 0>; 134 pinctrl-names = "default";
82 status = "okay"; 135 status = "okay";
83 136
84 max8997_pmic@66 { 137 max8997_pmic@66 {
@@ -93,9 +146,9 @@
93 max8997,pmic-ignore-gpiodvs-side-effect; 146 max8997,pmic-ignore-gpiodvs-side-effect;
94 max8997,pmic-buck125-default-dvs-idx = <0>; 147 max8997,pmic-buck125-default-dvs-idx = <0>;
95 148
96 max8997,pmic-buck125-dvs-gpios = <&gpx0 5 1 0 0>, 149 max8997,pmic-buck125-dvs-gpios = <&gpx0 5 0>,
97 <&gpx0 6 1 0 0>, 150 <&gpx0 6 0>,
98 <&gpl0 0 1 0 0>; 151 <&gpl0 0 0>;
99 152
100 max8997,pmic-buck1-dvs-voltage = <1350000>, <1300000>, 153 max8997,pmic-buck1-dvs-voltage = <1350000>, <1300000>,
101 <1250000>, <1200000>, 154 <1250000>, <1200000>,
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index d877dbe7ac0e..e31bfc4a6f09 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -31,6 +31,11 @@
31 pinctrl2 = &pinctrl_2; 31 pinctrl2 = &pinctrl_2;
32 }; 32 };
33 33
34 pd_lcd1: lcd1-power-domain@10023CA0 {
35 compatible = "samsung,exynos4210-pd";
36 reg = <0x10023CA0 0x20>;
37 };
38
34 gic:interrupt-controller@10490000 { 39 gic:interrupt-controller@10490000 {
35 cpu-offset = <0x8000>; 40 cpu-offset = <0x8000>;
36 }; 41 };
@@ -64,4 +69,11 @@
64 compatible = "samsung,pinctrl-exynos4210"; 69 compatible = "samsung,pinctrl-exynos4210";
65 reg = <0x03860000 0x1000>; 70 reg = <0x03860000 0x1000>;
66 }; 71 };
72
73 tmu@100C0000 {
74 compatible = "samsung,exynos4210-tmu";
75 interrupt-parent = <&combiner>;
76 reg = <0x100C0000 0x100>;
77 interrupts = <2 4>;
78 };
67}; 79};
diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi
new file mode 100644
index 000000000000..c6ae2005961f
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -0,0 +1,28 @@
1/*
2 * Samsung's Exynos4212 SoC device tree source
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Samsung's Exynos4212 SoC device nodes are listed in this file. Exynos4212
8 * based board files can include this file and provide values for board specfic
9 * bindings.
10 *
11 * Note: This file does not include device nodes for all the controllers in
12 * Exynos4212 SoC. As device tree coverage for Exynos4212 increases, additional
13 * nodes can be added to this file.
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18*/
19
20/include/ "exynos4x12.dtsi"
21
22/ {
23 compatible = "samsung,exynos4212";
24
25 gic:interrupt-controller@10490000 {
26 cpu-offset = <0x8000>;
27 };
28};
diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts b/arch/arm/boot/dts/exynos4412-smdk4412.dts
new file mode 100644
index 000000000000..f05bf575cc45
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-smdk4412.dts
@@ -0,0 +1,45 @@
1/*
2 * Samsung's Exynos4412 based SMDK board device tree source
3 *
4 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Device tree source file for Samsung's SMDK4412 board which is based on
8 * Samsung's Exynos4412 SoC.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15/dts-v1/;
16/include/ "exynos4412.dtsi"
17
18/ {
19 model = "Samsung SMDK evaluation board based on Exynos4412";
20 compatible = "samsung,smdk4412", "samsung,exynos4412";
21
22 memory {
23 reg = <0x40000000 0x40000000>;
24 };
25
26 chosen {
27 bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc";
28 };
29
30 serial@13800000 {
31 status = "okay";
32 };
33
34 serial@13810000 {
35 status = "okay";
36 };
37
38 serial@13820000 {
39 status = "okay";
40 };
41
42 serial@13830000 {
43 status = "okay";
44 };
45};
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
new file mode 100644
index 000000000000..d7dfe312772a
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -0,0 +1,28 @@
1/*
2 * Samsung's Exynos4412 SoC device tree source
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Samsung's Exynos4412 SoC device nodes are listed in this file. Exynos4412
8 * based board files can include this file and provide values for board specfic
9 * bindings.
10 *
11 * Note: This file does not include device nodes for all the controllers in
12 * Exynos4412 SoC. As device tree coverage for Exynos4412 increases, additional
13 * nodes can be added to this file.
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18*/
19
20/include/ "exynos4x12.dtsi"
21
22/ {
23 compatible = "samsung,exynos4412";
24
25 gic:interrupt-controller@10490000 {
26 cpu-offset = <0x4000>;
27 };
28};
diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
new file mode 100644
index 000000000000..8e6115adcd97
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
@@ -0,0 +1,965 @@
1/*
2 * Samsung's Exynos4x12 SoCs pin-mux and pin-config device tree source
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Samsung's Exynos4x12 SoCs pin-mux and pin-config optiosn are listed as device
8 * tree nodes are listed in this file.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15/ {
16 pinctrl@11400000 {
17 gpa0: gpa0 {
18 gpio-controller;
19 #gpio-cells = <2>;
20
21 interrupt-controller;
22 #interrupt-cells = <2>;
23 };
24
25 gpa1: gpa1 {
26 gpio-controller;
27 #gpio-cells = <2>;
28
29 interrupt-controller;
30 #interrupt-cells = <2>;
31 };
32
33 gpb: gpb {
34 gpio-controller;
35 #gpio-cells = <2>;
36
37 interrupt-controller;
38 #interrupt-cells = <2>;
39 };
40
41 gpc0: gpc0 {
42 gpio-controller;
43 #gpio-cells = <2>;
44
45 interrupt-controller;
46 #interrupt-cells = <2>;
47 };
48
49 gpc1: gpc1 {
50 gpio-controller;
51 #gpio-cells = <2>;
52
53 interrupt-controller;
54 #interrupt-cells = <2>;
55 };
56
57 gpd0: gpd0 {
58 gpio-controller;
59 #gpio-cells = <2>;
60
61 interrupt-controller;
62 #interrupt-cells = <2>;
63 };
64
65 gpd1: gpd1 {
66 gpio-controller;
67 #gpio-cells = <2>;
68
69 interrupt-controller;
70 #interrupt-cells = <2>;
71 };
72
73 gpf0: gpf0 {
74 gpio-controller;
75 #gpio-cells = <2>;
76
77 interrupt-controller;
78 #interrupt-cells = <2>;
79 };
80
81 gpf1: gpf1 {
82 gpio-controller;
83 #gpio-cells = <2>;
84
85 interrupt-controller;
86 #interrupt-cells = <2>;
87 };
88
89 gpf2: gpf2 {
90 gpio-controller;
91 #gpio-cells = <2>;
92
93 interrupt-controller;
94 #interrupt-cells = <2>;
95 };
96
97 gpf3: gpf3 {
98 gpio-controller;
99 #gpio-cells = <2>;
100
101 interrupt-controller;
102 #interrupt-cells = <2>;
103 };
104
105 gpj0: gpj0 {
106 gpio-controller;
107 #gpio-cells = <2>;
108
109 interrupt-controller;
110 #interrupt-cells = <2>;
111 };
112
113 gpj1: gpj1 {
114 gpio-controller;
115 #gpio-cells = <2>;
116
117 interrupt-controller;
118 #interrupt-cells = <2>;
119 };
120
121 uart0_data: uart0-data {
122 samsung,pins = "gpa0-0", "gpa0-1";
123 samsung,pin-function = <0x2>;
124 samsung,pin-pud = <0>;
125 samsung,pin-drv = <0>;
126 };
127
128 uart0_fctl: uart0-fctl {
129 samsung,pins = "gpa0-2", "gpa0-3";
130 samsung,pin-function = <2>;
131 samsung,pin-pud = <0>;
132 samsung,pin-drv = <0>;
133 };
134
135 uart1_data: uart1-data {
136 samsung,pins = "gpa0-4", "gpa0-5";
137 samsung,pin-function = <2>;
138 samsung,pin-pud = <0>;
139 samsung,pin-drv = <0>;
140 };
141
142 uart1_fctl: uart1-fctl {
143 samsung,pins = "gpa0-6", "gpa0-7";
144 samsung,pin-function = <2>;
145 samsung,pin-pud = <0>;
146 samsung,pin-drv = <0>;
147 };
148
149 i2c2_bus: i2c2-bus {
150 samsung,pins = "gpa0-6", "gpa0-7";
151 samsung,pin-function = <3>;
152 samsung,pin-pud = <3>;
153 samsung,pin-drv = <0>;
154 };
155
156 uart2_data: uart2-data {
157 samsung,pins = "gpa1-0", "gpa1-1";
158 samsung,pin-function = <2>;
159 samsung,pin-pud = <0>;
160 samsung,pin-drv = <0>;
161 };
162
163 uart2_fctl: uart2-fctl {
164 samsung,pins = "gpa1-2", "gpa1-3";
165 samsung,pin-function = <2>;
166 samsung,pin-pud = <0>;
167 samsung,pin-drv = <0>;
168 };
169
170 uart_audio_a: uart-audio-a {
171 samsung,pins = "gpa1-0", "gpa1-1";
172 samsung,pin-function = <4>;
173 samsung,pin-pud = <0>;
174 samsung,pin-drv = <0>;
175 };
176
177 i2c3_bus: i2c3-bus {
178 samsung,pins = "gpa1-2", "gpa1-3";
179 samsung,pin-function = <3>;
180 samsung,pin-pud = <3>;
181 samsung,pin-drv = <0>;
182 };
183
184 uart3_data: uart3-data {
185 samsung,pins = "gpa1-4", "gpa1-5";
186 samsung,pin-function = <2>;
187 samsung,pin-pud = <0>;
188 samsung,pin-drv = <0>;
189 };
190
191 uart_audio_b: uart-audio-b {
192 samsung,pins = "gpa1-4", "gpa1-5";
193 samsung,pin-function = <4>;
194 samsung,pin-pud = <0>;
195 samsung,pin-drv = <0>;
196 };
197
198 spi0_bus: spi0-bus {
199 samsung,pins = "gpb-0", "gpb-2", "gpb-3";
200 samsung,pin-function = <2>;
201 samsung,pin-pud = <3>;
202 samsung,pin-drv = <0>;
203 };
204
205 i2c4_bus: i2c4-bus {
206 samsung,pins = "gpb-0", "gpb-1";
207 samsung,pin-function = <3>;
208 samsung,pin-pud = <3>;
209 samsung,pin-drv = <0>;
210 };
211
212 spi1_bus: spi1-bus {
213 samsung,pins = "gpb-4", "gpb-6", "gpb-7";
214 samsung,pin-function = <2>;
215 samsung,pin-pud = <3>;
216 samsung,pin-drv = <0>;
217 };
218
219 i2c5_bus: i2c5-bus {
220 samsung,pins = "gpb-2", "gpb-3";
221 samsung,pin-function = <3>;
222 samsung,pin-pud = <3>;
223 samsung,pin-drv = <0>;
224 };
225
226 i2s1_bus: i2s1-bus {
227 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
228 "gpc0-4";
229 samsung,pin-function = <2>;
230 samsung,pin-pud = <0>;
231 samsung,pin-drv = <0>;
232 };
233
234 pcm1_bus: pcm1-bus {
235 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
236 "gpc0-4";
237 samsung,pin-function = <3>;
238 samsung,pin-pud = <0>;
239 samsung,pin-drv = <0>;
240 };
241
242 ac97_bus: ac97-bus {
243 samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
244 "gpc0-4";
245 samsung,pin-function = <4>;
246 samsung,pin-pud = <0>;
247 samsung,pin-drv = <0>;
248 };
249
250 i2s2_bus: i2s2-bus {
251 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
252 "gpc1-4";
253 samsung,pin-function = <2>;
254 samsung,pin-pud = <0>;
255 samsung,pin-drv = <0>;
256 };
257
258 pcm2_bus: pcm2-bus {
259 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
260 "gpc1-4";
261 samsung,pin-function = <3>;
262 samsung,pin-pud = <0>;
263 samsung,pin-drv = <0>;
264 };
265
266 spdif_bus: spdif-bus {
267 samsung,pins = "gpc1-0", "gpc1-1";
268 samsung,pin-function = <4>;
269 samsung,pin-pud = <0>;
270 samsung,pin-drv = <0>;
271 };
272
273 i2c6_bus: i2c6-bus {
274 samsung,pins = "gpc1-3", "gpc1-4";
275 samsung,pin-function = <4>;
276 samsung,pin-pud = <3>;
277 samsung,pin-drv = <0>;
278 };
279
280 spi2_bus: spi2-bus {
281 samsung,pins = "gpc1-1", "gpc1-3", "gpc1-4";
282 samsung,pin-function = <5>;
283 samsung,pin-pud = <3>;
284 samsung,pin-drv = <0>;
285 };
286
287 pwm0_out: pwm0-out {
288 samsung,pins = "gpd0-0";
289 samsung,pin-function = <2>;
290 samsung,pin-pud = <0>;
291 samsung,pin-drv = <0>;
292 };
293
294 pwm1_out: pwm1-out {
295 samsung,pins = "gpd0-1";
296 samsung,pin-function = <2>;
297 samsung,pin-pud = <0>;
298 samsung,pin-drv = <0>;
299 };
300
301 lcd_ctrl: lcd-ctrl {
302 samsung,pins = "gpd0-0", "gpd0-1";
303 samsung,pin-function = <3>;
304 samsung,pin-pud = <0>;
305 samsung,pin-drv = <0>;
306 };
307
308 i2c7_bus: i2c7-bus {
309 samsung,pins = "gpd0-2", "gpd0-3";
310 samsung,pin-function = <3>;
311 samsung,pin-pud = <3>;
312 samsung,pin-drv = <0>;
313 };
314
315 pwm2_out: pwm2-out {
316 samsung,pins = "gpd0-2";
317 samsung,pin-function = <2>;
318 samsung,pin-pud = <0>;
319 samsung,pin-drv = <0>;
320 };
321
322 pwm3_out: pwm3-out {
323 samsung,pins = "gpd0-3";
324 samsung,pin-function = <2>;
325 samsung,pin-pud = <0>;
326 samsung,pin-drv = <0>;
327 };
328
329 i2c0_bus: i2c0-bus {
330 samsung,pins = "gpd1-0", "gpd1-1";
331 samsung,pin-function = <2>;
332 samsung,pin-pud = <3>;
333 samsung,pin-drv = <0>;
334 };
335
336 mipi0_clk: mipi0-clk {
337 samsung,pins = "gpd1-0", "gpd1-1";
338 samsung,pin-function = <3>;
339 samsung,pin-pud = <0>;
340 samsung,pin-drv = <0>;
341 };
342
343 i2c1_bus: i2c1-bus {
344 samsung,pins = "gpd1-2", "gpd1-3";
345 samsung,pin-function = <2>;
346 samsung,pin-pud = <3>;
347 samsung,pin-drv = <0>;
348 };
349
350 mipi1_clk: mipi1-clk {
351 samsung,pins = "gpd1-2", "gpd1-3";
352 samsung,pin-function = <3>;
353 samsung,pin-pud = <0>;
354 samsung,pin-drv = <0>;
355 };
356
357 lcd_clk: lcd-clk {
358 samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3";
359 samsung,pin-function = <2>;
360 samsung,pin-pud = <0>;
361 samsung,pin-drv = <0>;
362 };
363
364 lcd_data16: lcd-data-width16 {
365 samsung,pins = "gpf0-7", "gpf1-0", "gpf1-1", "gpf1-2",
366 "gpf1-3", "gpf1-6", "gpf1-7", "gpf2-0",
367 "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-7",
368 "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
369 samsung,pin-function = <2>;
370 samsung,pin-pud = <0>;
371 samsung,pin-drv = <0>;
372 };
373
374 lcd_data18: lcd-data-width18 {
375 samsung,pins = "gpf0-6", "gpf0-7", "gpf1-0", "gpf1-1",
376 "gpf1-2", "gpf1-3", "gpf1-6", "gpf1-7",
377 "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
378 "gpf2-6", "gpf2-7", "gpf3-0", "gpf3-1",
379 "gpf3-2", "gpf3-3";
380 samsung,pin-function = <2>;
381 samsung,pin-pud = <0>;
382 samsung,pin-drv = <0>;
383 };
384
385 lcd_data24: lcd-data-width24 {
386 samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6", "gpf0-7",
387 "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3",
388 "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7",
389 "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
390 "gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7",
391 "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
392 samsung,pin-function = <2>;
393 samsung,pin-pud = <0>;
394 samsung,pin-drv = <0>;
395 };
396
397 lcd_ldi: lcd-ldi {
398 samsung,pins = "gpf3-4";
399 samsung,pin-function = <2>;
400 samsung,pin-pud = <0>;
401 samsung,pin-drv = <0>;
402 };
403
404 cam_port_a: cam-port-a {
405 samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3",
406 "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7",
407 "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-3",
408 "gpj1-4";
409 samsung,pin-function = <2>;
410 samsung,pin-pud = <3>;
411 samsung,pin-drv = <0>;
412 };
413 };
414
415 pinctrl@11000000 {
416 gpk0: gpk0 {
417 gpio-controller;
418 #gpio-cells = <2>;
419
420 interrupt-controller;
421 #interrupt-cells = <2>;
422 };
423
424 gpk1: gpk1 {
425 gpio-controller;
426 #gpio-cells = <2>;
427
428 interrupt-controller;
429 #interrupt-cells = <2>;
430 };
431
432 gpk2: gpk2 {
433 gpio-controller;
434 #gpio-cells = <2>;
435
436 interrupt-controller;
437 #interrupt-cells = <2>;
438 };
439
440 gpk3: gpk3 {
441 gpio-controller;
442 #gpio-cells = <2>;
443
444 interrupt-controller;
445 #interrupt-cells = <2>;
446 };
447
448 gpl0: gpl0 {
449 gpio-controller;
450 #gpio-cells = <2>;
451
452 interrupt-controller;
453 #interrupt-cells = <2>;
454 };
455
456 gpl1: gpl1 {
457 gpio-controller;
458 #gpio-cells = <2>;
459
460 interrupt-controller;
461 #interrupt-cells = <2>;
462 };
463
464 gpl2: gpl2 {
465 gpio-controller;
466 #gpio-cells = <2>;
467
468 interrupt-controller;
469 #interrupt-cells = <2>;
470 };
471
472 gpm0: gpm0 {
473 gpio-controller;
474 #gpio-cells = <2>;
475
476 interrupt-controller;
477 #interrupt-cells = <2>;
478 };
479
480 gpm1: gpm1 {
481 gpio-controller;
482 #gpio-cells = <2>;
483
484 interrupt-controller;
485 #interrupt-cells = <2>;
486 };
487
488 gpm2: gpm2 {
489 gpio-controller;
490 #gpio-cells = <2>;
491
492 interrupt-controller;
493 #interrupt-cells = <2>;
494 };
495
496 gpm3: gpm3 {
497 gpio-controller;
498 #gpio-cells = <2>;
499
500 interrupt-controller;
501 #interrupt-cells = <2>;
502 };
503
504 gpm4: gpm4 {
505 gpio-controller;
506 #gpio-cells = <2>;
507
508 interrupt-controller;
509 #interrupt-cells = <2>;
510 };
511
512 gpy0: gpy0 {
513 gpio-controller;
514 #gpio-cells = <2>;
515 };
516
517 gpy1: gpy1 {
518 gpio-controller;
519 #gpio-cells = <2>;
520 };
521
522 gpy2: gpy2 {
523 gpio-controller;
524 #gpio-cells = <2>;
525 };
526
527 gpy3: gpy3 {
528 gpio-controller;
529 #gpio-cells = <2>;
530 };
531
532 gpy4: gpy4 {
533 gpio-controller;
534 #gpio-cells = <2>;
535 };
536
537 gpy5: gpy5 {
538 gpio-controller;
539 #gpio-cells = <2>;
540 };
541
542 gpy6: gpy6 {
543 gpio-controller;
544 #gpio-cells = <2>;
545 };
546
547 gpx0: gpx0 {
548 gpio-controller;
549 #gpio-cells = <2>;
550
551 interrupt-controller;
552 interrupt-parent = <&gic>;
553 interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
554 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>;
555 #interrupt-cells = <2>;
556 };
557
558 gpx1: gpx1 {
559 gpio-controller;
560 #gpio-cells = <2>;
561
562 interrupt-controller;
563 interrupt-parent = <&gic>;
564 interrupts = <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
565 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
566 #interrupt-cells = <2>;
567 };
568
569 gpx2: gpx2 {
570 gpio-controller;
571 #gpio-cells = <2>;
572
573 interrupt-controller;
574 #interrupt-cells = <2>;
575 };
576
577 gpx3: gpx3 {
578 gpio-controller;
579 #gpio-cells = <2>;
580
581 interrupt-controller;
582 #interrupt-cells = <2>;
583 };
584
585 sd0_clk: sd0-clk {
586 samsung,pins = "gpk0-0";
587 samsung,pin-function = <2>;
588 samsung,pin-pud = <0>;
589 samsung,pin-drv = <3>;
590 };
591
592 sd0_cmd: sd0-cmd {
593 samsung,pins = "gpk0-1";
594 samsung,pin-function = <2>;
595 samsung,pin-pud = <0>;
596 samsung,pin-drv = <3>;
597 };
598
599 sd0_cd: sd0-cd {
600 samsung,pins = "gpk0-2";
601 samsung,pin-function = <2>;
602 samsung,pin-pud = <3>;
603 samsung,pin-drv = <3>;
604 };
605
606 sd0_bus1: sd0-bus-width1 {
607 samsung,pins = "gpk0-3";
608 samsung,pin-function = <2>;
609 samsung,pin-pud = <3>;
610 samsung,pin-drv = <3>;
611 };
612
613 sd0_bus4: sd0-bus-width4 {
614 samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
615 samsung,pin-function = <2>;
616 samsung,pin-pud = <3>;
617 samsung,pin-drv = <3>;
618 };
619
620 sd0_bus8: sd0-bus-width8 {
621 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
622 samsung,pin-function = <3>;
623 samsung,pin-pud = <3>;
624 samsung,pin-drv = <3>;
625 };
626
627 sd4_clk: sd4-clk {
628 samsung,pins = "gpk0-0";
629 samsung,pin-function = <3>;
630 samsung,pin-pud = <0>;
631 samsung,pin-drv = <3>;
632 };
633
634 sd4_cmd: sd4-cmd {
635 samsung,pins = "gpk0-1";
636 samsung,pin-function = <3>;
637 samsung,pin-pud = <0>;
638 samsung,pin-drv = <3>;
639 };
640
641 sd4_cd: sd4-cd {
642 samsung,pins = "gpk0-2";
643 samsung,pin-function = <3>;
644 samsung,pin-pud = <3>;
645 samsung,pin-drv = <3>;
646 };
647
648 sd4_bus1: sd4-bus-width1 {
649 samsung,pins = "gpk0-3";
650 samsung,pin-function = <3>;
651 samsung,pin-pud = <3>;
652 samsung,pin-drv = <3>;
653 };
654
655 sd4_bus4: sd4-bus-width4 {
656 samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6";
657 samsung,pin-function = <3>;
658 samsung,pin-pud = <3>;
659 samsung,pin-drv = <3>;
660 };
661
662 sd4_bus8: sd4-bus-width8 {
663 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
664 samsung,pin-function = <3>;
665 samsung,pin-pud = <4>;
666 samsung,pin-drv = <3>;
667 };
668
669 sd1_clk: sd1-clk {
670 samsung,pins = "gpk1-0";
671 samsung,pin-function = <2>;
672 samsung,pin-pud = <0>;
673 samsung,pin-drv = <3>;
674 };
675
676 sd1_cmd: sd1-cmd {
677 samsung,pins = "gpk1-1";
678 samsung,pin-function = <2>;
679 samsung,pin-pud = <0>;
680 samsung,pin-drv = <3>;
681 };
682
683 sd1_cd: sd1-cd {
684 samsung,pins = "gpk1-2";
685 samsung,pin-function = <2>;
686 samsung,pin-pud = <3>;
687 samsung,pin-drv = <3>;
688 };
689
690 sd1_bus1: sd1-bus-width1 {
691 samsung,pins = "gpk1-3";
692 samsung,pin-function = <2>;
693 samsung,pin-pud = <3>;
694 samsung,pin-drv = <3>;
695 };
696
697 sd1_bus4: sd1-bus-width4 {
698 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
699 samsung,pin-function = <2>;
700 samsung,pin-pud = <3>;
701 samsung,pin-drv = <3>;
702 };
703
704 sd2_clk: sd2-clk {
705 samsung,pins = "gpk2-0";
706 samsung,pin-function = <2>;
707 samsung,pin-pud = <0>;
708 samsung,pin-drv = <3>;
709 };
710
711 sd2_cmd: sd2-cmd {
712 samsung,pins = "gpk2-1";
713 samsung,pin-function = <2>;
714 samsung,pin-pud = <0>;
715 samsung,pin-drv = <3>;
716 };
717
718 sd2_cd: sd2-cd {
719 samsung,pins = "gpk2-2";
720 samsung,pin-function = <2>;
721 samsung,pin-pud = <3>;
722 samsung,pin-drv = <3>;
723 };
724
725 sd2_bus1: sd2-bus-width1 {
726 samsung,pins = "gpk2-3";
727 samsung,pin-function = <2>;
728 samsung,pin-pud = <3>;
729 samsung,pin-drv = <3>;
730 };
731
732 sd2_bus4: sd2-bus-width4 {
733 samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6";
734 samsung,pin-function = <2>;
735 samsung,pin-pud = <3>;
736 samsung,pin-drv = <3>;
737 };
738
739 sd2_bus8: sd2-bus-width8 {
740 samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
741 samsung,pin-function = <3>;
742 samsung,pin-pud = <3>;
743 samsung,pin-drv = <3>;
744 };
745
746 sd3_clk: sd3-clk {
747 samsung,pins = "gpk3-0";
748 samsung,pin-function = <2>;
749 samsung,pin-pud = <0>;
750 samsung,pin-drv = <3>;
751 };
752
753 sd3_cmd: sd3-cmd {
754 samsung,pins = "gpk3-1";
755 samsung,pin-function = <2>;
756 samsung,pin-pud = <0>;
757 samsung,pin-drv = <3>;
758 };
759
760 sd3_cd: sd3-cd {
761 samsung,pins = "gpk3-2";
762 samsung,pin-function = <2>;
763 samsung,pin-pud = <3>;
764 samsung,pin-drv = <3>;
765 };
766
767 sd3_bus1: sd3-bus-width1 {
768 samsung,pins = "gpk3-3";
769 samsung,pin-function = <2>;
770 samsung,pin-pud = <3>;
771 samsung,pin-drv = <3>;
772 };
773
774 sd3_bus4: sd3-bus-width4 {
775 samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
776 samsung,pin-function = <2>;
777 samsung,pin-pud = <3>;
778 samsung,pin-drv = <3>;
779 };
780
781 keypad_col0: keypad-col0 {
782 samsung,pins = "gpl2-0";
783 samsung,pin-function = <3>;
784 samsung,pin-pud = <0>;
785 samsung,pin-drv = <0>;
786 };
787
788 keypad_col1: keypad-col1 {
789 samsung,pins = "gpl2-1";
790 samsung,pin-function = <3>;
791 samsung,pin-pud = <0>;
792 samsung,pin-drv = <0>;
793 };
794
795 keypad_col2: keypad-col2 {
796 samsung,pins = "gpl2-2";
797 samsung,pin-function = <3>;
798 samsung,pin-pud = <0>;
799 samsung,pin-drv = <0>;
800 };
801
802 keypad_col3: keypad-col3 {
803 samsung,pins = "gpl2-3";
804 samsung,pin-function = <3>;
805 samsung,pin-pud = <0>;
806 samsung,pin-drv = <0>;
807 };
808
809 keypad_col4: keypad-col4 {
810 samsung,pins = "gpl2-4";
811 samsung,pin-function = <3>;
812 samsung,pin-pud = <0>;
813 samsung,pin-drv = <0>;
814 };
815
816 keypad_col5: keypad-col5 {
817 samsung,pins = "gpl2-5";
818 samsung,pin-function = <3>;
819 samsung,pin-pud = <0>;
820 samsung,pin-drv = <0>;
821 };
822
823 keypad_col6: keypad-col6 {
824 samsung,pins = "gpl2-6";
825 samsung,pin-function = <3>;
826 samsung,pin-pud = <0>;
827 samsung,pin-drv = <0>;
828 };
829
830 keypad_col7: keypad-col7 {
831 samsung,pins = "gpl2-7";
832 samsung,pin-function = <3>;
833 samsung,pin-pud = <0>;
834 samsung,pin-drv = <0>;
835 };
836
837 cam_port_b: cam-port-b {
838 samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3",
839 "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7",
840 "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1",
841 "gpm2-2";
842 samsung,pin-function = <3>;
843 samsung,pin-pud = <3>;
844 samsung,pin-drv = <0>;
845 };
846
847 eint0: ext-int0 {
848 samsung,pins = "gpx0-0";
849 samsung,pin-function = <0xf>;
850 samsung,pin-pud = <0>;
851 samsung,pin-drv = <0>;
852 };
853
854 eint8: ext-int8 {
855 samsung,pins = "gpx1-0";
856 samsung,pin-function = <0xf>;
857 samsung,pin-pud = <0>;
858 samsung,pin-drv = <0>;
859 };
860
861 eint15: ext-int15 {
862 samsung,pins = "gpx1-7";
863 samsung,pin-function = <0xf>;
864 samsung,pin-pud = <0>;
865 samsung,pin-drv = <0>;
866 };
867
868 eint16: ext-int16 {
869 samsung,pins = "gpx2-0";
870 samsung,pin-function = <0xf>;
871 samsung,pin-pud = <0>;
872 samsung,pin-drv = <0>;
873 };
874
875 eint31: ext-int31 {
876 samsung,pins = "gpx3-7";
877 samsung,pin-function = <0xf>;
878 samsung,pin-pud = <0>;
879 samsung,pin-drv = <0>;
880 };
881 };
882
883 pinctrl@03860000 {
884 gpz: gpz {
885 gpio-controller;
886 #gpio-cells = <2>;
887
888 interrupt-controller;
889 #interrupt-cells = <2>;
890 };
891
892 i2s0_bus: i2s0-bus {
893 samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
894 "gpz-4", "gpz-5", "gpz-6";
895 samsung,pin-function = <0x2>;
896 samsung,pin-pud = <0>;
897 samsung,pin-drv = <0>;
898 };
899
900 pcm0_bus: pcm0-bus {
901 samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
902 "gpz-4";
903 samsung,pin-function = <0x3>;
904 samsung,pin-pud = <0>;
905 samsung,pin-drv = <0>;
906 };
907 };
908
909 pinctrl@106E0000 {
910 gpv0: gpv0 {
911 gpio-controller;
912 #gpio-cells = <2>;
913
914 interrupt-controller;
915 #interrupt-cells = <2>;
916 };
917
918 gpv1: gpv1 {
919 gpio-controller;
920 #gpio-cells = <2>;
921
922 interrupt-controller;
923 #interrupt-cells = <2>;
924 };
925
926 gpv2: gpv2 {
927 gpio-controller;
928 #gpio-cells = <2>;
929
930 interrupt-controller;
931 #interrupt-cells = <2>;
932 };
933
934 gpv3: gpv3 {
935 gpio-controller;
936 #gpio-cells = <2>;
937
938 interrupt-controller;
939 #interrupt-cells = <2>;
940 };
941
942 gpv4: gpv4 {
943 gpio-controller;
944 #gpio-cells = <2>;
945
946 interrupt-controller;
947 #interrupt-cells = <2>;
948 };
949
950 c2c_bus: c2c-bus {
951 samsung,pins = "gpv0-0", "gpv0-1", "gpv0-2", "gpv0-3",
952 "gpv0-4", "gpv0-5", "gpv0-6", "gpv0-7",
953 "gpv1-0", "gpv1-1", "gpv1-2", "gpv1-3",
954 "gpv1-4", "gpv1-5", "gpv1-6", "gpv1-7",
955 "gpv2-0", "gpv2-1", "gpv2-2", "gpv2-3",
956 "gpv2-4", "gpv2-5", "gpv2-6", "gpv2-7",
957 "gpv3-0", "gpv3-1", "gpv3-2", "gpv3-3",
958 "gpv3-4", "gpv3-5", "gpv3-6", "gpv3-7",
959 "gpv4-0", "gpv4-1";
960 samsung,pin-function = <0x2>;
961 samsung,pin-pud = <0>;
962 samsung,pin-drv = <0>;
963 };
964 };
965};
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
new file mode 100644
index 000000000000..179a62e46c9d
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -0,0 +1,69 @@
1/*
2 * Samsung's Exynos4x12 SoCs device tree source
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Samsung's Exynos4x12 SoCs device nodes are listed in this file. Exynos4x12
8 * based board files can include this file and provide values for board specfic
9 * bindings.
10 *
11 * Note: This file does not include device nodes for all the controllers in
12 * Exynos4x12 SoC. As device tree coverage for Exynos4x12 increases, additional
13 * nodes can be added to this file.
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18*/
19
20/include/ "exynos4.dtsi"
21/include/ "exynos4x12-pinctrl.dtsi"
22
23/ {
24 aliases {
25 pinctrl0 = &pinctrl_0;
26 pinctrl1 = &pinctrl_1;
27 pinctrl2 = &pinctrl_2;
28 pinctrl3 = &pinctrl_3;
29 };
30
31 combiner:interrupt-controller@10440000 {
32 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
33 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
34 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
35 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
36 <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>;
37 };
38
39 pinctrl_0: pinctrl@11400000 {
40 compatible = "samsung,pinctrl-exynos4x12";
41 reg = <0x11400000 0x1000>;
42 interrupts = <0 47 0>;
43 };
44
45 pinctrl_1: pinctrl@11000000 {
46 compatible = "samsung,pinctrl-exynos4x12";
47 reg = <0x11000000 0x1000>;
48 interrupts = <0 46 0>;
49
50 wakup_eint: wakeup-interrupt-controller {
51 compatible = "samsung,exynos4210-wakeup-eint";
52 interrupt-parent = <&gic>;
53 interrupts = <0 32 0>;
54 };
55 };
56
57 pinctrl_2: pinctrl@03860000 {
58 compatible = "samsung,pinctrl-exynos4x12";
59 reg = <0x03860000 0x1000>;
60 interrupt-parent = <&combiner>;
61 interrupts = <10 0>;
62 };
63
64 pinctrl_3: pinctrl@106E0000 {
65 compatible = "samsung,pinctrl-exynos4x12";
66 reg = <0x106E0000 0x1000>;
67 interrupts = <0 72 0>;
68 };
69};
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index a352df403b7a..942d5761ca97 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -17,10 +17,6 @@
17 compatible = "samsung,smdk5250", "samsung,exynos5250"; 17 compatible = "samsung,smdk5250", "samsung,exynos5250";
18 18
19 aliases { 19 aliases {
20 mshc0 = &dwmmc_0;
21 mshc1 = &dwmmc_1;
22 mshc2 = &dwmmc_2;
23 mshc3 = &dwmmc_3;
24 }; 20 };
25 21
26 memory { 22 memory {
@@ -55,8 +51,31 @@
55 }; 51 };
56 }; 52 };
57 53
54 i2c@121D0000 {
55 samsung,i2c-sda-delay = <100>;
56 samsung,i2c-max-bus-freq = <40000>;
57 samsung,i2c-slave-addr = <0x38>;
58
59 sata-phy {
60 compatible = "samsung,sata-phy";
61 reg = <0x38>;
62 };
63 };
64
65 sata@122F0000 {
66 samsung,sata-freq = <66>;
67 };
68
58 i2c@12C80000 { 69 i2c@12C80000 {
59 status = "disabled"; 70 samsung,i2c-sda-delay = <100>;
71 samsung,i2c-max-bus-freq = <66000>;
72 gpios = <&gpa0 6 3 3 0>,
73 <&gpa0 7 3 3 0>;
74
75 hdmiddc@50 {
76 compatible = "samsung,exynos5-hdmiddc";
77 reg = <0x50>;
78 };
60 }; 79 };
61 80
62 i2c@12C90000 { 81 i2c@12C90000 {
@@ -79,7 +98,17 @@
79 status = "disabled"; 98 status = "disabled";
80 }; 99 };
81 100
82 dwmmc_0: dwmmc0@12200000 { 101 i2c@12CE0000 {
102 samsung,i2c-sda-delay = <100>;
103 samsung,i2c-max-bus-freq = <66000>;
104
105 hdmiphy@38 {
106 compatible = "samsung,exynos5-hdmiphy";
107 reg = <0x38>;
108 };
109 };
110
111 dwmmc0@12200000 {
83 num-slots = <1>; 112 num-slots = <1>;
84 supports-highspeed; 113 supports-highspeed;
85 broken-cd; 114 broken-cd;
@@ -100,11 +129,11 @@
100 }; 129 };
101 }; 130 };
102 131
103 dwmmc_1: dwmmc1@12210000 { 132 dwmmc1@12210000 {
104 status = "disabled"; 133 status = "disabled";
105 }; 134 };
106 135
107 dwmmc_2: dwmmc2@12220000 { 136 dwmmc2@12220000 {
108 num-slots = <1>; 137 num-slots = <1>;
109 supports-highspeed; 138 supports-highspeed;
110 fifo-depth = <0x80>; 139 fifo-depth = <0x80>;
@@ -125,7 +154,7 @@
125 }; 154 };
126 }; 155 };
127 156
128 dwmmc_3: dwmmc3@12230000 { 157 dwmmc3@12230000 {
129 status = "disabled"; 158 status = "disabled";
130 }; 159 };
131 160
@@ -166,4 +195,13 @@
166 spi_2: spi@12d40000 { 195 spi_2: spi@12d40000 {
167 status = "disabled"; 196 status = "disabled";
168 }; 197 };
198
199 hdmi {
200 hpd-gpio = <&gpx3 7 0xf 1 3>;
201 };
202
203 codec@11000000 {
204 samsung,mfc-r = <0x43000000 0x800000>;
205 samsung,mfc-l = <0x51000000 0x800000>;
206 };
169}; 207};
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts
new file mode 100644
index 000000000000..17dd951c1cd2
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -0,0 +1,43 @@
1/*
2 * Google Snow board device tree source
3 *
4 * Copyright (c) 2012 Google, Inc
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11/dts-v1/;
12/include/ "exynos5250.dtsi"
13/include/ "cros5250-common.dtsi"
14
15/ {
16 model = "Google Snow";
17 compatible = "google,snow", "samsung,exynos5250";
18
19 gpio-keys {
20 compatible = "gpio-keys";
21
22 lid-switch {
23 label = "Lid";
24 gpios = <&gpx3 5 0 0x10000 0>;
25 linux,input-type = <5>; /* EV_SW */
26 linux,code = <0>; /* SW_LID */
27 debounce-interval = <1>;
28 gpio-key,wakeup;
29 };
30 };
31
32 /*
33 * On Snow we've got SIP WiFi and so can keep drive strengths low to
34 * reduce EMI.
35 */
36 dwmmc3@12230000 {
37 slot@0 {
38 gpios = <&gpc4 0 2 0 0>, <&gpc4 1 2 3 0>,
39 <&gpc4 3 2 3 0>, <&gpc4 4 2 3 0>,
40 <&gpc4 5 2 3 0>, <&gpc4 6 2 3 0>;
41 };
42 };
43};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index dddfd6e444dc..36d8246ea50e 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -31,6 +31,10 @@
31 gsc1 = &gsc_1; 31 gsc1 = &gsc_1;
32 gsc2 = &gsc_2; 32 gsc2 = &gsc_2;
33 gsc3 = &gsc_3; 33 gsc3 = &gsc_3;
34 mshc0 = &dwmmc_0;
35 mshc1 = &dwmmc_1;
36 mshc2 = &dwmmc_2;
37 mshc3 = &dwmmc_3;
34 }; 38 };
35 39
36 gic:interrupt-controller@10481000 { 40 gic:interrupt-controller@10481000 {
@@ -62,12 +66,24 @@
62 interrupts = <0 42 0>; 66 interrupts = <0 42 0>;
63 }; 67 };
64 68
69 codec@11000000 {
70 compatible = "samsung,mfc-v6";
71 reg = <0x11000000 0x10000>;
72 interrupts = <0 96 0>;
73 };
74
65 rtc { 75 rtc {
66 compatible = "samsung,s3c6410-rtc"; 76 compatible = "samsung,s3c6410-rtc";
67 reg = <0x101E0000 0x100>; 77 reg = <0x101E0000 0x100>;
68 interrupts = <0 43 0>, <0 44 0>; 78 interrupts = <0 43 0>, <0 44 0>;
69 }; 79 };
70 80
81 tmu@10060000 {
82 compatible = "samsung,exynos5250-tmu";
83 reg = <0x10060000 0x100>;
84 interrupts = <0 65 0>;
85 };
86
71 serial@12C00000 { 87 serial@12C00000 {
72 compatible = "samsung,exynos4210-uart"; 88 compatible = "samsung,exynos4210-uart";
73 reg = <0x12C00000 0x100>; 89 reg = <0x12C00000 0x100>;
@@ -92,6 +108,17 @@
92 interrupts = <0 54 0>; 108 interrupts = <0 54 0>;
93 }; 109 };
94 110
111 sata@122F0000 {
112 compatible = "samsung,exynos5-sata-ahci";
113 reg = <0x122F0000 0x1ff>;
114 interrupts = <0 115 0>;
115 };
116
117 sata-phy@12170000 {
118 compatible = "samsung,exynos5-sata-phy";
119 reg = <0x12170000 0x1ff>;
120 };
121
95 i2c@12C60000 { 122 i2c@12C60000 {
96 compatible = "samsung,s3c2440-i2c"; 123 compatible = "samsung,s3c2440-i2c";
97 reg = <0x12C60000 0x100>; 124 reg = <0x12C60000 0x100>;
@@ -156,6 +183,21 @@
156 #size-cells = <0>; 183 #size-cells = <0>;
157 }; 184 };
158 185
186 i2c@12CE0000 {
187 compatible = "samsung,s3c2440-hdmiphy-i2c";
188 reg = <0x12CE0000 0x1000>;
189 interrupts = <0 64 0>;
190 #address-cells = <1>;
191 #size-cells = <0>;
192 };
193
194 i2c@121D0000 {
195 compatible = "samsung,exynos5-sata-phy-i2c";
196 reg = <0x121D0000 0x100>;
197 #address-cells = <1>;
198 #size-cells = <0>;
199 };
200
159 spi_0: spi@12d20000 { 201 spi_0: spi@12d20000 {
160 compatible = "samsung,exynos4210-spi"; 202 compatible = "samsung,exynos4210-spi";
161 reg = <0x12d20000 0x100>; 203 reg = <0x12d20000 0x100>;
@@ -186,7 +228,7 @@
186 #size-cells = <0>; 228 #size-cells = <0>;
187 }; 229 };
188 230
189 dwmmc0@12200000 { 231 dwmmc_0: dwmmc0@12200000 {
190 compatible = "samsung,exynos5250-dw-mshc"; 232 compatible = "samsung,exynos5250-dw-mshc";
191 reg = <0x12200000 0x1000>; 233 reg = <0x12200000 0x1000>;
192 interrupts = <0 75 0>; 234 interrupts = <0 75 0>;
@@ -194,7 +236,7 @@
194 #size-cells = <0>; 236 #size-cells = <0>;
195 }; 237 };
196 238
197 dwmmc1@12210000 { 239 dwmmc_1: dwmmc1@12210000 {
198 compatible = "samsung,exynos5250-dw-mshc"; 240 compatible = "samsung,exynos5250-dw-mshc";
199 reg = <0x12210000 0x1000>; 241 reg = <0x12210000 0x1000>;
200 interrupts = <0 76 0>; 242 interrupts = <0 76 0>;
@@ -202,7 +244,7 @@
202 #size-cells = <0>; 244 #size-cells = <0>;
203 }; 245 };
204 246
205 dwmmc2@12220000 { 247 dwmmc_2: dwmmc2@12220000 {
206 compatible = "samsung,exynos5250-dw-mshc"; 248 compatible = "samsung,exynos5250-dw-mshc";
207 reg = <0x12220000 0x1000>; 249 reg = <0x12220000 0x1000>;
208 interrupts = <0 77 0>; 250 interrupts = <0 77 0>;
@@ -210,7 +252,7 @@
210 #size-cells = <0>; 252 #size-cells = <0>;
211 }; 253 };
212 254
213 dwmmc3@12230000 { 255 dwmmc_3: dwmmc3@12230000 {
214 compatible = "samsung,exynos5250-dw-mshc"; 256 compatible = "samsung,exynos5250-dw-mshc";
215 reg = <0x12230000 0x1000>; 257 reg = <0x12230000 0x1000>;
216 interrupts = <0 78 0>; 258 interrupts = <0 78 0>;
@@ -520,4 +562,16 @@
520 reg = <0x13e30000 0x1000>; 562 reg = <0x13e30000 0x1000>;
521 interrupts = <0 88 0>; 563 interrupts = <0 88 0>;
522 }; 564 };
565
566 hdmi {
567 compatible = "samsung,exynos5-hdmi";
568 reg = <0x14530000 0x100000>;
569 interrupts = <0 95 0>;
570 };
571
572 mixer {
573 compatible = "samsung,exynos5-mixer";
574 reg = <0x14450000 0x10000>;
575 interrupts = <0 94 0>;
576 };
523}; 577};
diff --git a/arch/arm/boot/dts/href.dtsi b/arch/arm/boot/dts/href.dtsi
new file mode 100644
index 000000000000..592fb9dc35bd
--- /dev/null
+++ b/arch/arm/boot/dts/href.dtsi
@@ -0,0 +1,273 @@
1/*
2 * Copyright 2012 ST-Ericsson AB
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/include/ "dbx5x0.dtsi"
13
14/ {
15 memory {
16 reg = <0x00000000 0x20000000>;
17 };
18
19 gpio_keys {
20 compatible = "gpio-keys";
21 #address-cells = <1>;
22 #size-cells = <0>;
23
24 button@1 {
25 linux,code = <11>;
26 label = "SFH7741 Proximity Sensor";
27 };
28 };
29
30 soc-u9500 {
31 uart@80120000 {
32 status = "okay";
33 };
34
35 uart@80121000 {
36 status = "okay";
37 };
38
39 uart@80007000 {
40 status = "okay";
41 };
42
43 i2c@80004000 {
44 tc3589x@42 {
45 compatible = "tc3589x";
46 reg = <0x42>;
47 interrupt-parent = <&gpio6>;
48 interrupts = <25 0x1>;
49
50 interrupt-controller;
51 #interrupt-cells = <2>;
52
53 tc3589x_gpio: tc3589x_gpio {
54 compatible = "tc3589x-gpio";
55 interrupts = <0 0x1>;
56
57 interrupt-controller;
58 #interrupt-cells = <2>;
59 gpio-controller;
60 #gpio-cells = <2>;
61 };
62 };
63 };
64
65 i2c@80128000 {
66 lp5521@0x33 {
67 compatible = "lp5521";
68 reg = <0x33>;
69 };
70
71 lp5521@0x34 {
72 compatible = "lp5521";
73 reg = <0x34>;
74 };
75
76 bh1780@0x29 {
77 compatible = "rohm,bh1780gli";
78 reg = <0x33>;
79 };
80 };
81
82 // External Micro SD slot
83 sdi0_per1@80126000 {
84 arm,primecell-periphid = <0x10480180>;
85 max-frequency = <50000000>;
86 bus-width = <4>;
87 mmc-cap-sd-highspeed;
88 mmc-cap-mmc-highspeed;
89 vmmc-supply = <&ab8500_ldo_aux3_reg>;
90
91 cd-gpios = <&tc3589x_gpio 3 0x4>;
92
93 status = "okay";
94 };
95
96 // WLAN SDIO channel
97 sdi1_per2@80118000 {
98 arm,primecell-periphid = <0x10480180>;
99 max-frequency = <50000000>;
100 bus-width = <4>;
101
102 status = "okay";
103 };
104
105 // PoP:ed eMMC
106 sdi2_per3@80005000 {
107 arm,primecell-periphid = <0x10480180>;
108 max-frequency = <50000000>;
109 bus-width = <8>;
110 mmc-cap-mmc-highspeed;
111
112 status = "okay";
113 };
114
115 // On-board eMMC
116 sdi4_per2@80114000 {
117 arm,primecell-periphid = <0x10480180>;
118 max-frequency = <50000000>;
119 bus-width = <8>;
120 mmc-cap-mmc-highspeed;
121 vmmc-supply = <&ab8500_ldo_aux2_reg>;
122
123 status = "okay";
124 };
125
126 sound {
127 compatible = "stericsson,snd-soc-mop500";
128
129 stericsson,cpu-dai = <&msp1 &msp3>;
130 stericsson,audio-codec = <&codec>;
131 };
132
133 msp1: msp@80124000 {
134 status = "okay";
135 };
136
137 msp3: msp@80125000 {
138 status = "okay";
139 };
140
141 prcmu@80157000 {
142 db8500-prcmu-regulators {
143 db8500_vape_reg: db8500_vape {
144 regulator-name = "db8500-vape";
145 };
146
147 db8500_varm_reg: db8500_varm {
148 regulator-name = "db8500-varm";
149 };
150
151 db8500_vmodem_reg: db8500_vmodem {
152 regulator-name = "db8500-vmodem";
153 };
154
155 db8500_vpll_reg: db8500_vpll {
156 regulator-name = "db8500-vpll";
157 };
158
159 db8500_vsmps1_reg: db8500_vsmps1 {
160 regulator-name = "db8500-vsmps1";
161 };
162
163 db8500_vsmps2_reg: db8500_vsmps2 {
164 regulator-name = "db8500-vsmps2";
165 };
166
167 db8500_vsmps3_reg: db8500_vsmps3 {
168 regulator-name = "db8500-vsmps3";
169 };
170
171 db8500_vrf1_reg: db8500_vrf1 {
172 regulator-name = "db8500-vrf1";
173 };
174
175 db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
176 regulator-name = "db8500-sva-mmdsp";
177 };
178
179 db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
180 regulator-name = "db8500-sva-mmdsp-ret";
181 };
182
183 db8500_sva_pipe_reg: db8500_sva_pipe {
184 regulator-name = "db8500_sva_pipe";
185 };
186
187 db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
188 regulator-name = "db8500_sia_mmdsp";
189 };
190
191 db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
192 regulator-name = "db8500-sia-mmdsp-ret";
193 };
194
195 db8500_sia_pipe_reg: db8500_sia_pipe {
196 regulator-name = "db8500-sia-pipe";
197 };
198
199 db8500_sga_reg: db8500_sga {
200 regulator-name = "db8500-sga";
201 };
202
203 db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
204 regulator-name = "db8500-b2r2-mcde";
205 };
206
207 db8500_esram12_reg: db8500_esram12 {
208 regulator-name = "db8500-esram12";
209 };
210
211 db8500_esram12_ret_reg: db8500_esram12_ret {
212 regulator-name = "db8500-esram12-ret";
213 };
214
215 db8500_esram34_reg: db8500_esram34 {
216 regulator-name = "db8500-esram34";
217 };
218
219 db8500_esram34_ret_reg: db8500_esram34_ret {
220 regulator-name = "db8500-esram34-ret";
221 };
222 };
223
224 ab8500@5 {
225 ab8500-regulators {
226 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
227 regulator-name = "V-DISPLAY";
228 };
229
230 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
231 regulator-name = "V-eMMC1";
232 };
233
234 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
235 regulator-name = "V-MMC-SD";
236 };
237
238 ab8500_ldo_initcore_reg: ab8500_ldo_initcore {
239 regulator-name = "V-INTCORE";
240 };
241
242 ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
243 regulator-name = "V-TVOUT";
244 };
245
246 ab8500_ldo_usb_reg: ab8500_ldo_usb {
247 regulator-name = "dummy";
248 };
249
250 ab8500_ldo_audio_reg: ab8500_ldo_audio {
251 regulator-name = "V-AUD";
252 };
253
254 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
255 regulator-name = "V-AMIC1";
256 };
257
258 ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 {
259 regulator-name = "V-AMIC2";
260 };
261
262 ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
263 regulator-name = "V-DMIC";
264 };
265
266 ab8500_ldo_ana_reg: ab8500_ldo_ana {
267 regulator-name = "V-CSI/DSI";
268 };
269 };
270 };
271 };
272 };
273};
diff --git a/arch/arm/boot/dts/hrefprev60.dts b/arch/arm/boot/dts/hrefprev60.dts
new file mode 100644
index 000000000000..eec29c4a86dc
--- /dev/null
+++ b/arch/arm/boot/dts/hrefprev60.dts
@@ -0,0 +1,48 @@
1/*
2 * Copyright 2012 ST-Ericsson AB
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13/include/ "dbx5x0.dtsi"
14/include/ "href.dtsi"
15/include/ "stuib.dtsi"
16
17/ {
18 model = "ST-Ericsson HREF (pre-v60) platform with Device Tree";
19 compatible = "st-ericsson,mop500", "st-ericsson,u8500";
20
21 gpio_keys {
22 button@1 {
23 gpios = <&tc3589x_gpio 7 0x4>;
24 };
25 };
26
27 soc-u9500 {
28 i2c@80004000 {
29 tps61052@33 {
30 compatible = "tps61052";
31 reg = <0x33>;
32 };
33 };
34
35 i2c@80110000 {
36 bu21013_tp@0x5c {
37 reset-gpio = <&tc3589x_gpio 13 0x4>;
38 };
39 };
40
41 vmmci: regulator-gpio {
42 gpios = <&tc3589x_gpio 18 0x4>;
43 gpio-enable = <&tc3589x_gpio 17 0x4>;
44
45 status = "okay";
46 };
47 };
48};
diff --git a/arch/arm/boot/dts/hrefv60plus.dts b/arch/arm/boot/dts/hrefv60plus.dts
index 2131d77dc9c9..55f4191a626e 100644
--- a/arch/arm/boot/dts/hrefv60plus.dts
+++ b/arch/arm/boot/dts/hrefv60plus.dts
@@ -11,85 +11,200 @@
11 11
12/dts-v1/; 12/dts-v1/;
13/include/ "dbx5x0.dtsi" 13/include/ "dbx5x0.dtsi"
14/include/ "href.dtsi"
15/include/ "stuib.dtsi"
14 16
15/ { 17/ {
16 model = "ST-Ericsson HREF platform with Device Tree"; 18 model = "ST-Ericsson HREF (v60+) platform with Device Tree";
17 compatible = "st-ericsson,hrefv60+"; 19 compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
18 20
19 memory { 21 gpio_keys {
20 reg = <0x00000000 0x20000000>; 22 button@1 {
23 gpios = <&gpio6 25 0x4>;
24 };
21 }; 25 };
22 26
23 soc-u9500 { 27 soc-u9500 {
24 uart@80120000 { 28 i2c@80110000 {
29 bu21013_tp@0x5c {
30 reset-gpio = <&gpio4 15 0x4>;
31 };
32 };
33
34 // External Micro SD slot
35 sdi0_per1@80126000 {
36 arm,primecell-periphid = <0x10480180>;
37 max-frequency = <50000000>;
38 bus-width = <4>;
39 mmc-cap-sd-highspeed;
40 mmc-cap-mmc-highspeed;
41 vmmc-supply = <&ab8500_ldo_aux3_reg>;
42
43 cd-gpios = <&tc3589x_gpio 3 0x4>;
44
25 status = "okay"; 45 status = "okay";
26 }; 46 };
27 47
28 uart@80121000 { 48 // WLAN SDIO channel
49 sdi1_per2@80118000 {
50 arm,primecell-periphid = <0x10480180>;
51 max-frequency = <50000000>;
52 bus-width = <4>;
53
29 status = "okay"; 54 status = "okay";
30 }; 55 };
31 56
32 uart@80007000 { 57 // PoP:ed eMMC
58 sdi2_per3@80005000 {
59 arm,primecell-periphid = <0x10480180>;
60 max-frequency = <50000000>;
61 bus-width = <8>;
62 mmc-cap-mmc-highspeed;
63
33 status = "okay"; 64 status = "okay";
34 }; 65 };
35 66
36 i2c@80004000 { 67 // On-board eMMC
37 tc3589x@42 { 68 sdi4_per2@80114000 {
38 compatible = "tc3589x"; 69 arm,primecell-periphid = <0x10480180>;
39 reg = <0x42>; 70 max-frequency = <50000000>;
40 interrupt-parent = <&gpio6>; 71 bus-width = <8>;
41 interrupts = <25 0x1>; 72 mmc-cap-mmc-highspeed;
73 vmmc-supply = <&ab8500_ldo_aux2_reg>;
42 74
43 interrupt-controller; 75 status = "okay";
44 #interrupt-cells = <2>; 76 };
45 77
46 tc3589x_gpio: tc3589x_gpio { 78 prcmu@80157000 {
47 compatible = "tc3589x-gpio"; 79 db8500-prcmu-regulators {
48 interrupts = <0 0x1>; 80 db8500_vape_reg: db8500_vape {
81 regulator-name = "db8500-vape";
82 };
49 83
50 interrupt-controller; 84 db8500_varm_reg: db8500_varm {
51 #interrupt-cells = <2>; 85 regulator-name = "db8500-varm";
52 gpio-controller;
53 #gpio-cells = <2>;
54 }; 86 };
55 };
56 87
57 tps61052@33 { 88 db8500_vmodem_reg: db8500_vmodem {
58 compatible = "tps61052"; 89 regulator-name = "db8500-vmodem";
59 reg = <0x33>; 90 };
60 };
61 };
62 91
63 i2c@80128000 { 92 db8500_vpll_reg: db8500_vpll {
64 lp5521@0x33 { 93 regulator-name = "db8500-vpll";
65 compatible = "lp5521"; 94 };
66 reg = <0x33>;
67 };
68 95
69 lp5521@0x34 { 96 db8500_vsmps1_reg: db8500_vsmps1 {
70 compatible = "lp5521"; 97 regulator-name = "db8500-vsmps1";
71 reg = <0x34>; 98 };
72 }; 99
100 db8500_vsmps2_reg: db8500_vsmps2 {
101 regulator-name = "db8500-vsmps2";
102 };
103
104 db8500_vsmps3_reg: db8500_vsmps3 {
105 regulator-name = "db8500-vsmps3";
106 };
107
108 db8500_vrf1_reg: db8500_vrf1 {
109 regulator-name = "db8500-vrf1";
110 };
111
112 db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
113 regulator-name = "db8500-sva-mmdsp";
114 };
115
116 db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
117 regulator-name = "db8500-sva-mmdsp-ret";
118 };
119
120 db8500_sva_pipe_reg: db8500_sva_pipe {
121 regulator-name = "db8500_sva_pipe";
122 };
73 123
74 bh1780@0x29 { 124 db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
75 compatible = "rohm,bh1780gli"; 125 regulator-name = "db8500_sia_mmdsp";
76 reg = <0x33>; 126 };
127
128 db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
129 regulator-name = "db8500-sia-mmdsp-ret";
130 };
131
132 db8500_sia_pipe_reg: db8500_sia_pipe {
133 regulator-name = "db8500-sia-pipe";
134 };
135
136 db8500_sga_reg: db8500_sga {
137 regulator-name = "db8500-sga";
138 };
139
140 db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
141 regulator-name = "db8500-b2r2-mcde";
142 };
143
144 db8500_esram12_reg: db8500_esram12 {
145 regulator-name = "db8500-esram12";
146 };
147
148 db8500_esram12_ret_reg: db8500_esram12_ret {
149 regulator-name = "db8500-esram12-ret";
150 };
151
152 db8500_esram34_reg: db8500_esram34 {
153 regulator-name = "db8500-esram34";
154 };
155
156 db8500_esram34_ret_reg: db8500_esram34_ret {
157 regulator-name = "db8500-esram34-ret";
158 };
77 }; 159 };
78 };
79 160
80 sound { 161 ab8500@5 {
81 compatible = "stericsson,snd-soc-mop500"; 162 ab8500-regulators {
163 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
164 regulator-name = "V-DISPLAY";
165 };
82 166
83 stericsson,cpu-dai = <&msp1 &msp3>; 167 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
84 stericsson,audio-codec = <&codec>; 168 regulator-name = "V-eMMC1";
85 }; 169 };
86 170
87 msp1: msp@80124000 { 171 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
88 status = "okay"; 172 regulator-name = "V-MMC-SD";
89 }; 173 };
90 174
91 msp3: msp@80125000 { 175 ab8500_ldo_initcore_reg: ab8500_ldo_initcore {
92 status = "okay"; 176 regulator-name = "V-INTCORE";
177 };
178
179 ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
180 regulator-name = "V-TVOUT";
181 };
182
183 ab8500_ldo_usb_reg: ab8500_ldo_usb {
184 regulator-name = "dummy";
185 };
186
187 ab8500_ldo_audio_reg: ab8500_ldo_audio {
188 regulator-name = "V-AUD";
189 };
190
191 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
192 regulator-name = "V-AMIC1";
193 };
194
195 ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 {
196 regulator-name = "V-AMIC2";
197 };
198
199 ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
200 regulator-name = "V-DMIC";
201 };
202
203 ab8500_ldo_ana_reg: ab8500_ldo_ana {
204 regulator-name = "V-CSI/DSI";
205 };
206 };
207 };
93 }; 208 };
94 }; 209 };
95}; 210};
diff --git a/arch/arm/boot/dts/imx23-olinuxino.dts b/arch/arm/boot/dts/imx23-olinuxino.dts
index 384d8b66f337..7c43b8e70b9f 100644
--- a/arch/arm/boot/dts/imx23-olinuxino.dts
+++ b/arch/arm/boot/dts/imx23-olinuxino.dts
@@ -40,6 +40,15 @@
40 reg = <0>; 40 reg = <0>;
41 fsl,pinmux-ids = < 41 fsl,pinmux-ids = <
42 0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */ 42 0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */
43 >;
44 fsl,drive-strength = <0>;
45 fsl,voltage = <1>;
46 fsl,pull-up = <0>;
47 };
48
49 led_pin_gpio0_17: led_gpio0_17@0 {
50 reg = <0>;
51 fsl,pinmux-ids = <
43 0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */ 52 0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */
44 >; 53 >;
45 fsl,drive-strength = <0>; 54 fsl,drive-strength = <0>;
@@ -47,6 +56,15 @@
47 fsl,pull-up = <0>; 56 fsl,pull-up = <0>;
48 }; 57 };
49 }; 58 };
59
60 ssp1: ssp@80034000 {
61 #address-cells = <1>;
62 #size-cells = <0>;
63 compatible = "fsl,imx23-spi";
64 pinctrl-names = "default";
65 pinctrl-0 = <&spi2_pins_a>;
66 status = "okay";
67 };
50 }; 68 };
51 69
52 apbx@80040000 { 70 apbx@80040000 {
@@ -91,11 +109,12 @@
91 109
92 leds { 110 leds {
93 compatible = "gpio-leds"; 111 compatible = "gpio-leds";
112 pinctrl-names = "default";
113 pinctrl-0 = <&led_pin_gpio0_17>;
94 114
95 user { 115 user {
96 label = "green"; 116 label = "green";
97 gpios = <&gpio2 1 0>; 117 gpios = <&gpio2 1 1>;
98 linux,default-trigger = "default-on";
99 }; 118 };
100 }; 119 };
101}; 120};
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index 6d31aa383460..65415c598a5e 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -279,6 +279,19 @@
279 fsl,voltage = <1>; 279 fsl,voltage = <1>;
280 fsl,pull-up = <0>; 280 fsl,pull-up = <0>;
281 }; 281 };
282
283 spi2_pins_a: spi2@0 {
284 reg = <0>;
285 fsl,pinmux-ids = <
286 0x0182 /* MX23_PAD_GPMI_WRN__SSP2_SCK */
287 0x0142 /* MX23_PAD_GPMI_RDY1__SSP2_CMD */
288 0x0002 /* MX23_PAD_GPMI_D00__SSP2_DATA0 */
289 0x0032 /* MX23_PAD_GPMI_D03__SSP2_DATA3 */
290 >;
291 fsl,drive-strength = <1>;
292 fsl,voltage = <1>;
293 fsl,pull-up = <1>;
294 };
282 }; 295 };
283 296
284 digctl@8001c000 { 297 digctl@8001c000 {
diff --git a/arch/arm/boot/dts/imx25-karo-tx25.dts b/arch/arm/boot/dts/imx25-karo-tx25.dts
new file mode 100644
index 000000000000..d81f8a0b9794
--- /dev/null
+++ b/arch/arm/boot/dts/imx25-karo-tx25.dts
@@ -0,0 +1,44 @@
1/*
2 * Copyright 2012 Sascha Hauer, Pengutronix
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13/include/ "imx25.dtsi"
14
15/ {
16 model = "Ka-Ro TX25";
17 compatible = "karo,imx25-tx25", "fsl,imx25";
18
19 memory {
20 reg = <0x80000000 0x02000000 0x90000000 0x02000000>;
21 };
22
23 soc {
24 aips@43f00000 {
25 uart1: serial@43f90000 {
26 status = "okay";
27 };
28 };
29
30 spba@50000000 {
31 fec: ethernet@50038000 {
32 status = "okay";
33 phy-mode = "rmii";
34 };
35 };
36
37 emi@80000000 {
38 nand@bb000000 {
39 nand-on-flash-bbt;
40 status = "okay";
41 };
42 };
43 };
44};
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
new file mode 100644
index 000000000000..e1b13ebc96d6
--- /dev/null
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -0,0 +1,515 @@
1/*
2 * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 aliases {
16 serial0 = &uart1;
17 serial1 = &uart2;
18 serial2 = &uart3;
19 serial3 = &uart4;
20 serial4 = &uart5;
21 gpio0 = &gpio1;
22 gpio1 = &gpio2;
23 gpio2 = &gpio3;
24 gpio3 = &gpio4;
25 usb0 = &usbotg;
26 usb1 = &usbhost1;
27 };
28
29 asic: asic-interrupt-controller@68000000 {
30 compatible = "fsl,imx25-asic", "fsl,avic";
31 interrupt-controller;
32 #interrupt-cells = <1>;
33 reg = <0x68000000 0x8000000>;
34 };
35
36 clocks {
37 #address-cells = <1>;
38 #size-cells = <0>;
39
40 osc {
41 compatible = "fsl,imx-osc", "fixed-clock";
42 clock-frequency = <24000000>;
43 };
44 };
45
46 soc {
47 #address-cells = <1>;
48 #size-cells = <1>;
49 compatible = "simple-bus";
50 interrupt-parent = <&asic>;
51 ranges;
52
53 aips@43f00000 { /* AIPS1 */
54 compatible = "fsl,aips-bus", "simple-bus";
55 #address-cells = <1>;
56 #size-cells = <1>;
57 reg = <0x43f00000 0x100000>;
58 ranges;
59
60 i2c1: i2c@43f80000 {
61 #address-cells = <1>;
62 #size-cells = <0>;
63 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
64 reg = <0x43f80000 0x4000>;
65 clocks = <&clks 48>;
66 clock-names = "";
67 interrupts = <3>;
68 status = "disabled";
69 };
70
71 i2c3: i2c@43f84000 {
72 #address-cells = <1>;
73 #size-cells = <0>;
74 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
75 reg = <0x43f84000 0x4000>;
76 clocks = <&clks 48>;
77 clock-names = "";
78 interrupts = <10>;
79 status = "disabled";
80 };
81
82 can1: can@43f88000 {
83 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
84 reg = <0x43f88000 0x4000>;
85 interrupts = <43>;
86 clocks = <&clks 75>, <&clks 75>;
87 clock-names = "ipg", "per";
88 status = "disabled";
89 };
90
91 can2: can@43f8c000 {
92 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
93 reg = <0x43f8c000 0x4000>;
94 interrupts = <44>;
95 clocks = <&clks 76>, <&clks 76>;
96 clock-names = "ipg", "per";
97 status = "disabled";
98 };
99
100 uart1: serial@43f90000 {
101 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
102 reg = <0x43f90000 0x4000>;
103 interrupts = <45>;
104 clocks = <&clks 120>, <&clks 57>;
105 clock-names = "ipg", "per";
106 status = "disabled";
107 };
108
109 uart2: serial@43f94000 {
110 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
111 reg = <0x43f94000 0x4000>;
112 interrupts = <32>;
113 clocks = <&clks 121>, <&clks 57>;
114 clock-names = "ipg", "per";
115 status = "disabled";
116 };
117
118 i2c2: i2c@43f98000 {
119 #address-cells = <1>;
120 #size-cells = <0>;
121 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
122 reg = <0x43f98000 0x4000>;
123 clocks = <&clks 48>;
124 clock-names = "";
125 interrupts = <4>;
126 status = "disabled";
127 };
128
129 owire@43f9c000 {
130 #address-cells = <1>;
131 #size-cells = <0>;
132 reg = <0x43f9c000 0x4000>;
133 clocks = <&clks 51>;
134 clock-names = "";
135 interrupts = <2>;
136 status = "disabled";
137 };
138
139 spi1: cspi@43fa4000 {
140 #address-cells = <1>;
141 #size-cells = <0>;
142 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
143 reg = <0x43fa4000 0x4000>;
144 clocks = <&clks 62>;
145 clock-names = "ipg";
146 interrupts = <14>;
147 status = "disabled";
148 };
149
150 kpp@43fa8000 {
151 #address-cells = <1>;
152 #size-cells = <0>;
153 reg = <0x43fa8000 0x4000>;
154 clocks = <&clks 102>;
155 clock-names = "";
156 interrupts = <24>;
157 status = "disabled";
158 };
159
160 iomuxc@43fac000{
161 compatible = "fsl,imx25-iomuxc";
162 reg = <0x43fac000 0x4000>;
163 };
164
165 audmux@43fb0000 {
166 compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
167 reg = <0x43fb0000 0x4000>;
168 status = "disabled";
169 };
170 };
171
172 spba@50000000 {
173 compatible = "fsl,spba-bus", "simple-bus";
174 #address-cells = <1>;
175 #size-cells = <1>;
176 reg = <0x50000000 0x40000>;
177 ranges;
178
179 spi3: cspi@50004000 {
180 #address-cells = <1>;
181 #size-cells = <0>;
182 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
183 reg = <0x50004000 0x4000>;
184 interrupts = <0>;
185 clocks = <&clks 80>;
186 clock-names = "ipg";
187 status = "disabled";
188 };
189
190 uart4: serial@50008000 {
191 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
192 reg = <0x50008000 0x4000>;
193 interrupts = <5>;
194 clocks = <&clks 123>, <&clks 57>;
195 clock-names = "ipg", "per";
196 status = "disabled";
197 };
198
199 uart3: serial@5000c000 {
200 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
201 reg = <0x5000c000 0x4000>;
202 interrupts = <18>;
203 clocks = <&clks 122>, <&clks 57>;
204 clock-names = "ipg", "per";
205 status = "disabled";
206 };
207
208 spi2: cspi@50010000 {
209 #address-cells = <1>;
210 #size-cells = <0>;
211 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
212 reg = <0x50010000 0x4000>;
213 clocks = <&clks 79>;
214 clock-names = "ipg";
215 interrupts = <13>;
216 status = "disabled";
217 };
218
219 ssi2: ssi@50014000 {
220 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
221 reg = <0x50014000 0x4000>;
222 interrupts = <11>;
223 status = "disabled";
224 };
225
226 esai@50018000 {
227 reg = <0x50018000 0x4000>;
228 interrupts = <7>;
229 };
230
231 uart5: serial@5002c000 {
232 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
233 reg = <0x5002c000 0x4000>;
234 interrupts = <40>;
235 clocks = <&clks 124>, <&clks 57>;
236 clock-names = "ipg", "per";
237 status = "disabled";
238 };
239
240 tsc: tsc@50030000 {
241 compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
242 reg = <0x50030000 0x4000>;
243 interrupts = <46>;
244 clocks = <&clks 119>;
245 clock-names = "ipg";
246 status = "disabled";
247 };
248
249 ssi1: ssi@50034000 {
250 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
251 reg = <0x50034000 0x4000>;
252 interrupts = <12>;
253 status = "disabled";
254 };
255
256 fec: ethernet@50038000 {
257 compatible = "fsl,imx25-fec";
258 reg = <0x50038000 0x4000>;
259 interrupts = <57>;
260 clocks = <&clks 88>, <&clks 65>;
261 clock-names = "ipg", "ahb";
262 status = "disabled";
263 };
264 };
265
266 aips@53f00000 { /* AIPS2 */
267 compatible = "fsl,aips-bus", "simple-bus";
268 #address-cells = <1>;
269 #size-cells = <1>;
270 reg = <0x53f00000 0x100000>;
271 ranges;
272
273 clks: ccm@53f80000 {
274 compatible = "fsl,imx25-ccm";
275 reg = <0x53f80000 0x4000>;
276 interrupts = <31>;
277 #clock-cells = <1>;
278 };
279
280 gpt4: timer@53f84000 {
281 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
282 reg = <0x53f84000 0x4000>;
283 clocks = <&clks 9>, <&clks 45>;
284 clock-names = "ipg", "per";
285 interrupts = <1>;
286 };
287
288 gpt3: timer@53f88000 {
289 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
290 reg = <0x53f88000 0x4000>;
291 clocks = <&clks 9>, <&clks 47>;
292 clock-names = "ipg", "per";
293 interrupts = <29>;
294 };
295
296 gpt2: timer@53f8c000 {
297 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
298 reg = <0x53f8c000 0x4000>;
299 clocks = <&clks 9>, <&clks 47>;
300 clock-names = "ipg", "per";
301 interrupts = <53>;
302 };
303
304 gpt1: timer@53f90000 {
305 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
306 reg = <0x53f90000 0x4000>;
307 clocks = <&clks 9>, <&clks 47>;
308 clock-names = "ipg", "per";
309 interrupts = <54>;
310 };
311
312 epit1: timer@53f94000 {
313 compatible = "fsl,imx25-epit";
314 reg = <0x53f94000 0x4000>;
315 interrupts = <28>;
316 };
317
318 epit2: timer@53f98000 {
319 compatible = "fsl,imx25-epit";
320 reg = <0x53f98000 0x4000>;
321 interrupts = <27>;
322 };
323
324 gpio4: gpio@53f9c000 {
325 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
326 reg = <0x53f9c000 0x4000>;
327 interrupts = <23>;
328 gpio-controller;
329 #gpio-cells = <2>;
330 interrupt-controller;
331 #interrupt-cells = <2>;
332 };
333
334 pwm2: pwm@53fa0000 {
335 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
336 #pwm-cells = <2>;
337 reg = <0x53fa0000 0x4000>;
338 clocks = <&clks 106>, <&clks 36>;
339 clock-names = "ipg", "per";
340 interrupts = <36>;
341 };
342
343 gpio3: gpio@53fa4000 {
344 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
345 reg = <0x53fa4000 0x4000>;
346 interrupts = <16>;
347 gpio-controller;
348 #gpio-cells = <2>;
349 interrupt-controller;
350 #interrupt-cells = <2>;
351 };
352
353 pwm3: pwm@53fa8000 {
354 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
355 #pwm-cells = <2>;
356 reg = <0x53fa8000 0x4000>;
357 clocks = <&clks 107>, <&clks 36>;
358 clock-names = "ipg", "per";
359 interrupts = <41>;
360 };
361
362 esdhc1: esdhc@53fb4000 {
363 compatible = "fsl,imx25-esdhc";
364 reg = <0x53fb4000 0x4000>;
365 interrupts = <9>;
366 clocks = <&clks 86>, <&clks 63>, <&clks 45>;
367 clock-names = "ipg", "ahb", "per";
368 status = "disabled";
369 };
370
371 esdhc2: esdhc@53fb8000 {
372 compatible = "fsl,imx25-esdhc";
373 reg = <0x53fb8000 0x4000>;
374 interrupts = <8>;
375 clocks = <&clks 87>, <&clks 64>, <&clks 46>;
376 clock-names = "ipg", "ahb", "per";
377 status = "disabled";
378 };
379
380 lcdc@53fbc000 {
381 reg = <0x53fbc000 0x4000>;
382 interrupts = <39>;
383 clocks = <&clks 103>, <&clks 66>, <&clks 49>;
384 clock-names = "ipg", "ahb", "per";
385 status = "disabled";
386 };
387
388 slcdc@53fc0000 {
389 reg = <0x53fc0000 0x4000>;
390 interrupts = <38>;
391 status = "disabled";
392 };
393
394 pwm4: pwm@53fc8000 {
395 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
396 reg = <0x53fc8000 0x4000>;
397 clocks = <&clks 108>, <&clks 36>;
398 clock-names = "ipg", "per";
399 interrupts = <42>;
400 };
401
402 gpio1: gpio@53fcc000 {
403 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
404 reg = <0x53fcc000 0x4000>;
405 interrupts = <52>;
406 gpio-controller;
407 #gpio-cells = <2>;
408 interrupt-controller;
409 #interrupt-cells = <2>;
410 };
411
412 gpio2: gpio@53fd0000 {
413 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
414 reg = <0x53fd0000 0x4000>;
415 interrupts = <51>;
416 gpio-controller;
417 #gpio-cells = <2>;
418 interrupt-controller;
419 #interrupt-cells = <2>;
420 };
421
422 sdma@53fd4000 {
423 compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
424 reg = <0x53fd4000 0x4000>;
425 clocks = <&clks 112>, <&clks 68>;
426 clock-names = "ipg", "ahb";
427 interrupts = <34>;
428 };
429
430 wdog@53fdc000 {
431 compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
432 reg = <0x53fdc000 0x4000>;
433 clocks = <&clks 126>;
434 clock-names = "";
435 interrupts = <55>;
436 };
437
438 pwm1: pwm@53fe0000 {
439 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
440 #pwm-cells = <2>;
441 reg = <0x53fe0000 0x4000>;
442 clocks = <&clks 105>, <&clks 36>;
443 clock-names = "ipg", "per";
444 interrupts = <26>;
445 };
446
447 usbphy1: usbphy@1 {
448 compatible = "nop-usbphy";
449 status = "disabled";
450 };
451
452 usbphy2: usbphy@2 {
453 compatible = "nop-usbphy";
454 status = "disabled";
455 };
456
457 usbotg: usb@53ff4000 {
458 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
459 reg = <0x53ff4000 0x0200>;
460 interrupts = <37>;
461 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
462 clock-names = "ipg", "ahb", "per";
463 fsl,usbmisc = <&usbmisc 0>;
464 status = "disabled";
465 };
466
467 usbhost1: usb@53ff4400 {
468 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
469 reg = <0x53ff4400 0x0200>;
470 interrupts = <35>;
471 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
472 clock-names = "ipg", "ahb", "per";
473 fsl,usbmisc = <&usbmisc 1>;
474 status = "disabled";
475 };
476
477 usbmisc: usbmisc@53ff4600 {
478 #index-cells = <1>;
479 compatible = "fsl,imx25-usbmisc";
480 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
481 clock-names = "ipg", "ahb", "per";
482 reg = <0x53ff4600 0x00f>;
483 status = "disabled";
484 };
485
486 dryice@53ffc000 {
487 compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
488 reg = <0x53ffc000 0x4000>;
489 clocks = <&clks 81>;
490 clock-names = "ipg";
491 interrupts = <25>;
492 };
493 };
494
495 emi@80000000 {
496 compatible = "fsl,emi-bus", "simple-bus";
497 #address-cells = <1>;
498 #size-cells = <1>;
499 reg = <0x80000000 0x3b002000>;
500 ranges;
501
502 nand@bb000000 {
503 #address-cells = <1>;
504 #size-cells = <1>;
505
506 compatible = "fsl,imx25-nand";
507 reg = <0xbb000000 0x2000>;
508 clocks = <&clks 50>;
509 clock-names = "";
510 interrupts = <33>;
511 status = "disabled";
512 };
513 };
514 };
515};
diff --git a/arch/arm/boot/dts/imx27-apf27.dts b/arch/arm/boot/dts/imx27-apf27.dts
new file mode 100644
index 000000000000..c0327c054de2
--- /dev/null
+++ b/arch/arm/boot/dts/imx27-apf27.dts
@@ -0,0 +1,89 @@
1/*
2 * Copyright 2012 Philippe Reynes <tremyfr@yahoo.fr>
3 * Copyright 2012 Armadeus Systems <support@armadeus.com>
4 *
5 * Based on code which is: Copyright 2012 Sascha Hauer, Pengutronix
6 *
7 * The code contained herein is licensed under the GNU General Public
8 * License. You may obtain a copy of the GNU General Public License
9 * Version 2 or later at the following locations:
10 *
11 * http://www.opensource.org/licenses/gpl-license.html
12 * http://www.gnu.org/copyleft/gpl.html
13 */
14
15/dts-v1/;
16/include/ "imx27.dtsi"
17
18/ {
19 model = "Armadeus Systems APF27 module";
20 compatible = "armadeus,imx27-apf27", "fsl,imx27";
21
22 memory {
23 reg = <0xa0000000 0x04000000>;
24 };
25
26 clocks {
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 osc26m {
31 compatible = "fsl,imx-osc26m", "fixed-clock";
32 clock-frequency = <0>;
33 };
34 };
35
36 soc {
37 aipi@10000000 {
38 serial@1000a000 {
39 status = "okay";
40 };
41
42 ethernet@1002b000 {
43 status = "okay";
44 };
45 };
46
47 nand@d8000000 {
48 status = "okay";
49 nand-bus-width = <16>;
50 nand-ecc-mode = "hw";
51 nand-on-flash-bbt;
52
53 partition@0 {
54 label = "u-boot";
55 reg = <0x0 0x100000>;
56 };
57
58 partition@100000 {
59 label = "env";
60 reg = <0x100000 0x80000>;
61 };
62
63 partition@180000 {
64 label = "env2";
65 reg = <0x180000 0x80000>;
66 };
67
68 partition@200000 {
69 label = "firmware";
70 reg = <0x200000 0x80000>;
71 };
72
73 partition@280000 {
74 label = "dtb";
75 reg = <0x280000 0x80000>;
76 };
77
78 partition@300000 {
79 label = "kernel";
80 reg = <0x300000 0x500000>;
81 };
82
83 partition@800000 {
84 label = "rootfs";
85 reg = <0x800000 0xf800000>;
86 };
87 };
88 };
89};
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index 67d672792b0d..b8d3905915ac 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -58,7 +58,7 @@
58 reg = <0x10000000 0x10000000>; 58 reg = <0x10000000 0x10000000>;
59 ranges; 59 ranges;
60 60
61 wdog@10002000 { 61 wdog: wdog@10002000 {
62 compatible = "fsl,imx27-wdt", "fsl,imx21-wdt"; 62 compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
63 reg = <0x10002000 0x4000>; 63 reg = <0x10002000 0x4000>;
64 interrupts = <27>; 64 interrupts = <27>;
@@ -218,7 +218,8 @@
218 status = "disabled"; 218 status = "disabled";
219 }; 219 };
220 }; 220 };
221 nand@d8000000 { 221
222 nfc: nand@d8000000 {
222 #address-cells = <1>; 223 #address-cells = <1>;
223 #size-cells = <1>; 224 #size-cells = <1>;
224 225
diff --git a/arch/arm/boot/dts/imx28-apf28.dts b/arch/arm/boot/dts/imx28-apf28.dts
new file mode 100644
index 000000000000..7eb075876c4c
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-apf28.dts
@@ -0,0 +1,85 @@
1/*
2 * Copyright 2012 Armadeus Systems - <support@armadeus.com>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13/include/ "imx28.dtsi"
14
15/ {
16 model = "Armadeus Systems APF28 module";
17 compatible = "armadeus,imx28-apf28", "fsl,imx28";
18
19 memory {
20 reg = <0x40000000 0x08000000>;
21 };
22
23 apb@80000000 {
24 apbh@80000000 {
25 gpmi-nand@8000c000 {
26 pinctrl-names = "default";
27 pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>;
28 status = "okay";
29
30 partition@0 {
31 label = "u-boot";
32 reg = <0x0 0x300000>;
33 };
34
35 partition@300000 {
36 label = "env";
37 reg = <0x300000 0x80000>;
38 };
39
40 partition@380000 {
41 label = "env2";
42 reg = <0x380000 0x80000>;
43 };
44
45 partition@400000 {
46 label = "dtb";
47 reg = <0x400000 0x80000>;
48 };
49
50 partition@480000 {
51 label = "splash";
52 reg = <0x480000 0x80000>;
53 };
54
55 partition@500000 {
56 label = "kernel";
57 reg = <0x500000 0x800000>;
58 };
59
60 partition@d00000 {
61 label = "rootfs";
62 reg = <0xd00000 0xf300000>;
63 };
64 };
65 };
66
67 apbx@80040000 {
68 duart: serial@80074000 {
69 pinctrl-names = "default";
70 pinctrl-0 = <&duart_pins_a>;
71 status = "okay";
72 };
73 };
74 };
75
76 ahb@80080000 {
77 mac0: ethernet@800f0000 {
78 phy-mode = "rmii";
79 pinctrl-names = "default";
80 pinctrl-0 = <&mac0_pins_a>;
81 phy-reset-gpios = <&gpio4 13 0>;
82 status = "okay";
83 };
84 };
85};
diff --git a/arch/arm/boot/dts/imx28-apf28dev.dts b/arch/arm/boot/dts/imx28-apf28dev.dts
new file mode 100644
index 000000000000..6d8865bfb4b7
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-apf28dev.dts
@@ -0,0 +1,154 @@
1/*
2 * Copyright 2012 Armadeus Systems - <support@armadeus.com>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/* APF28Dev is a docking board for the APF28 SOM */
13/include/ "imx28-apf28.dts"
14
15/ {
16 model = "Armadeus Systems APF28Dev docking/development board";
17 compatible = "armadeus,imx28-apf28dev", "armadeus,imx28-apf28", "fsl,imx28";
18
19 apb@80000000 {
20 apbh@80000000 {
21 ssp0: ssp@80010000 {
22 compatible = "fsl,imx28-mmc";
23 pinctrl-names = "default";
24 pinctrl-0 = <&mmc0_4bit_pins_a
25 &mmc0_cd_cfg &mmc0_sck_cfg>;
26 bus-width = <4>;
27 status = "okay";
28 };
29
30 ssp2: ssp@80014000 {
31 compatible = "fsl,imx28-spi";
32 pinctrl-names = "default";
33 pinctrl-0 = <&spi2_pins_a>;
34 status = "okay";
35 };
36
37 pinctrl@80018000 {
38 pinctrl-names = "default";
39 pinctrl-0 = <&hog_pins_apf28dev>;
40
41 hog_pins_apf28dev: hog@0 {
42 reg = <0>;
43 fsl,pinmux-ids = <
44 0x1103 /* MX28_PAD_LCD_D16__GPIO_1_16 */
45 0x1113 /* MX28_PAD_LCD_D17__GPIO_1_17 */
46 0x1123 /* MX28_PAD_LCD_D18__GPIO_1_18 */
47 0x1133 /* MX28_PAD_LCD_D19__GPIO_1_19 */
48 0x1143 /* MX28_PAD_LCD_D20__GPIO_1_20 */
49 0x1153 /* MX28_PAD_LCD_D21__GPIO_1_21 */
50 0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */
51 >;
52 fsl,drive-strength = <0>;
53 fsl,voltage = <1>;
54 fsl,pull-up = <0>;
55 };
56
57 lcdif_pins_apf28dev: lcdif-apf28dev@0 {
58 reg = <0>;
59 fsl,pinmux-ids = <
60 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */
61 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */
62 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */
63 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */
64 >;
65 fsl,drive-strength = <0>;
66 fsl,voltage = <1>;
67 fsl,pull-up = <0>;
68 };
69 };
70
71 lcdif@80030000 {
72 pinctrl-names = "default";
73 pinctrl-0 = <&lcdif_16bit_pins_a
74 &lcdif_pins_apf28dev>;
75 status = "okay";
76 };
77 };
78
79 apbx@80040000 {
80 lradc@80050000 {
81 status = "okay";
82 };
83
84 i2c0: i2c@80058000 {
85 pinctrl-names = "default";
86 pinctrl-0 = <&i2c0_pins_a>;
87 status = "okay";
88 };
89
90 pwm: pwm@80064000 {
91 pinctrl-names = "default";
92 pinctrl-0 = <&pwm3_pins_a &pwm4_pins_a>;
93 status = "okay";
94 };
95
96 usbphy0: usbphy@8007c000 {
97 status = "okay";
98 };
99
100 usbphy1: usbphy@8007e000 {
101 status = "okay";
102 };
103 };
104 };
105
106 ahb@80080000 {
107 usb0: usb@80080000 {
108 vbus-supply = <&reg_usb0_vbus>;
109 status = "okay";
110 };
111
112 usb1: usb@80090000 {
113 status = "okay";
114 };
115
116 mac1: ethernet@800f4000 {
117 phy-mode = "rmii";
118 pinctrl-names = "default";
119 pinctrl-0 = <&mac1_pins_a>;
120 phy-reset-gpios = <&gpio0 23 0>;
121 status = "okay";
122 };
123 };
124
125 regulators {
126 compatible = "simple-bus";
127
128 reg_usb0_vbus: usb0_vbus {
129 compatible = "regulator-fixed";
130 regulator-name = "usb0_vbus";
131 regulator-min-microvolt = <5000000>;
132 regulator-max-microvolt = <5000000>;
133 gpio = <&gpio1 23 1>;
134 };
135 };
136
137 leds {
138 compatible = "gpio-leds";
139
140 user {
141 label = "Heartbeat";
142 gpios = <&gpio0 21 0>;
143 linux,default-trigger = "heartbeat";
144 };
145 };
146
147 backlight {
148 compatible = "pwm-backlight";
149
150 pwms = <&pwm 3 191000>;
151 brightness-levels = <0 4 8 16 32 64 128 255>;
152 default-brightness-level = <6>;
153 };
154};
diff --git a/arch/arm/boot/dts/imx28-cfa10036.dts b/arch/arm/boot/dts/imx28-cfa10036.dts
index c03a577beca3..1594694532b9 100644
--- a/arch/arm/boot/dts/imx28-cfa10036.dts
+++ b/arch/arm/boot/dts/imx28-cfa10036.dts
@@ -22,6 +22,31 @@
22 22
23 apb@80000000 { 23 apb@80000000 {
24 apbh@80000000 { 24 apbh@80000000 {
25 pinctrl@80018000 {
26 pinctrl-names = "default";
27 pinctrl-0 = <&hog_pins_cfa10036>;
28
29 hog_pins_cfa10036: hog-10036@0 {
30 reg = <0>;
31 fsl,pinmux-ids = <
32 0x2073 /* MX28_PAD_SSP0_D7__GPIO_2_7 */
33 >;
34 fsl,drive-strength = <0>;
35 fsl,voltage = <1>;
36 fsl,pull-up = <0>;
37 };
38
39 led_pins_cfa10036: leds-10036@0 {
40 reg = <0>;
41 fsl,pinmux-ids = <
42 0x3043 /* MX28_PAD_AUART1_RX__GPIO_3_4 */
43 >;
44 fsl,drive-strength = <0>;
45 fsl,voltage = <1>;
46 fsl,pull-up = <0>;
47 };
48 };
49
25 ssp0: ssp@80010000 { 50 ssp0: ssp@80010000 {
26 compatible = "fsl,imx28-mmc"; 51 compatible = "fsl,imx28-mmc";
27 pinctrl-names = "default"; 52 pinctrl-names = "default";
@@ -33,16 +58,37 @@
33 }; 58 };
34 59
35 apbx@80040000 { 60 apbx@80040000 {
61 pwm: pwm@80064000 {
62 pinctrl-names = "default";
63 pinctrl-0 = <&pwm4_pins_a>;
64 status = "okay";
65 };
66
36 duart: serial@80074000 { 67 duart: serial@80074000 {
37 pinctrl-names = "default"; 68 pinctrl-names = "default";
38 pinctrl-0 = <&duart_pins_b>; 69 pinctrl-0 = <&duart_pins_b>;
39 status = "okay"; 70 status = "okay";
40 }; 71 };
72
73 i2c0: i2c@80058000 {
74 pinctrl-names = "default";
75 pinctrl-0 = <&i2c0_pins_b>;
76 status = "okay";
77
78 ssd1307: oled@3c {
79 compatible = "solomon,ssd1307fb-i2c";
80 reg = <0x3c>;
81 pwms = <&pwm 4 3000>;
82 reset-gpios = <&gpio2 7 0>;
83 };
84 };
41 }; 85 };
42 }; 86 };
43 87
44 leds { 88 leds {
45 compatible = "gpio-leds"; 89 compatible = "gpio-leds";
90 pinctrl-names = "default";
91 pinctrl-0 = <&led_pins_cfa10036>;
46 92
47 power { 93 power {
48 gpios = <&gpio3 4 1>; 94 gpios = <&gpio3 4 1>;
diff --git a/arch/arm/boot/dts/imx28-cfa10049.dts b/arch/arm/boot/dts/imx28-cfa10049.dts
index 05c892e931e3..b222614ac9e0 100644
--- a/arch/arm/boot/dts/imx28-cfa10049.dts
+++ b/arch/arm/boot/dts/imx28-cfa10049.dts
@@ -22,6 +22,22 @@
22 apb@80000000 { 22 apb@80000000 {
23 apbh@80000000 { 23 apbh@80000000 {
24 pinctrl@80018000 { 24 pinctrl@80018000 {
25 pinctrl-names = "default", "default";
26 pinctrl-1 = <&hog_pins_cfa10049>;
27
28 hog_pins_cfa10049: hog-10049@0 {
29 reg = <0>;
30 fsl,pinmux-ids = <
31 0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */
32 0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */
33 0x1173 /* MX28_PAD_LCD_D22__GPIO_1_23 */
34 0x2153 /* MX28_PAD_SSP2_D5__GPIO_2_21 */
35 >;
36 fsl,drive-strength = <0>;
37 fsl,voltage = <1>;
38 fsl,pull-up = <0>;
39 };
40
25 spi3_pins_cfa10049: spi3-cfa10049@0 { 41 spi3_pins_cfa10049: spi3-cfa10049@0 {
26 reg = <0>; 42 reg = <0>;
27 fsl,pinmux-ids = < 43 fsl,pinmux-ids = <
@@ -29,6 +45,7 @@
29 0x01c1 /* MX28_PAD_GPMI_RESETN__SSP3_CMD */ 45 0x01c1 /* MX28_PAD_GPMI_RESETN__SSP3_CMD */
30 0x0111 /* MX28_PAD_GPMI_CE1N__SSP3_D3 */ 46 0x0111 /* MX28_PAD_GPMI_CE1N__SSP3_D3 */
31 0x01a2 /* MX28_PAD_GPMI_ALE__SSP3_D4 */ 47 0x01a2 /* MX28_PAD_GPMI_ALE__SSP3_D4 */
48 0x01b2 /* MX28_PAD_GPMI_CLE__SSP3_D5 */
32 >; 49 >;
33 fsl,drive-strength = <1>; 50 fsl,drive-strength = <1>;
34 fsl,voltage = <1>; 51 fsl,voltage = <1>;
@@ -60,6 +77,11 @@
60 spi-max-frequency = <100000>; 77 spi-max-frequency = <100000>;
61 }; 78 };
62 79
80 dac0: dh2228@2 {
81 compatible = "rohm,dh2228fv";
82 reg = <2>;
83 spi-max-frequency = <100000>;
84 };
63 }; 85 };
64 }; 86 };
65 87
@@ -96,4 +118,15 @@
96 gpio = <&gpio0 7 1>; 118 gpio = <&gpio0 7 1>;
97 }; 119 };
98 }; 120 };
121
122 ahb@80080000 {
123 mac0: ethernet@800f0000 {
124 phy-mode = "rmii";
125 pinctrl-names = "default";
126 pinctrl-0 = <&mac0_pins_a>;
127 phy-reset-gpios = <&gpio2 21 0>;
128 phy-reset-duration = <100>;
129 status = "okay";
130 };
131 };
99}; 132};
diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts
index a0ad71ca3a44..2da316e04409 100644
--- a/arch/arm/boot/dts/imx28-evk.dts
+++ b/arch/arm/boot/dts/imx28-evk.dts
@@ -76,7 +76,6 @@
76 0x20c3 /* MX28_PAD_SSP1_SCK__GPIO_2_12 */ 76 0x20c3 /* MX28_PAD_SSP1_SCK__GPIO_2_12 */
77 0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */ 77 0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */
78 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */ 78 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
79 0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
80 0x3083 /* MX28_PAD_AUART2_RX__GPIO_3_8 */ 79 0x3083 /* MX28_PAD_AUART2_RX__GPIO_3_8 */
81 0x3093 /* MX28_PAD_AUART2_TX__GPIO_3_9 */ 80 0x3093 /* MX28_PAD_AUART2_TX__GPIO_3_9 */
82 >; 81 >;
@@ -85,6 +84,16 @@
85 fsl,pull-up = <0>; 84 fsl,pull-up = <0>;
86 }; 85 };
87 86
87 led_pin_gpio3_5: led_gpio3_5@0 {
88 reg = <0>;
89 fsl,pinmux-ids = <
90 0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
91 >;
92 fsl,drive-strength = <0>;
93 fsl,voltage = <1>;
94 fsl,pull-up = <0>;
95 };
96
88 gpmi_pins_evk: gpmi-nand-evk@0 { 97 gpmi_pins_evk: gpmi-nand-evk@0 {
89 reg = <0>; 98 reg = <0>;
90 fsl,pinmux-ids = < 99 fsl,pinmux-ids = <
@@ -288,6 +297,8 @@
288 297
289 leds { 298 leds {
290 compatible = "gpio-leds"; 299 compatible = "gpio-leds";
300 pinctrl-names = "default";
301 pinctrl-0 = <&led_pin_gpio3_5>;
291 302
292 user { 303 user {
293 label = "Heartbeat"; 304 label = "Heartbeat";
diff --git a/arch/arm/boot/dts/imx28-sps1.dts b/arch/arm/boot/dts/imx28-sps1.dts
new file mode 100644
index 000000000000..e6cde8aa7fff
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-sps1.dts
@@ -0,0 +1,169 @@
1/*
2 * Copyright (C) 2012 Marek Vasut <marex@denx.de>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13/include/ "imx28.dtsi"
14
15/ {
16 model = "SchulerControl GmbH, SC SPS 1";
17 compatible = "schulercontrol,imx28-sps1", "fsl,imx28";
18
19 memory {
20 reg = <0x40000000 0x08000000>;
21 };
22
23 apb@80000000 {
24 apbh@80000000 {
25 pinctrl@80018000 {
26 pinctrl-names = "default";
27 pinctrl-0 = <&hog_pins_a>;
28
29 hog_pins_a: hog-gpios@0 {
30 reg = <0>;
31 fsl,pinmux-ids = <
32 0x0003 /* MX28_PAD_GPMI_D00__GPIO_0_0 */
33 0x0033 /* MX28_PAD_GPMI_D03__GPIO_0_3 */
34 0x0063 /* MX28_PAD_GPMI_D06__GPIO_0_6 */
35 >;
36 fsl,drive-strength = <0>;
37 fsl,voltage = <1>;
38 fsl,pull-up = <0>;
39 };
40
41 };
42
43 ssp0: ssp@80010000 {
44 compatible = "fsl,imx28-mmc";
45 pinctrl-names = "default";
46 pinctrl-0 = <&mmc0_4bit_pins_a>;
47 bus-width = <4>;
48 status = "okay";
49 };
50
51 ssp2: ssp@80014000 {
52 #address-cells = <1>;
53 #size-cells = <0>;
54 compatible = "fsl,imx28-spi";
55 pinctrl-names = "default";
56 pinctrl-0 = <&spi2_pins_a>;
57 status = "okay";
58
59 flash: m25p80@0 {
60 #address-cells = <1>;
61 #size-cells = <1>;
62 compatible = "everspin,mr25h256", "mr25h256";
63 spi-max-frequency = <40000000>;
64 reg = <0>;
65 };
66 };
67 };
68
69 apbx@80040000 {
70 i2c0: i2c@80058000 {
71 pinctrl-names = "default";
72 pinctrl-0 = <&i2c0_pins_a>;
73 clock-frequency = <400000>;
74 status = "okay";
75
76 rtc: rtc@51 {
77 compatible = "nxp,pcf8563";
78 reg = <0x51>;
79 };
80
81 eeprom: eeprom@52 {
82 compatible = "atmel,24c64";
83 reg = <0x52>;
84 pagesize = <32>;
85 };
86 };
87
88 duart: serial@80074000 {
89 pinctrl-names = "default";
90 pinctrl-0 = <&duart_pins_a>;
91 status = "okay";
92 };
93
94 usbphy0: usbphy@8007c000 {
95 status = "okay";
96 };
97
98 auart0: serial@8006a000 {
99 pinctrl-names = "default";
100 pinctrl-0 = <&auart0_pins_a>;
101 status = "okay";
102 };
103 };
104 };
105
106 ahb@80080000 {
107 usb0: usb@80080000 {
108 vbus-supply = <&reg_usb0_vbus>;
109 pinctrl-names = "default";
110 pinctrl-0 = <&usbphy0_pins_b>;
111 status = "okay";
112 };
113
114 mac0: ethernet@800f0000 {
115 phy-mode = "rmii";
116 pinctrl-names = "default";
117 pinctrl-0 = <&mac0_pins_a>;
118 status = "okay";
119 };
120
121 mac1: ethernet@800f4000 {
122 phy-mode = "rmii";
123 pinctrl-names = "default";
124 pinctrl-0 = <&mac1_pins_a>;
125 status = "okay";
126 };
127 };
128
129 regulators {
130 compatible = "simple-bus";
131
132 reg_usb0_vbus: usb0_vbus {
133 compatible = "regulator-fixed";
134 regulator-name = "usb0_vbus";
135 regulator-min-microvolt = <5000000>;
136 regulator-max-microvolt = <5000000>;
137 gpio = <&gpio3 9 0>;
138 };
139 };
140
141 leds {
142 #address-cells = <1>;
143 #size-cells = <0>;
144 compatible = "gpio-leds";
145 status = "okay";
146
147 led@1 {
148 label = "sps1-1:yellow:user";
149 gpios = <&gpio0 6 0>;
150 linux,default-trigger = "heartbeat";
151 reg = <0>;
152 };
153
154 led@2 {
155 label = "sps1-2:red:user";
156 gpios = <&gpio0 3 0>;
157 linux,default-trigger = "heartbeat";
158 reg = <1>;
159 };
160
161 led@3 {
162 label = "sps1-3:red:user";
163 gpios = <&gpio0 0 0>;
164 default-trigger = "heartbeat";
165 reg = <2>;
166 };
167
168 };
169};
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index b4587b27ae42..13b7053d799e 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -492,6 +492,16 @@
492 fsl,pull-up = <0>; 492 fsl,pull-up = <0>;
493 }; 493 };
494 494
495 pwm3_pins_a: pwm3@0 {
496 reg = <0>;
497 fsl,pinmux-ids = <
498 0x31c0 /* MX28_PAD_PWM3__PWM_3 */
499 >;
500 fsl,drive-strength = <0>;
501 fsl,voltage = <1>;
502 fsl,pull-up = <0>;
503 };
504
495 pwm4_pins_a: pwm4@0 { 505 pwm4_pins_a: pwm4@0 {
496 reg = <0>; 506 reg = <0>;
497 fsl,pinmux-ids = < 507 fsl,pinmux-ids = <
@@ -535,6 +545,31 @@
535 fsl,pull-up = <0>; 545 fsl,pull-up = <0>;
536 }; 546 };
537 547
548 lcdif_16bit_pins_a: lcdif-16bit@0 {
549 reg = <0>;
550 fsl,pinmux-ids = <
551 0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */
552 0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */
553 0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */
554 0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */
555 0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */
556 0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */
557 0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */
558 0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */
559 0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */
560 0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */
561 0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */
562 0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */
563 0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */
564 0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */
565 0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */
566 0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */
567 >;
568 fsl,drive-strength = <0>;
569 fsl,voltage = <1>;
570 fsl,pull-up = <0>;
571 };
572
538 can0_pins_a: can0@0 { 573 can0_pins_a: can0@0 {
539 reg = <0>; 574 reg = <0>;
540 fsl,pinmux-ids = < 575 fsl,pinmux-ids = <
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 2781e47cff0d..1f5d45eff45e 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -83,7 +83,7 @@
83 reg = <0x70000000 0x40000>; 83 reg = <0x70000000 0x40000>;
84 ranges; 84 ranges;
85 85
86 esdhc@70004000 { /* ESDHC1 */ 86 esdhc1: esdhc@70004000 {
87 compatible = "fsl,imx51-esdhc"; 87 compatible = "fsl,imx51-esdhc";
88 reg = <0x70004000 0x4000>; 88 reg = <0x70004000 0x4000>;
89 interrupts = <1>; 89 interrupts = <1>;
@@ -92,12 +92,13 @@
92 status = "disabled"; 92 status = "disabled";
93 }; 93 };
94 94
95 esdhc@70008000 { /* ESDHC2 */ 95 esdhc2: esdhc@70008000 {
96 compatible = "fsl,imx51-esdhc"; 96 compatible = "fsl,imx51-esdhc";
97 reg = <0x70008000 0x4000>; 97 reg = <0x70008000 0x4000>;
98 interrupts = <2>; 98 interrupts = <2>;
99 clocks = <&clks 45>, <&clks 0>, <&clks 72>; 99 clocks = <&clks 45>, <&clks 0>, <&clks 72>;
100 clock-names = "ipg", "ahb", "per"; 100 clock-names = "ipg", "ahb", "per";
101 bus-width = <4>;
101 status = "disabled"; 102 status = "disabled";
102 }; 103 };
103 104
@@ -110,7 +111,7 @@
110 status = "disabled"; 111 status = "disabled";
111 }; 112 };
112 113
113 ecspi@70010000 { /* ECSPI1 */ 114 ecspi1: ecspi@70010000 {
114 #address-cells = <1>; 115 #address-cells = <1>;
115 #size-cells = <0>; 116 #size-cells = <0>;
116 compatible = "fsl,imx51-ecspi"; 117 compatible = "fsl,imx51-ecspi";
@@ -131,47 +132,49 @@
131 status = "disabled"; 132 status = "disabled";
132 }; 133 };
133 134
134 esdhc@70020000 { /* ESDHC3 */ 135 esdhc3: esdhc@70020000 {
135 compatible = "fsl,imx51-esdhc"; 136 compatible = "fsl,imx51-esdhc";
136 reg = <0x70020000 0x4000>; 137 reg = <0x70020000 0x4000>;
137 interrupts = <3>; 138 interrupts = <3>;
138 clocks = <&clks 46>, <&clks 0>, <&clks 73>; 139 clocks = <&clks 46>, <&clks 0>, <&clks 73>;
139 clock-names = "ipg", "ahb", "per"; 140 clock-names = "ipg", "ahb", "per";
141 bus-width = <4>;
140 status = "disabled"; 142 status = "disabled";
141 }; 143 };
142 144
143 esdhc@70024000 { /* ESDHC4 */ 145 esdhc4: esdhc@70024000 {
144 compatible = "fsl,imx51-esdhc"; 146 compatible = "fsl,imx51-esdhc";
145 reg = <0x70024000 0x4000>; 147 reg = <0x70024000 0x4000>;
146 interrupts = <4>; 148 interrupts = <4>;
147 clocks = <&clks 47>, <&clks 0>, <&clks 74>; 149 clocks = <&clks 47>, <&clks 0>, <&clks 74>;
148 clock-names = "ipg", "ahb", "per"; 150 clock-names = "ipg", "ahb", "per";
151 bus-width = <4>;
149 status = "disabled"; 152 status = "disabled";
150 }; 153 };
151 }; 154 };
152 155
153 usb@73f80000 { 156 usbotg: usb@73f80000 {
154 compatible = "fsl,imx51-usb", "fsl,imx27-usb"; 157 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
155 reg = <0x73f80000 0x0200>; 158 reg = <0x73f80000 0x0200>;
156 interrupts = <18>; 159 interrupts = <18>;
157 status = "disabled"; 160 status = "disabled";
158 }; 161 };
159 162
160 usb@73f80200 { 163 usbh1: usb@73f80200 {
161 compatible = "fsl,imx51-usb", "fsl,imx27-usb"; 164 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
162 reg = <0x73f80200 0x0200>; 165 reg = <0x73f80200 0x0200>;
163 interrupts = <14>; 166 interrupts = <14>;
164 status = "disabled"; 167 status = "disabled";
165 }; 168 };
166 169
167 usb@73f80400 { 170 usbh2: usb@73f80400 {
168 compatible = "fsl,imx51-usb", "fsl,imx27-usb"; 171 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
169 reg = <0x73f80400 0x0200>; 172 reg = <0x73f80400 0x0200>;
170 interrupts = <16>; 173 interrupts = <16>;
171 status = "disabled"; 174 status = "disabled";
172 }; 175 };
173 176
174 usb@73f80600 { 177 usbh3: usb@73f80600 {
175 compatible = "fsl,imx51-usb", "fsl,imx27-usb"; 178 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
176 reg = <0x73f80600 0x0200>; 179 reg = <0x73f80600 0x0200>;
177 interrupts = <17>; 180 interrupts = <17>;
@@ -218,14 +221,14 @@
218 #interrupt-cells = <2>; 221 #interrupt-cells = <2>;
219 }; 222 };
220 223
221 wdog@73f98000 { /* WDOG1 */ 224 wdog1: wdog@73f98000 {
222 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; 225 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
223 reg = <0x73f98000 0x4000>; 226 reg = <0x73f98000 0x4000>;
224 interrupts = <58>; 227 interrupts = <58>;
225 clocks = <&clks 0>; 228 clocks = <&clks 0>;
226 }; 229 };
227 230
228 wdog@73f9c000 { /* WDOG2 */ 231 wdog2: wdog@73f9c000 {
229 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; 232 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
230 reg = <0x73f9c000 0x4000>; 233 reg = <0x73f9c000 0x4000>;
231 interrupts = <59>; 234 interrupts = <59>;
@@ -233,7 +236,7 @@
233 status = "disabled"; 236 status = "disabled";
234 }; 237 };
235 238
236 iomuxc@73fa8000 { 239 iomuxc: iomuxc@73fa8000 {
237 compatible = "fsl,imx51-iomuxc"; 240 compatible = "fsl,imx51-iomuxc";
238 reg = <0x73fa8000 0x4000>; 241 reg = <0x73fa8000 0x4000>;
239 242
@@ -460,7 +463,7 @@
460 reg = <0x80000000 0x10000000>; 463 reg = <0x80000000 0x10000000>;
461 ranges; 464 ranges;
462 465
463 ecspi@83fac000 { /* ECSPI2 */ 466 ecspi2: ecspi@83fac000 {
464 #address-cells = <1>; 467 #address-cells = <1>;
465 #size-cells = <0>; 468 #size-cells = <0>;
466 compatible = "fsl,imx51-ecspi"; 469 compatible = "fsl,imx51-ecspi";
@@ -471,7 +474,7 @@
471 status = "disabled"; 474 status = "disabled";
472 }; 475 };
473 476
474 sdma@83fb0000 { 477 sdma: sdma@83fb0000 {
475 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; 478 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
476 reg = <0x83fb0000 0x4000>; 479 reg = <0x83fb0000 0x4000>;
477 interrupts = <6>; 480 interrupts = <6>;
@@ -480,7 +483,7 @@
480 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin"; 483 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
481 }; 484 };
482 485
483 cspi@83fc0000 { 486 cspi: cspi@83fc0000 {
484 #address-cells = <1>; 487 #address-cells = <1>;
485 #size-cells = <0>; 488 #size-cells = <0>;
486 compatible = "fsl,imx51-cspi", "fsl,imx35-cspi"; 489 compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
@@ -491,7 +494,7 @@
491 status = "disabled"; 494 status = "disabled";
492 }; 495 };
493 496
494 i2c@83fc4000 { /* I2C2 */ 497 i2c2: i2c@83fc4000 {
495 #address-cells = <1>; 498 #address-cells = <1>;
496 #size-cells = <0>; 499 #size-cells = <0>;
497 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; 500 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
@@ -501,7 +504,7 @@
501 status = "disabled"; 504 status = "disabled";
502 }; 505 };
503 506
504 i2c@83fc8000 { /* I2C1 */ 507 i2c1: i2c@83fc8000 {
505 #address-cells = <1>; 508 #address-cells = <1>;
506 #size-cells = <0>; 509 #size-cells = <0>;
507 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; 510 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
@@ -521,13 +524,13 @@
521 status = "disabled"; 524 status = "disabled";
522 }; 525 };
523 526
524 audmux@83fd0000 { 527 audmux: audmux@83fd0000 {
525 compatible = "fsl,imx51-audmux", "fsl,imx31-audmux"; 528 compatible = "fsl,imx51-audmux", "fsl,imx31-audmux";
526 reg = <0x83fd0000 0x4000>; 529 reg = <0x83fd0000 0x4000>;
527 status = "disabled"; 530 status = "disabled";
528 }; 531 };
529 532
530 nand@83fdb000 { 533 nfc: nand@83fdb000 {
531 compatible = "fsl,imx51-nand"; 534 compatible = "fsl,imx51-nand";
532 reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>; 535 reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>;
533 interrupts = <8>; 536 interrupts = <8>;
@@ -545,7 +548,7 @@
545 status = "disabled"; 548 status = "disabled";
546 }; 549 };
547 550
548 ethernet@83fec000 { 551 fec: ethernet@83fec000 {
549 compatible = "fsl,imx51-fec", "fsl,imx27-fec"; 552 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
550 reg = <0x83fec000 0x4000>; 553 reg = <0x83fec000 0x4000>;
551 interrupts = <87>; 554 interrupts = <87>;
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
index 08948af86d1a..b0075537195b 100644
--- a/arch/arm/boot/dts/imx53-qsb.dts
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -60,10 +60,17 @@
60 697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */ 60 697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */
61 701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */ 61 701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
62 868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */ 62 868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
63 1149 0x80000000 /* MX53_PAD_GPIO_16__GPIO7_11 */
64 >;
65 };
66
67 led_pin_gpio7_7: led_gpio7_7@0 {
68 fsl,pins = <
63 873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */ 69 873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */
64 >; 70 >;
65 }; 71 };
66 }; 72 };
73
67 }; 74 };
68 75
69 uart1: serial@53fbc000 { 76 uart1: serial@53fbc000 {
@@ -100,76 +107,93 @@
100 pmic: dialog@48 { 107 pmic: dialog@48 {
101 compatible = "dlg,da9053-aa", "dlg,da9052"; 108 compatible = "dlg,da9053-aa", "dlg,da9052";
102 reg = <0x48>; 109 reg = <0x48>;
110 interrupt-parent = <&gpio7>;
111 interrupts = <11 0x8>; /* low-level active IRQ at GPIO7_11 */
103 112
104 regulators { 113 regulators {
105 buck0 { 114 buck1_reg: buck1 {
106 regulator-min-microvolt = <500000>; 115 regulator-min-microvolt = <500000>;
107 regulator-max-microvolt = <2075000>; 116 regulator-max-microvolt = <2075000>;
117 regulator-always-on;
108 }; 118 };
109 119
110 buck1 { 120 buck2_reg: buck2 {
111 regulator-min-microvolt = <500000>; 121 regulator-min-microvolt = <500000>;
112 regulator-max-microvolt = <2075000>; 122 regulator-max-microvolt = <2075000>;
123 regulator-always-on;
113 }; 124 };
114 125
115 buck2 { 126 buck3_reg: buck3 {
116 regulator-min-microvolt = <925000>; 127 regulator-min-microvolt = <925000>;
117 regulator-max-microvolt = <2500000>; 128 regulator-max-microvolt = <2500000>;
129 regulator-always-on;
118 }; 130 };
119 131
120 buck3 { 132 buck4_reg: buck4 {
121 regulator-min-microvolt = <925000>; 133 regulator-min-microvolt = <925000>;
122 regulator-max-microvolt = <2500000>; 134 regulator-max-microvolt = <2500000>;
135 regulator-always-on;
123 }; 136 };
124 137
125 ldo4 { 138 ldo1_reg: ldo1 {
126 regulator-min-microvolt = <600000>; 139 regulator-min-microvolt = <600000>;
127 regulator-max-microvolt = <1800000>; 140 regulator-max-microvolt = <1800000>;
141 regulator-boot-on;
142 regulator-always-on;
128 }; 143 };
129 144
130 ldo5 { 145 ldo2_reg: ldo2 {
146 regulator-min-microvolt = <600000>;
147 regulator-max-microvolt = <1800000>;
148 regulator-always-on;
149 };
150
151 ldo3_reg: ldo3 {
131 regulator-min-microvolt = <600000>; 152 regulator-min-microvolt = <600000>;
132 regulator-max-microvolt = <1800000>; 153 regulator-max-microvolt = <1800000>;
154 regulator-always-on;
133 }; 155 };
134 156
135 ldo6 { 157 ldo4_reg: ldo4 {
136 regulator-min-microvolt = <1725000>; 158 regulator-min-microvolt = <1725000>;
137 regulator-max-microvolt = <3300000>; 159 regulator-max-microvolt = <3300000>;
160 regulator-always-on;
138 }; 161 };
139 162
140 ldo7 { 163 ldo5_reg: ldo5 {
141 regulator-min-microvolt = <1725000>; 164 regulator-min-microvolt = <1725000>;
142 regulator-max-microvolt = <3300000>; 165 regulator-max-microvolt = <3300000>;
166 regulator-always-on;
143 }; 167 };
144 168
145 ldo8 { 169 ldo6_reg: ldo6 {
146 regulator-min-microvolt = <1200000>; 170 regulator-min-microvolt = <1200000>;
147 regulator-max-microvolt = <3600000>; 171 regulator-max-microvolt = <3600000>;
172 regulator-always-on;
148 }; 173 };
149 174
150 ldo9 { 175 ldo7_reg: ldo7 {
151 regulator-min-microvolt = <1200000>; 176 regulator-min-microvolt = <1200000>;
152 regulator-max-microvolt = <3600000>; 177 regulator-max-microvolt = <3600000>;
178 regulator-always-on;
153 }; 179 };
154 180
155 ldo10 { 181 ldo8_reg: ldo8 {
156 regulator-min-microvolt = <1200000>; 182 regulator-min-microvolt = <1200000>;
157 regulator-max-microvolt = <3600000>; 183 regulator-max-microvolt = <3600000>;
184 regulator-always-on;
158 }; 185 };
159 186
160 ldo11 { 187 ldo9_reg: ldo9 {
161 regulator-min-microvolt = <1200000>; 188 regulator-min-microvolt = <1200000>;
162 regulator-max-microvolt = <3600000>; 189 regulator-max-microvolt = <3600000>;
190 regulator-always-on;
163 }; 191 };
164 192
165 ldo12 { 193 ldo10_reg: ldo10 {
166 regulator-min-microvolt = <1250000>; 194 regulator-min-microvolt = <1250000>;
167 regulator-max-microvolt = <3650000>; 195 regulator-max-microvolt = <3650000>;
168 }; 196 regulator-always-on;
169
170 ldo13 {
171 regulator-min-microvolt = <1200000>;
172 regulator-max-microvolt = <3600000>;
173 }; 197 };
174 }; 198 };
175 }; 199 };
@@ -216,6 +240,8 @@
216 240
217 leds { 241 leds {
218 compatible = "gpio-leds"; 242 compatible = "gpio-leds";
243 pinctrl-names = "default";
244 pinctrl-0 = <&led_pin_gpio7_7>;
219 245
220 user { 246 user {
221 label = "Heartbeat"; 247 label = "Heartbeat";
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index da9a047ce4cf..552aed4ff982 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -88,21 +88,23 @@
88 reg = <0x50000000 0x40000>; 88 reg = <0x50000000 0x40000>;
89 ranges; 89 ranges;
90 90
91 esdhc@50004000 { /* ESDHC1 */ 91 esdhc1: esdhc@50004000 {
92 compatible = "fsl,imx53-esdhc"; 92 compatible = "fsl,imx53-esdhc";
93 reg = <0x50004000 0x4000>; 93 reg = <0x50004000 0x4000>;
94 interrupts = <1>; 94 interrupts = <1>;
95 clocks = <&clks 44>, <&clks 0>, <&clks 71>; 95 clocks = <&clks 44>, <&clks 0>, <&clks 71>;
96 clock-names = "ipg", "ahb", "per"; 96 clock-names = "ipg", "ahb", "per";
97 bus-width = <4>;
97 status = "disabled"; 98 status = "disabled";
98 }; 99 };
99 100
100 esdhc@50008000 { /* ESDHC2 */ 101 esdhc2: esdhc@50008000 {
101 compatible = "fsl,imx53-esdhc"; 102 compatible = "fsl,imx53-esdhc";
102 reg = <0x50008000 0x4000>; 103 reg = <0x50008000 0x4000>;
103 interrupts = <2>; 104 interrupts = <2>;
104 clocks = <&clks 45>, <&clks 0>, <&clks 72>; 105 clocks = <&clks 45>, <&clks 0>, <&clks 72>;
105 clock-names = "ipg", "ahb", "per"; 106 clock-names = "ipg", "ahb", "per";
107 bus-width = <4>;
106 status = "disabled"; 108 status = "disabled";
107 }; 109 };
108 110
@@ -115,7 +117,7 @@
115 status = "disabled"; 117 status = "disabled";
116 }; 118 };
117 119
118 ecspi@50010000 { /* ECSPI1 */ 120 ecspi1: ecspi@50010000 {
119 #address-cells = <1>; 121 #address-cells = <1>;
120 #size-cells = <0>; 122 #size-cells = <0>;
121 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; 123 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
@@ -136,47 +138,49 @@
136 status = "disabled"; 138 status = "disabled";
137 }; 139 };
138 140
139 esdhc@50020000 { /* ESDHC3 */ 141 esdhc3: esdhc@50020000 {
140 compatible = "fsl,imx53-esdhc"; 142 compatible = "fsl,imx53-esdhc";
141 reg = <0x50020000 0x4000>; 143 reg = <0x50020000 0x4000>;
142 interrupts = <3>; 144 interrupts = <3>;
143 clocks = <&clks 46>, <&clks 0>, <&clks 73>; 145 clocks = <&clks 46>, <&clks 0>, <&clks 73>;
144 clock-names = "ipg", "ahb", "per"; 146 clock-names = "ipg", "ahb", "per";
147 bus-width = <4>;
145 status = "disabled"; 148 status = "disabled";
146 }; 149 };
147 150
148 esdhc@50024000 { /* ESDHC4 */ 151 esdhc4: esdhc@50024000 {
149 compatible = "fsl,imx53-esdhc"; 152 compatible = "fsl,imx53-esdhc";
150 reg = <0x50024000 0x4000>; 153 reg = <0x50024000 0x4000>;
151 interrupts = <4>; 154 interrupts = <4>;
152 clocks = <&clks 47>, <&clks 0>, <&clks 74>; 155 clocks = <&clks 47>, <&clks 0>, <&clks 74>;
153 clock-names = "ipg", "ahb", "per"; 156 clock-names = "ipg", "ahb", "per";
157 bus-width = <4>;
154 status = "disabled"; 158 status = "disabled";
155 }; 159 };
156 }; 160 };
157 161
158 usb@53f80000 { 162 usbotg: usb@53f80000 {
159 compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 163 compatible = "fsl,imx53-usb", "fsl,imx27-usb";
160 reg = <0x53f80000 0x0200>; 164 reg = <0x53f80000 0x0200>;
161 interrupts = <18>; 165 interrupts = <18>;
162 status = "disabled"; 166 status = "disabled";
163 }; 167 };
164 168
165 usb@53f80200 { 169 usbh1: usb@53f80200 {
166 compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 170 compatible = "fsl,imx53-usb", "fsl,imx27-usb";
167 reg = <0x53f80200 0x0200>; 171 reg = <0x53f80200 0x0200>;
168 interrupts = <14>; 172 interrupts = <14>;
169 status = "disabled"; 173 status = "disabled";
170 }; 174 };
171 175
172 usb@53f80400 { 176 usbh2: usb@53f80400 {
173 compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 177 compatible = "fsl,imx53-usb", "fsl,imx27-usb";
174 reg = <0x53f80400 0x0200>; 178 reg = <0x53f80400 0x0200>;
175 interrupts = <16>; 179 interrupts = <16>;
176 status = "disabled"; 180 status = "disabled";
177 }; 181 };
178 182
179 usb@53f80600 { 183 usbh3: usb@53f80600 {
180 compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 184 compatible = "fsl,imx53-usb", "fsl,imx27-usb";
181 reg = <0x53f80600 0x0200>; 185 reg = <0x53f80600 0x0200>;
182 interrupts = <17>; 186 interrupts = <17>;
@@ -223,14 +227,14 @@
223 #interrupt-cells = <2>; 227 #interrupt-cells = <2>;
224 }; 228 };
225 229
226 wdog@53f98000 { /* WDOG1 */ 230 wdog1: wdog@53f98000 {
227 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; 231 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
228 reg = <0x53f98000 0x4000>; 232 reg = <0x53f98000 0x4000>;
229 interrupts = <58>; 233 interrupts = <58>;
230 clocks = <&clks 0>; 234 clocks = <&clks 0>;
231 }; 235 };
232 236
233 wdog@53f9c000 { /* WDOG2 */ 237 wdog2: wdog@53f9c000 {
234 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; 238 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
235 reg = <0x53f9c000 0x4000>; 239 reg = <0x53f9c000 0x4000>;
236 interrupts = <59>; 240 interrupts = <59>;
@@ -238,7 +242,7 @@
238 status = "disabled"; 242 status = "disabled";
239 }; 243 };
240 244
241 iomuxc@53fa8000 { 245 iomuxc: iomuxc@53fa8000 {
242 compatible = "fsl,imx53-iomuxc"; 246 compatible = "fsl,imx53-iomuxc";
243 reg = <0x53fa8000 0x4000>; 247 reg = <0x53fa8000 0x4000>;
244 248
@@ -338,6 +342,24 @@
338 }; 342 };
339 }; 343 };
340 344
345 can1 {
346 pinctrl_can1_1: can1grp-1 {
347 fsl,pins = <
348 847 0x80000000 /* MX53_PAD_PATA_INTRQ__CAN1_TXCAN */
349 853 0x80000000 /* MX53_PAD_PATA_DIOR__CAN1_RXCAN */
350 >;
351 };
352 };
353
354 can2 {
355 pinctrl_can2_1: can2grp-1 {
356 fsl,pins = <
357 67 0x80000000 /* MX53_PAD_KEY_COL4__CAN2_TXCAN */
358 74 0x80000000 /* MX53_PAD_KEY_ROW4__CAN2_RXCAN */
359 >;
360 };
361 };
362
341 i2c1 { 363 i2c1 {
342 pinctrl_i2c1_1: i2c1grp-1 { 364 pinctrl_i2c1_1: i2c1grp-1 {
343 fsl,pins = < 365 fsl,pins = <
@@ -356,6 +378,15 @@
356 }; 378 };
357 }; 379 };
358 380
381 i2c3 {
382 pinctrl_i2c3_1: i2c3grp-1 {
383 fsl,pins = <
384 1102 0xc0000000 /* MX53_PAD_GPIO_6__I2C3_SDA */
385 1130 0xc0000000 /* MX53_PAD_GPIO_5__I2C3_SCL */
386 >;
387 };
388 };
389
359 uart1 { 390 uart1 {
360 pinctrl_uart1_1: uart1grp-1 { 391 pinctrl_uart1_1: uart1grp-1 {
361 fsl,pins = < 392 fsl,pins = <
@@ -391,6 +422,25 @@
391 >; 422 >;
392 }; 423 };
393 }; 424 };
425
426 uart4 {
427 pinctrl_uart4_1: uart4grp-1 {
428 fsl,pins = <
429 11 0x1c5 /* MX53_PAD_KEY_COL0__UART4_TXD_MUX */
430 18 0x1c5 /* MX53_PAD_KEY_ROW0__UART4_RXD_MUX */
431 >;
432 };
433 };
434
435 uart5 {
436 pinctrl_uart5_1: uart5grp-1 {
437 fsl,pins = <
438 24 0x1c5 /* MX53_PAD_KEY_COL1__UART5_TXD_MUX */
439 31 0x1c5 /* MX53_PAD_KEY_ROW1__UART5_RXD_MUX */
440 >;
441 };
442 };
443
394 }; 444 };
395 445
396 pwm1: pwm@53fb4000 { 446 pwm1: pwm@53fb4000 {
@@ -484,7 +534,7 @@
484 #interrupt-cells = <2>; 534 #interrupt-cells = <2>;
485 }; 535 };
486 536
487 i2c@53fec000 { /* I2C3 */ 537 i2c3: i2c@53fec000 {
488 #address-cells = <1>; 538 #address-cells = <1>;
489 #size-cells = <0>; 539 #size-cells = <0>;
490 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; 540 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
@@ -520,7 +570,7 @@
520 status = "disabled"; 570 status = "disabled";
521 }; 571 };
522 572
523 ecspi@63fac000 { /* ECSPI2 */ 573 ecspi2: ecspi@63fac000 {
524 #address-cells = <1>; 574 #address-cells = <1>;
525 #size-cells = <0>; 575 #size-cells = <0>;
526 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; 576 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
@@ -531,7 +581,7 @@
531 status = "disabled"; 581 status = "disabled";
532 }; 582 };
533 583
534 sdma@63fb0000 { 584 sdma: sdma@63fb0000 {
535 compatible = "fsl,imx53-sdma", "fsl,imx35-sdma"; 585 compatible = "fsl,imx53-sdma", "fsl,imx35-sdma";
536 reg = <0x63fb0000 0x4000>; 586 reg = <0x63fb0000 0x4000>;
537 interrupts = <6>; 587 interrupts = <6>;
@@ -540,7 +590,7 @@
540 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; 590 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
541 }; 591 };
542 592
543 cspi@63fc0000 { 593 cspi: cspi@63fc0000 {
544 #address-cells = <1>; 594 #address-cells = <1>;
545 #size-cells = <0>; 595 #size-cells = <0>;
546 compatible = "fsl,imx53-cspi", "fsl,imx35-cspi"; 596 compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";
@@ -551,7 +601,7 @@
551 status = "disabled"; 601 status = "disabled";
552 }; 602 };
553 603
554 i2c@63fc4000 { /* I2C2 */ 604 i2c2: i2c@63fc4000 {
555 #address-cells = <1>; 605 #address-cells = <1>;
556 #size-cells = <0>; 606 #size-cells = <0>;
557 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; 607 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
@@ -561,7 +611,7 @@
561 status = "disabled"; 611 status = "disabled";
562 }; 612 };
563 613
564 i2c@63fc8000 { /* I2C1 */ 614 i2c1: i2c@63fc8000 {
565 #address-cells = <1>; 615 #address-cells = <1>;
566 #size-cells = <0>; 616 #size-cells = <0>;
567 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; 617 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
@@ -581,13 +631,13 @@
581 status = "disabled"; 631 status = "disabled";
582 }; 632 };
583 633
584 audmux@63fd0000 { 634 audmux: audmux@63fd0000 {
585 compatible = "fsl,imx53-audmux", "fsl,imx31-audmux"; 635 compatible = "fsl,imx53-audmux", "fsl,imx31-audmux";
586 reg = <0x63fd0000 0x4000>; 636 reg = <0x63fd0000 0x4000>;
587 status = "disabled"; 637 status = "disabled";
588 }; 638 };
589 639
590 nand@63fdb000 { 640 nfc: nand@63fdb000 {
591 compatible = "fsl,imx53-nand"; 641 compatible = "fsl,imx53-nand";
592 reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>; 642 reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>;
593 interrupts = <8>; 643 interrupts = <8>;
@@ -605,7 +655,7 @@
605 status = "disabled"; 655 status = "disabled";
606 }; 656 };
607 657
608 ethernet@63fec000 { 658 fec: ethernet@63fec000 {
609 compatible = "fsl,imx53-fec", "fsl,imx25-fec"; 659 compatible = "fsl,imx53-fec", "fsl,imx25-fec";
610 reg = <0x63fec000 0x4000>; 660 reg = <0x63fec000 0x4000>;
611 interrupts = <87>; 661 interrupts = <87>;
diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-sabreauto.dts
new file mode 100644
index 000000000000..826e4ad1477e
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-sabreauto.dts
@@ -0,0 +1,64 @@
1/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14/include/ "imx6q.dtsi"
15
16/ {
17 model = "Freescale i.MX6 Quad SABRE Automotive Board";
18 compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
19
20 memory {
21 reg = <0x10000000 0x80000000>;
22 };
23
24 soc {
25 aips-bus@02000000 { /* AIPS1 */
26 iomuxc@020e0000 {
27 pinctrl-names = "default";
28 pinctrl-0 = <&pinctrl_hog>;
29
30 hog {
31 pinctrl_hog: hoggrp {
32 fsl,pins = <
33 1376 0x80000000 /* MX6Q_PAD_NANDF_CS2__GPIO_6_15 */
34 13 0x80000000 /* MX6Q_PAD_SD2_DAT2__GPIO_1_13 */
35 >;
36 };
37 };
38 };
39 };
40
41 aips-bus@02100000 { /* AIPS2 */
42 uart4: serial@021f0000 {
43 pinctrl-names = "default";
44 pinctrl-0 = <&pinctrl_uart4_1>;
45 status = "okay";
46 };
47
48 ethernet@02188000 {
49 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_enet_2>;
51 phy-mode = "rgmii";
52 status = "okay";
53 };
54
55 usdhc@02198000 { /* uSDHC3 */
56 pinctrl-names = "default";
57 pinctrl-0 = <&pinctrl_usdhc3_1>;
58 cd-gpios = <&gpio6 15 0>;
59 wp-gpios = <&gpio1 13 0>;
60 status = "okay";
61 };
62 };
63 };
64};
diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts
index e596c28c214d..a42402562b7b 100644
--- a/arch/arm/boot/dts/imx6q-sabresd.dts
+++ b/arch/arm/boot/dts/imx6q-sabresd.dts
@@ -38,6 +38,8 @@
38 hog { 38 hog {
39 pinctrl_hog: hoggrp { 39 pinctrl_hog: hoggrp {
40 fsl,pins = < 40 fsl,pins = <
41 1004 0x80000000 /* MX6Q_PAD_GPIO_4__GPIO_1_4 */
42 1012 0x80000000 /* MX6Q_PAD_GPIO_5__GPIO_1_5 */
41 1402 0x80000000 /* MX6Q_PAD_NANDF_D0__GPIO_2_0 */ 43 1402 0x80000000 /* MX6Q_PAD_NANDF_D0__GPIO_2_0 */
42 1410 0x80000000 /* MX6Q_PAD_NANDF_D1__GPIO_2_1 */ 44 1410 0x80000000 /* MX6Q_PAD_NANDF_D1__GPIO_2_1 */
43 1418 0x80000000 /* MX6Q_PAD_NANDF_D2__GPIO_2_2 */ 45 1418 0x80000000 /* MX6Q_PAD_NANDF_D2__GPIO_2_2 */
@@ -73,4 +75,20 @@
73 }; 75 };
74 }; 76 };
75 }; 77 };
78
79 gpio-keys {
80 compatible = "gpio-keys";
81
82 volume-up {
83 label = "Volume Up";
84 gpios = <&gpio1 4 0>;
85 linux,code = <115>; /* KEY_VOLUMEUP */
86 };
87
88 volume-down {
89 label = "Volume Down";
90 gpios = <&gpio1 5 0>;
91 linux,code = <114>; /* KEY_VOLUMEDOWN */
92 };
93 };
76}; 94};
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index cce1d874c7a5..d6265ca97119 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -36,6 +36,14 @@
36 compatible = "arm,cortex-a9"; 36 compatible = "arm,cortex-a9";
37 reg = <0>; 37 reg = <0>;
38 next-level-cache = <&L2>; 38 next-level-cache = <&L2>;
39 operating-points = <
40 /* kHz uV */
41 792000 1100000
42 396000 950000
43 198000 850000
44 >;
45 clock-latency = <61036>; /* two CLK32 periods */
46 cpu0-supply = <&reg_cpu>;
39 }; 47 };
40 48
41 cpu@1 { 49 cpu@1 {
@@ -100,7 +108,7 @@
100 clocks = <&clks 106>; 108 clocks = <&clks 106>;
101 }; 109 };
102 110
103 gpmi-nand@00112000 { 111 nfc: gpmi-nand@00112000 {
104 compatible = "fsl,imx6q-gpmi-nand"; 112 compatible = "fsl,imx6q-gpmi-nand";
105 #address-cells = <1>; 113 #address-cells = <1>;
106 #size-cells = <1>; 114 #size-cells = <1>;
@@ -144,12 +152,12 @@
144 reg = <0x02000000 0x40000>; 152 reg = <0x02000000 0x40000>;
145 ranges; 153 ranges;
146 154
147 spdif@02004000 { 155 spdif: spdif@02004000 {
148 reg = <0x02004000 0x4000>; 156 reg = <0x02004000 0x4000>;
149 interrupts = <0 52 0x04>; 157 interrupts = <0 52 0x04>;
150 }; 158 };
151 159
152 ecspi@02008000 { /* eCSPI1 */ 160 ecspi1: ecspi@02008000 {
153 #address-cells = <1>; 161 #address-cells = <1>;
154 #size-cells = <0>; 162 #size-cells = <0>;
155 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 163 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -160,7 +168,7 @@
160 status = "disabled"; 168 status = "disabled";
161 }; 169 };
162 170
163 ecspi@0200c000 { /* eCSPI2 */ 171 ecspi2: ecspi@0200c000 {
164 #address-cells = <1>; 172 #address-cells = <1>;
165 #size-cells = <0>; 173 #size-cells = <0>;
166 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 174 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -171,7 +179,7 @@
171 status = "disabled"; 179 status = "disabled";
172 }; 180 };
173 181
174 ecspi@02010000 { /* eCSPI3 */ 182 ecspi3: ecspi@02010000 {
175 #address-cells = <1>; 183 #address-cells = <1>;
176 #size-cells = <0>; 184 #size-cells = <0>;
177 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 185 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -182,7 +190,7 @@
182 status = "disabled"; 190 status = "disabled";
183 }; 191 };
184 192
185 ecspi@02014000 { /* eCSPI4 */ 193 ecspi4: ecspi@02014000 {
186 #address-cells = <1>; 194 #address-cells = <1>;
187 #size-cells = <0>; 195 #size-cells = <0>;
188 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 196 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -193,7 +201,7 @@
193 status = "disabled"; 201 status = "disabled";
194 }; 202 };
195 203
196 ecspi@02018000 { /* eCSPI5 */ 204 ecspi5: ecspi@02018000 {
197 #address-cells = <1>; 205 #address-cells = <1>;
198 #size-cells = <0>; 206 #size-cells = <0>;
199 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 207 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -213,7 +221,7 @@
213 status = "disabled"; 221 status = "disabled";
214 }; 222 };
215 223
216 esai@02024000 { 224 esai: esai@02024000 {
217 reg = <0x02024000 0x4000>; 225 reg = <0x02024000 0x4000>;
218 interrupts = <0 51 0x04>; 226 interrupts = <0 51 0x04>;
219 }; 227 };
@@ -248,7 +256,7 @@
248 status = "disabled"; 256 status = "disabled";
249 }; 257 };
250 258
251 asrc@02034000 { 259 asrc: asrc@02034000 {
252 reg = <0x02034000 0x4000>; 260 reg = <0x02034000 0x4000>;
253 interrupts = <0 50 0x04>; 261 interrupts = <0 50 0x04>;
254 }; 262 };
@@ -258,7 +266,7 @@
258 }; 266 };
259 }; 267 };
260 268
261 vpu@02040000 { 269 vpu: vpu@02040000 {
262 reg = <0x02040000 0x3c000>; 270 reg = <0x02040000 0x3c000>;
263 interrupts = <0 3 0x04 0 12 0x04>; 271 interrupts = <0 3 0x04 0 12 0x04>;
264 }; 272 };
@@ -267,7 +275,7 @@
267 reg = <0x0207c000 0x4000>; 275 reg = <0x0207c000 0x4000>;
268 }; 276 };
269 277
270 pwm@02080000 { /* PWM1 */ 278 pwm1: pwm@02080000 {
271 #pwm-cells = <2>; 279 #pwm-cells = <2>;
272 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; 280 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
273 reg = <0x02080000 0x4000>; 281 reg = <0x02080000 0x4000>;
@@ -276,7 +284,7 @@
276 clock-names = "ipg", "per"; 284 clock-names = "ipg", "per";
277 }; 285 };
278 286
279 pwm@02084000 { /* PWM2 */ 287 pwm2: pwm@02084000 {
280 #pwm-cells = <2>; 288 #pwm-cells = <2>;
281 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; 289 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
282 reg = <0x02084000 0x4000>; 290 reg = <0x02084000 0x4000>;
@@ -285,7 +293,7 @@
285 clock-names = "ipg", "per"; 293 clock-names = "ipg", "per";
286 }; 294 };
287 295
288 pwm@02088000 { /* PWM3 */ 296 pwm3: pwm@02088000 {
289 #pwm-cells = <2>; 297 #pwm-cells = <2>;
290 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; 298 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
291 reg = <0x02088000 0x4000>; 299 reg = <0x02088000 0x4000>;
@@ -294,7 +302,7 @@
294 clock-names = "ipg", "per"; 302 clock-names = "ipg", "per";
295 }; 303 };
296 304
297 pwm@0208c000 { /* PWM4 */ 305 pwm4: pwm@0208c000 {
298 #pwm-cells = <2>; 306 #pwm-cells = <2>;
299 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; 307 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
300 reg = <0x0208c000 0x4000>; 308 reg = <0x0208c000 0x4000>;
@@ -303,17 +311,17 @@
303 clock-names = "ipg", "per"; 311 clock-names = "ipg", "per";
304 }; 312 };
305 313
306 flexcan@02090000 { /* CAN1 */ 314 can1: flexcan@02090000 {
307 reg = <0x02090000 0x4000>; 315 reg = <0x02090000 0x4000>;
308 interrupts = <0 110 0x04>; 316 interrupts = <0 110 0x04>;
309 }; 317 };
310 318
311 flexcan@02094000 { /* CAN2 */ 319 can2: flexcan@02094000 {
312 reg = <0x02094000 0x4000>; 320 reg = <0x02094000 0x4000>;
313 interrupts = <0 111 0x04>; 321 interrupts = <0 111 0x04>;
314 }; 322 };
315 323
316 gpt@02098000 { 324 gpt: gpt@02098000 {
317 compatible = "fsl,imx6q-gpt"; 325 compatible = "fsl,imx6q-gpt";
318 reg = <0x02098000 0x4000>; 326 reg = <0x02098000 0x4000>;
319 interrupts = <0 55 0x04>; 327 interrupts = <0 55 0x04>;
@@ -389,19 +397,19 @@
389 #interrupt-cells = <2>; 397 #interrupt-cells = <2>;
390 }; 398 };
391 399
392 kpp@020b8000 { 400 kpp: kpp@020b8000 {
393 reg = <0x020b8000 0x4000>; 401 reg = <0x020b8000 0x4000>;
394 interrupts = <0 82 0x04>; 402 interrupts = <0 82 0x04>;
395 }; 403 };
396 404
397 wdog@020bc000 { /* WDOG1 */ 405 wdog1: wdog@020bc000 {
398 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; 406 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
399 reg = <0x020bc000 0x4000>; 407 reg = <0x020bc000 0x4000>;
400 interrupts = <0 80 0x04>; 408 interrupts = <0 80 0x04>;
401 clocks = <&clks 0>; 409 clocks = <&clks 0>;
402 }; 410 };
403 411
404 wdog@020c0000 { /* WDOG2 */ 412 wdog2: wdog@020c0000 {
405 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; 413 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
406 reg = <0x020c0000 0x4000>; 414 reg = <0x020c0000 0x4000>;
407 interrupts = <0 81 0x04>; 415 interrupts = <0 81 0x04>;
@@ -463,7 +471,7 @@
463 anatop-max-voltage = <2750000>; 471 anatop-max-voltage = <2750000>;
464 }; 472 };
465 473
466 regulator-vddcore@140 { 474 reg_cpu: regulator-vddcore@140 {
467 compatible = "fsl,anatop-regulator"; 475 compatible = "fsl,anatop-regulator";
468 regulator-name = "cpu"; 476 regulator-name = "cpu";
469 regulator-min-microvolt = <725000>; 477 regulator-min-microvolt = <725000>;
@@ -521,27 +529,35 @@
521 }; 529 };
522 530
523 snvs@020cc000 { 531 snvs@020cc000 {
524 reg = <0x020cc000 0x4000>; 532 compatible = "fsl,sec-v4.0-mon", "simple-bus";
525 interrupts = <0 19 0x04 0 20 0x04>; 533 #address-cells = <1>;
534 #size-cells = <1>;
535 ranges = <0 0x020cc000 0x4000>;
536
537 snvs-rtc-lp@34 {
538 compatible = "fsl,sec-v4.0-mon-rtc-lp";
539 reg = <0x34 0x58>;
540 interrupts = <0 19 0x04 0 20 0x04>;
541 };
526 }; 542 };
527 543
528 epit@020d0000 { /* EPIT1 */ 544 epit1: epit@020d0000 { /* EPIT1 */
529 reg = <0x020d0000 0x4000>; 545 reg = <0x020d0000 0x4000>;
530 interrupts = <0 56 0x04>; 546 interrupts = <0 56 0x04>;
531 }; 547 };
532 548
533 epit@020d4000 { /* EPIT2 */ 549 epit2: epit@020d4000 { /* EPIT2 */
534 reg = <0x020d4000 0x4000>; 550 reg = <0x020d4000 0x4000>;
535 interrupts = <0 57 0x04>; 551 interrupts = <0 57 0x04>;
536 }; 552 };
537 553
538 src@020d8000 { 554 src: src@020d8000 {
539 compatible = "fsl,imx6q-src"; 555 compatible = "fsl,imx6q-src";
540 reg = <0x020d8000 0x4000>; 556 reg = <0x020d8000 0x4000>;
541 interrupts = <0 91 0x04 0 96 0x04>; 557 interrupts = <0 91 0x04 0 96 0x04>;
542 }; 558 };
543 559
544 gpc@020dc000 { 560 gpc: gpc@020dc000 {
545 compatible = "fsl,imx6q-gpc"; 561 compatible = "fsl,imx6q-gpc";
546 reg = <0x020dc000 0x4000>; 562 reg = <0x020dc000 0x4000>;
547 interrupts = <0 89 0x04 0 90 0x04>; 563 interrupts = <0 89 0x04 0 90 0x04>;
@@ -552,7 +568,7 @@
552 reg = <0x020e0000 0x38>; 568 reg = <0x020e0000 0x38>;
553 }; 569 };
554 570
555 iomuxc@020e0000 { 571 iomuxc: iomuxc@020e0000 {
556 compatible = "fsl,imx6q-iomuxc"; 572 compatible = "fsl,imx6q-iomuxc";
557 reg = <0x020e0000 0x4000>; 573 reg = <0x020e0000 0x4000>;
558 574
@@ -765,17 +781,17 @@
765 }; 781 };
766 }; 782 };
767 783
768 dcic@020e4000 { /* DCIC1 */ 784 dcic1: dcic@020e4000 {
769 reg = <0x020e4000 0x4000>; 785 reg = <0x020e4000 0x4000>;
770 interrupts = <0 124 0x04>; 786 interrupts = <0 124 0x04>;
771 }; 787 };
772 788
773 dcic@020e8000 { /* DCIC2 */ 789 dcic2: dcic@020e8000 {
774 reg = <0x020e8000 0x4000>; 790 reg = <0x020e8000 0x4000>;
775 interrupts = <0 125 0x04>; 791 interrupts = <0 125 0x04>;
776 }; 792 };
777 793
778 sdma@020ec000 { 794 sdma: sdma@020ec000 {
779 compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; 795 compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
780 reg = <0x020ec000 0x4000>; 796 reg = <0x020ec000 0x4000>;
781 interrupts = <0 2 0x04>; 797 interrupts = <0 2 0x04>;
@@ -801,7 +817,7 @@
801 reg = <0x0217c000 0x4000>; 817 reg = <0x0217c000 0x4000>;
802 }; 818 };
803 819
804 usb@02184000 { /* USB OTG */ 820 usbotg: usb@02184000 {
805 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 821 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
806 reg = <0x02184000 0x200>; 822 reg = <0x02184000 0x200>;
807 interrupts = <0 43 0x04>; 823 interrupts = <0 43 0x04>;
@@ -811,7 +827,7 @@
811 status = "disabled"; 827 status = "disabled";
812 }; 828 };
813 829
814 usb@02184200 { /* USB1 */ 830 usbh1: usb@02184200 {
815 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 831 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
816 reg = <0x02184200 0x200>; 832 reg = <0x02184200 0x200>;
817 interrupts = <0 40 0x04>; 833 interrupts = <0 40 0x04>;
@@ -821,7 +837,7 @@
821 status = "disabled"; 837 status = "disabled";
822 }; 838 };
823 839
824 usb@02184400 { /* USB2 */ 840 usbh2: usb@02184400 {
825 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 841 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
826 reg = <0x02184400 0x200>; 842 reg = <0x02184400 0x200>;
827 interrupts = <0 41 0x04>; 843 interrupts = <0 41 0x04>;
@@ -830,7 +846,7 @@
830 status = "disabled"; 846 status = "disabled";
831 }; 847 };
832 848
833 usb@02184600 { /* USB3 */ 849 usbh3: usb@02184600 {
834 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 850 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
835 reg = <0x02184600 0x200>; 851 reg = <0x02184600 0x200>;
836 interrupts = <0 42 0x04>; 852 interrupts = <0 42 0x04>;
@@ -839,14 +855,14 @@
839 status = "disabled"; 855 status = "disabled";
840 }; 856 };
841 857
842 usbmisc: usbmisc@02184800 { 858 usbmisc: usbmisc: usbmisc@02184800 {
843 #index-cells = <1>; 859 #index-cells = <1>;
844 compatible = "fsl,imx6q-usbmisc"; 860 compatible = "fsl,imx6q-usbmisc";
845 reg = <0x02184800 0x200>; 861 reg = <0x02184800 0x200>;
846 clocks = <&clks 162>; 862 clocks = <&clks 162>;
847 }; 863 };
848 864
849 ethernet@02188000 { 865 fec: ethernet@02188000 {
850 compatible = "fsl,imx6q-fec"; 866 compatible = "fsl,imx6q-fec";
851 reg = <0x02188000 0x4000>; 867 reg = <0x02188000 0x4000>;
852 interrupts = <0 118 0x04 0 119 0x04>; 868 interrupts = <0 118 0x04 0 119 0x04>;
@@ -860,43 +876,47 @@
860 interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>; 876 interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>;
861 }; 877 };
862 878
863 usdhc@02190000 { /* uSDHC1 */ 879 usdhc1: usdhc@02190000 {
864 compatible = "fsl,imx6q-usdhc"; 880 compatible = "fsl,imx6q-usdhc";
865 reg = <0x02190000 0x4000>; 881 reg = <0x02190000 0x4000>;
866 interrupts = <0 22 0x04>; 882 interrupts = <0 22 0x04>;
867 clocks = <&clks 163>, <&clks 163>, <&clks 163>; 883 clocks = <&clks 163>, <&clks 163>, <&clks 163>;
868 clock-names = "ipg", "ahb", "per"; 884 clock-names = "ipg", "ahb", "per";
885 bus-width = <4>;
869 status = "disabled"; 886 status = "disabled";
870 }; 887 };
871 888
872 usdhc@02194000 { /* uSDHC2 */ 889 usdhc2: usdhc@02194000 {
873 compatible = "fsl,imx6q-usdhc"; 890 compatible = "fsl,imx6q-usdhc";
874 reg = <0x02194000 0x4000>; 891 reg = <0x02194000 0x4000>;
875 interrupts = <0 23 0x04>; 892 interrupts = <0 23 0x04>;
876 clocks = <&clks 164>, <&clks 164>, <&clks 164>; 893 clocks = <&clks 164>, <&clks 164>, <&clks 164>;
877 clock-names = "ipg", "ahb", "per"; 894 clock-names = "ipg", "ahb", "per";
895 bus-width = <4>;
878 status = "disabled"; 896 status = "disabled";
879 }; 897 };
880 898
881 usdhc@02198000 { /* uSDHC3 */ 899 usdhc3: usdhc@02198000 {
882 compatible = "fsl,imx6q-usdhc"; 900 compatible = "fsl,imx6q-usdhc";
883 reg = <0x02198000 0x4000>; 901 reg = <0x02198000 0x4000>;
884 interrupts = <0 24 0x04>; 902 interrupts = <0 24 0x04>;
885 clocks = <&clks 165>, <&clks 165>, <&clks 165>; 903 clocks = <&clks 165>, <&clks 165>, <&clks 165>;
886 clock-names = "ipg", "ahb", "per"; 904 clock-names = "ipg", "ahb", "per";
905 bus-width = <4>;
887 status = "disabled"; 906 status = "disabled";
888 }; 907 };
889 908
890 usdhc@0219c000 { /* uSDHC4 */ 909 usdhc4: usdhc@0219c000 {
891 compatible = "fsl,imx6q-usdhc"; 910 compatible = "fsl,imx6q-usdhc";
892 reg = <0x0219c000 0x4000>; 911 reg = <0x0219c000 0x4000>;
893 interrupts = <0 25 0x04>; 912 interrupts = <0 25 0x04>;
894 clocks = <&clks 166>, <&clks 166>, <&clks 166>; 913 clocks = <&clks 166>, <&clks 166>, <&clks 166>;
895 clock-names = "ipg", "ahb", "per"; 914 clock-names = "ipg", "ahb", "per";
915 bus-width = <4>;
896 status = "disabled"; 916 status = "disabled";
897 }; 917 };
898 918
899 i2c@021a0000 { /* I2C1 */ 919 i2c1: i2c@021a0000 {
900 #address-cells = <1>; 920 #address-cells = <1>;
901 #size-cells = <0>; 921 #size-cells = <0>;
902 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; 922 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
@@ -906,7 +926,7 @@
906 status = "disabled"; 926 status = "disabled";
907 }; 927 };
908 928
909 i2c@021a4000 { /* I2C2 */ 929 i2c2: i2c@021a4000 {
910 #address-cells = <1>; 930 #address-cells = <1>;
911 #size-cells = <0>; 931 #size-cells = <0>;
912 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; 932 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
@@ -916,7 +936,7 @@
916 status = "disabled"; 936 status = "disabled";
917 }; 937 };
918 938
919 i2c@021a8000 { /* I2C3 */ 939 i2c3: i2c@021a8000 {
920 #address-cells = <1>; 940 #address-cells = <1>;
921 #size-cells = <0>; 941 #size-cells = <0>;
922 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; 942 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
@@ -930,12 +950,12 @@
930 reg = <0x021ac000 0x4000>; 950 reg = <0x021ac000 0x4000>;
931 }; 951 };
932 952
933 mmdc@021b0000 { /* MMDC0 */ 953 mmdc0: mmdc@021b0000 { /* MMDC0 */
934 compatible = "fsl,imx6q-mmdc"; 954 compatible = "fsl,imx6q-mmdc";
935 reg = <0x021b0000 0x4000>; 955 reg = <0x021b0000 0x4000>;
936 }; 956 };
937 957
938 mmdc@021b4000 { /* MMDC1 */ 958 mmdc1: mmdc@021b4000 { /* MMDC1 */
939 reg = <0x021b4000 0x4000>; 959 reg = <0x021b4000 0x4000>;
940 }; 960 };
941 961
@@ -963,7 +983,7 @@
963 interrupts = <0 109 0x04>; 983 interrupts = <0 109 0x04>;
964 }; 984 };
965 985
966 audmux@021d8000 { 986 audmux: audmux@021d8000 {
967 compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux"; 987 compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux";
968 reg = <0x021d8000 0x4000>; 988 reg = <0x021d8000 0x4000>;
969 status = "disabled"; 989 status = "disabled";
diff --git a/arch/arm/boot/dts/kirkwood-6281.dtsi b/arch/arm/boot/dts/kirkwood-6281.dtsi
new file mode 100644
index 000000000000..d6c9d65cbaeb
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-6281.dtsi
@@ -0,0 +1,44 @@
1/ {
2 ocp@f1000000 {
3 pinctrl: pinctrl@10000 {
4 compatible = "marvell,88f6281-pinctrl";
5 reg = <0x10000 0x20>;
6
7 pmx_nand: pmx-nand {
8 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
9 "mpp4", "mpp5", "mpp18",
10 "mpp19";
11 marvell,function = "nand";
12 };
13 pmx_sata0: pmx-sata0 {
14 marvell,pins = "mpp5", "mpp21", "mpp23";
15 marvell,function = "sata0";
16 };
17 pmx_sata1: pmx-sata1 {
18 marvell,pins = "mpp4", "mpp20", "mpp22";
19 marvell,function = "sata1";
20 };
21 pmx_spi: pmx-spi {
22 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
23 marvell,function = "spi";
24 };
25 pmx_twsi0: pmx-twsi0 {
26 marvell,pins = "mpp8", "mpp9";
27 marvell,function = "twsi0";
28 };
29 pmx_uart0: pmx-uart0 {
30 marvell,pins = "mpp10", "mpp11";
31 marvell,function = "uart0";
32 };
33 pmx_uart1: pmx-uart1 {
34 marvell,pins = "mpp13", "mpp14";
35 marvell,function = "uart1";
36 };
37 pmx_sdio: pmx-sdio {
38 marvell,pins = "mpp12", "mpp13", "mpp14",
39 "mpp15", "mpp16", "mpp17";
40 marvell,function = "sdio";
41 };
42 };
43 };
44};
diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi
new file mode 100644
index 000000000000..9ae2004d5675
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-6282.dtsi
@@ -0,0 +1,45 @@
1/ {
2 ocp@f1000000 {
3
4 pinctrl: pinctrl@10000 {
5 compatible = "marvell,88f6282-pinctrl";
6 reg = <0x10000 0x20>;
7
8 pmx_sata0: pmx-sata0 {
9 marvell,pins = "mpp5", "mpp21", "mpp23";
10 marvell,function = "sata0";
11 };
12 pmx_sata1: pmx-sata1 {
13 marvell,pins = "mpp4", "mpp20", "mpp22";
14 marvell,function = "sata1";
15 };
16 pmx_spi: pmx-spi {
17 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
18 marvell,function = "spi";
19 };
20 pmx_twsi0: pmx-twsi0 {
21 marvell,pins = "mpp8", "mpp9";
22 marvell,function = "twsi0";
23 };
24 pmx_uart0: pmx-uart0 {
25 marvell,pins = "mpp10", "mpp11";
26 marvell,function = "uart0";
27 };
28
29 pmx_uart1: pmx-uart1 {
30 marvell,pins = "mpp13", "mpp14";
31 marvell,function = "uart1";
32 };
33 };
34
35 i2c@11100 {
36 compatible = "marvell,mv64xxx-i2c";
37 reg = <0x11100 0x20>;
38 #address-cells = <1>;
39 #size-cells = <0>;
40 interrupts = <32>;
41 clock-frequency = <100000>;
42 status = "disabled";
43 };
44 };
45};
diff --git a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi
new file mode 100644
index 000000000000..3271e4c8ea07
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi
@@ -0,0 +1,31 @@
1/ {
2 ocp@f1000000 {
3 pinctrl: pinctrl@10000 {
4 compatible = "marvell,98dx4122-pinctrl";
5 reg = <0x10000 0x20>;
6
7 pmx_nand: pmx-nand {
8 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
9 "mpp4", "mpp5", "mpp18",
10 "mpp19";
11 marvell,function = "nand";
12 };
13 pmx_spi: pmx-spi {
14 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
15 marvell,function = "spi";
16 };
17 pmx_twsi0: pmx-twsi0 {
18 marvell,pins = "mpp8", "mpp9";
19 marvell,function = "twsi0";
20 };
21 pmx_uart0: pmx-uart0 {
22 marvell,pins = "mpp10", "mpp11";
23 marvell,function = "uart0";
24 };
25 pmx_uart1: pmx-uart1 {
26 marvell,pins = "mpp13", "mpp14";
27 marvell,function = "uart1";
28 };
29 };
30 };
31};
diff --git a/arch/arm/boot/dts/kirkwood-dnskw.dtsi b/arch/arm/boot/dts/kirkwood-dnskw.dtsi
index 9b32d0272825..6875ac00c174 100644
--- a/arch/arm/boot/dts/kirkwood-dnskw.dtsi
+++ b/arch/arm/boot/dts/kirkwood-dnskw.dtsi
@@ -1,4 +1,5 @@
1/include/ "kirkwood.dtsi" 1/include/ "kirkwood.dtsi"
2/include/ "kirkwood-6281.dtsi"
2 3
3/ { 4/ {
4 model = "D-Link DNS NASes (kirkwood-based)"; 5 model = "D-Link DNS NASes (kirkwood-based)";
@@ -35,7 +36,116 @@
35 6000 2>; 36 6000 2>;
36 }; 37 };
37 38
39 gpio_poweroff {
40 compatible = "gpio-poweroff";
41 gpios = <&gpio1 4 0>;
42 };
43
38 ocp@f1000000 { 44 ocp@f1000000 {
45 pinctrl: pinctrl@10000 {
46
47 pinctrl-0 = < &pmx_nand &pmx_uart1
48 &pmx_sata0 &pmx_sata1
49 &pmx_led_power
50 &pmx_led_red_right_hdd
51 &pmx_led_red_left_hdd
52 &pmx_led_red_usb_325
53 &pmx_button_power
54 &pmx_led_red_usb_320
55 &pmx_power_off &pmx_power_back_on
56 &pmx_power_sata0 &pmx_power_sata1
57 &pmx_present_sata0 &pmx_present_sata1
58 &pmx_led_white_usb &pmx_fan_tacho
59 &pmx_fan_high_speed &pmx_fan_low_speed
60 &pmx_button_unmount &pmx_button_reset
61 &pmx_temp_alarm >;
62 pinctrl-names = "default";
63
64 pmx_sata0: pmx-sata0 {
65 marvell,pins = "mpp20";
66 marvell,function = "sata1";
67 };
68 pmx_sata1: pmx-sata1 {
69 marvell,pins = "mpp21";
70 marvell,function = "sata0";
71 };
72 pmx_led_power: pmx-led-power {
73 marvell,pins = "mpp26";
74 marvell,function = "gpio";
75 };
76 pmx_led_red_right_hdd: pmx-led-red-right-hdd {
77 marvell,pins = "mpp27";
78 marvell,function = "gpio";
79 };
80 pmx_led_red_left_hdd: pmx-led-red-left-hdd {
81 marvell,pins = "mpp28";
82 marvell,function = "gpio";
83 };
84 pmx_led_red_usb_325: pmx-led-red-usb-325 {
85 marvell,pins = "mpp29";
86 marvell,function = "gpio";
87 };
88 pmx_button_power: pmx-button-power {
89 marvell,pins = "mpp34";
90 marvell,function = "gpio";
91 };
92 pmx_led_red_usb_320: pmx-led-red-usb-320 {
93 marvell,pins = "mpp35";
94 marvell,function = "gpio";
95 };
96 pmx_power_off: pmx-power-off {
97 marvell,pins = "mpp36";
98 marvell,function = "gpio";
99 };
100 pmx_power_back_on: pmx-power-back-on {
101 marvell,pins = "mpp37";
102 marvell,function = "gpio";
103 };
104 pmx_power_sata0: pmx-power-sata0 {
105 marvell,pins = "mpp39";
106 marvell,function = "gpio";
107 };
108 pmx_power_sata1: pmx-power-sata1 {
109 marvell,pins = "mpp40";
110 marvell,function = "gpio";
111 };
112 pmx_present_sata0: pmx-present-sata0 {
113 marvell,pins = "mpp41";
114 marvell,function = "gpio";
115 };
116 pmx_present_sata1: pmx-present-sata1 {
117 marvell,pins = "mpp42";
118 marvell,function = "gpio";
119 };
120 pmx_led_white_usb: pmx-led-white-usb {
121 marvell,pins = "mpp43";
122 marvell,function = "gpio";
123 };
124 pmx_fan_tacho: pmx-fan-tacho {
125 marvell,pins = "mpp44";
126 marvell,function = "gpio";
127 };
128 pmx_fan_high_speed: pmx-fan-high-speed {
129 marvell,pins = "mpp45";
130 marvell,function = "gpio";
131 };
132 pmx_fan_low_speed: pmx-fan-low-speed {
133 marvell,pins = "mpp46";
134 marvell,function = "gpio";
135 };
136 pmx_button_unmount: pmx-button-unmount {
137 marvell,pins = "mpp47";
138 marvell,function = "gpio";
139 };
140 pmx_button_reset: pmx-button-reset {
141 marvell,pins = "mpp48";
142 marvell,function = "gpio";
143 };
144 pmx_temp_alarm: pmx-temp-alarm {
145 marvell,pins = "mpp49";
146 marvell,function = "gpio";
147 };
148 };
39 sata@80000 { 149 sata@80000 {
40 status = "okay"; 150 status = "okay";
41 nr-ports = <2>; 151 nr-ports = <2>;
@@ -43,6 +153,7 @@
43 153
44 nand@3000000 { 154 nand@3000000 {
45 status = "okay"; 155 status = "okay";
156 chip-delay = <35>;
46 157
47 partition@0 { 158 partition@0 {
48 label = "u-boot"; 159 label = "u-boot";
@@ -76,4 +187,33 @@
76 }; 187 };
77 }; 188 };
78 }; 189 };
190
191 regulators {
192 compatible = "simple-bus";
193 #address-cells = <1>;
194 #size-cells = <0>;
195
196 sata0_power: regulator@1 {
197 compatible = "regulator-fixed";
198 reg = <1>;
199 regulator-name = "SATA0 Power";
200 regulator-min-microvolt = <5000000>;
201 regulator-max-microvolt = <5000000>;
202 enable-active-high;
203 regulator-always-on;
204 regulator-boot-on;
205 gpio = <&gpio1 7 0>;
206 };
207 sata1_power: regulator@2 {
208 compatible = "regulator-fixed";
209 reg = <2>;
210 regulator-name = "SATA1 Power";
211 regulator-min-microvolt = <5000000>;
212 regulator-max-microvolt = <5000000>;
213 enable-active-high;
214 regulator-always-on;
215 regulator-boot-on;
216 gpio = <&gpio1 8 0>;
217 };
218 };
79}; 219};
diff --git a/arch/arm/boot/dts/kirkwood-dockstar.dts b/arch/arm/boot/dts/kirkwood-dockstar.dts
index 08a582414b88..2e3dd34e21a5 100644
--- a/arch/arm/boot/dts/kirkwood-dockstar.dts
+++ b/arch/arm/boot/dts/kirkwood-dockstar.dts
@@ -1,6 +1,7 @@
1/dts-v1/; 1/dts-v1/;
2 2
3/include/ "kirkwood.dtsi" 3/include/ "kirkwood.dtsi"
4/include/ "kirkwood-6281.dtsi"
4 5
5/ { 6/ {
6 model = "Seagate FreeAgent Dockstar"; 7 model = "Seagate FreeAgent Dockstar";
@@ -16,6 +17,25 @@
16 }; 17 };
17 18
18 ocp@f1000000 { 19 ocp@f1000000 {
20 pinctrl: pinctrl@10000 {
21
22 pinctrl-0 = < &pmx_usb_power_enable
23 &pmx_led_green &pmx_led_orange >;
24 pinctrl-names = "default";
25
26 pmx_usb_power_enable: pmx-usb-power-enable {
27 marvell,pins = "mpp29";
28 marvell,function = "gpio";
29 };
30 pmx_led_green: pmx-led-green {
31 marvell,pins = "mpp46";
32 marvell,function = "gpio";
33 };
34 pmx_led_orange: pmx-led-orange {
35 marvell,pins = "mpp47";
36 marvell,function = "gpio";
37 };
38 };
19 serial@12000 { 39 serial@12000 {
20 clock-frequency = <200000000>; 40 clock-frequency = <200000000>;
21 status = "ok"; 41 status = "ok";
@@ -54,4 +74,21 @@
54 gpios = <&gpio1 15 1>; 74 gpios = <&gpio1 15 1>;
55 }; 75 };
56 }; 76 };
77 regulators {
78 compatible = "simple-bus";
79 #address-cells = <1>;
80 #size-cells = <0>;
81
82 usb_power: regulator@1 {
83 compatible = "regulator-fixed";
84 reg = <1>;
85 regulator-name = "USB Power";
86 regulator-min-microvolt = <5000000>;
87 regulator-max-microvolt = <5000000>;
88 enable-active-high;
89 regulator-always-on;
90 regulator-boot-on;
91 gpio = <&gpio0 29 0>;
92 };
93 };
57}; 94};
diff --git a/arch/arm/boot/dts/kirkwood-dreamplug.dts b/arch/arm/boot/dts/kirkwood-dreamplug.dts
index 26e281fbf6bc..f2d386c95b07 100644
--- a/arch/arm/boot/dts/kirkwood-dreamplug.dts
+++ b/arch/arm/boot/dts/kirkwood-dreamplug.dts
@@ -1,6 +1,7 @@
1/dts-v1/; 1/dts-v1/;
2 2
3/include/ "kirkwood.dtsi" 3/include/ "kirkwood.dtsi"
4/include/ "kirkwood-6281.dtsi"
4 5
5/ { 6/ {
6 model = "Globalscale Technologies Dreamplug"; 7 model = "Globalscale Technologies Dreamplug";
@@ -16,6 +17,26 @@
16 }; 17 };
17 18
18 ocp@f1000000 { 19 ocp@f1000000 {
20 pinctrl: pinctrl@10000 {
21
22 pinctrl-0 = < &pmx_spi
23 &pmx_led_bluetooth &pmx_led_wifi
24 &pmx_led_wifi_ap >;
25 pinctrl-names = "default";
26
27 pmx_led_bluetooth: pmx-led-bluetooth {
28 marvell,pins = "mpp47";
29 marvell,function = "gpio";
30 };
31 pmx_led_wifi: pmx-led-wifi {
32 marvell,pins = "mpp48";
33 marvell,function = "gpio";
34 };
35 pmx_led_wifi_ap: pmx-led-wifi-ap {
36 marvell,pins = "mpp49";
37 marvell,function = "gpio";
38 };
39 };
19 serial@12000 { 40 serial@12000 {
20 clock-frequency = <200000000>; 41 clock-frequency = <200000000>;
21 status = "ok"; 42 status = "ok";
diff --git a/arch/arm/boot/dts/kirkwood-goflexnet.dts b/arch/arm/boot/dts/kirkwood-goflexnet.dts
index 7c8238fbb6f9..1b133e0c566e 100644
--- a/arch/arm/boot/dts/kirkwood-goflexnet.dts
+++ b/arch/arm/boot/dts/kirkwood-goflexnet.dts
@@ -1,6 +1,7 @@
1/dts-v1/; 1/dts-v1/;
2 2
3/include/ "kirkwood.dtsi" 3/include/ "kirkwood.dtsi"
4/include/ "kirkwood-6281.dtsi"
4 5
5/ { 6/ {
6 model = "Seagate GoFlex Net"; 7 model = "Seagate GoFlex Net";
@@ -16,6 +17,61 @@
16 }; 17 };
17 18
18 ocp@f1000000 { 19 ocp@f1000000 {
20 pinctrl: pinctrl@10000 {
21
22 pinctrl-0 = < &pmx_usb_power_enable &pmx_led_orange
23 &pmx_led_left_cap_0 &pmx_led_left_cap_1
24 &pmx_led_left_cap_2 &pmx_led_left_cap_3
25 &pmx_led_right_cap_0 &pmx_led_right_cap_1
26 &pmx_led_right_cap_2 &pmx_led_right_cap_3
27 >;
28 pinctrl-names = "default";
29
30 pmx_usb_power_enable: pmx-usb-power-enable {
31 marvell,pins = "mpp29";
32 marvell,function = "gpio";
33 };
34 pmx_led_right_cap_0: pmx-led_right_cap_0 {
35 marvell,pins = "mpp38";
36 marvell,function = "gpio";
37 };
38 pmx_led_right_cap_1: pmx-led_right_cap_1 {
39 marvell,pins = "mpp39";
40 marvell,function = "gpio";
41 };
42 pmx_led_right_cap_2: pmx-led_right_cap_2 {
43 marvell,pins = "mpp40";
44 marvell,function = "gpio";
45 };
46 pmx_led_right_cap_3: pmx-led_right_cap_3 {
47 marvell,pins = "mpp41";
48 marvell,function = "gpio";
49 };
50 pmx_led_left_cap_0: pmx-led_left_cap_0 {
51 marvell,pins = "mpp42";
52 marvell,function = "gpio";
53 };
54 pmx_led_left_cap_1: pmx-led_left_cap_1 {
55 marvell,pins = "mpp43";
56 marvell,function = "gpio";
57 };
58 pmx_led_left_cap_2: pmx-led_left_cap_2 {
59 marvell,pins = "mpp44";
60 marvell,function = "gpio";
61 };
62 pmx_led_left_cap_3: pmx-led_left_cap_3 {
63 marvell,pins = "mpp45";
64 marvell,function = "gpio";
65 };
66 pmx_led_green: pmx-led_green {
67 marvell,pins = "mpp46";
68 marvell,function = "gpio";
69 };
70 pmx_led_orange: pmx-led_orange {
71 marvell,pins = "mpp47";
72 marvell,function = "gpio";
73 };
74 };
19 serial@12000 { 75 serial@12000 {
20 clock-frequency = <200000000>; 76 clock-frequency = <200000000>;
21 status = "ok"; 77 status = "ok";
@@ -96,4 +152,21 @@
96 gpios = <&gpio1 9 0>; 152 gpios = <&gpio1 9 0>;
97 }; 153 };
98 }; 154 };
155 regulators {
156 compatible = "simple-bus";
157 #address-cells = <1>;
158 #size-cells = <0>;
159
160 usb_power: regulator@1 {
161 compatible = "regulator-fixed";
162 reg = <1>;
163 regulator-name = "USB Power";
164 regulator-min-microvolt = <5000000>;
165 regulator-max-microvolt = <5000000>;
166 enable-active-high;
167 regulator-always-on;
168 regulator-boot-on;
169 gpio = <&gpio0 29 0>;
170 };
171 };
99}; 172};
diff --git a/arch/arm/boot/dts/kirkwood-ib62x0.dts b/arch/arm/boot/dts/kirkwood-ib62x0.dts
index 66794ed75ff1..71902da33d63 100644
--- a/arch/arm/boot/dts/kirkwood-ib62x0.dts
+++ b/arch/arm/boot/dts/kirkwood-ib62x0.dts
@@ -1,6 +1,7 @@
1/dts-v1/; 1/dts-v1/;
2 2
3/include/ "kirkwood.dtsi" 3/include/ "kirkwood.dtsi"
4/include/ "kirkwood-6281.dtsi"
4 5
5/ { 6/ {
6 model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)"; 7 model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)";
@@ -16,6 +17,39 @@
16 }; 17 };
17 18
18 ocp@f1000000 { 19 ocp@f1000000 {
20 pinctrl: pinctrl@10000 {
21
22 pinctrl-0 = < &pmx_nand
23 &pmx_led_os_red &pmx_power_off
24 &pmx_led_os_green &pmx_led_usb_transfer
25 &pmx_button_reset &pmx_button_usb_copy >;
26 pinctrl-names = "default";
27
28 pmx_led_os_red: pmx-led-os-red {
29 marvell,pins = "mpp22";
30 marvell,function = "gpio";
31 };
32 pmx_power_off: pmx-power-off {
33 marvell,pins = "mpp24";
34 marvell,function = "gpio";
35 };
36 pmx_led_os_green: pmx-led-os-green {
37 marvell,pins = "mpp25";
38 marvell,function = "gpio";
39 };
40 pmx_led_usb_transfer: pmx-led-usb-transfer {
41 marvell,pins = "mpp27";
42 marvell,function = "gpio";
43 };
44 pmx_button_reset: pmx-button-reset {
45 marvell,pins = "mpp28";
46 marvell,function = "gpio";
47 };
48 pmx_button_usb_copy: pmx-button-usb-copy {
49 marvell,pins = "mpp29";
50 marvell,function = "gpio";
51 };
52 };
19 serial@12000 { 53 serial@12000 {
20 clock-frequency = <200000000>; 54 clock-frequency = <200000000>;
21 status = "okay"; 55 status = "okay";
@@ -79,4 +113,10 @@
79 gpios = <&gpio0 27 0>; 113 gpios = <&gpio0 27 0>;
80 }; 114 };
81 }; 115 };
116 gpio_poweroff {
117 compatible = "gpio-poweroff";
118 gpios = <&gpio0 24 0>;
119 };
120
121
82}; 122};
diff --git a/arch/arm/boot/dts/kirkwood-iconnect.dts b/arch/arm/boot/dts/kirkwood-iconnect.dts
index d97cd9d4753e..504f16be8b54 100644
--- a/arch/arm/boot/dts/kirkwood-iconnect.dts
+++ b/arch/arm/boot/dts/kirkwood-iconnect.dts
@@ -1,6 +1,7 @@
1/dts-v1/; 1/dts-v1/;
2 2
3/include/ "kirkwood.dtsi" 3/include/ "kirkwood.dtsi"
4/include/ "kirkwood-6281.dtsi"
4 5
5/ { 6/ {
6 model = "Iomega Iconnect"; 7 model = "Iomega Iconnect";
@@ -18,6 +19,56 @@
18 }; 19 };
19 20
20 ocp@f1000000 { 21 ocp@f1000000 {
22 pinctrl: pinctrl@10000 {
23
24 pinctrl-0 = < &pmx_gpio_12 &pmx_gpio_35
25 &pmx_gpio_41 &pmx_gpio_42
26 &pmx_gpio_43 &pmx_gpio_44
27 &pmx_gpio_45 &pmx_gpio_46
28 &pmx_gpio_47 &pmx_gpio_48 >;
29 pinctrl-names = "default";
30
31 pmx_gpio_12: pmx-gpio-12 {
32 marvell,pins = "mpp12";
33 marvell,function = "gpio";
34 };
35 pmx_gpio_35: pmx-gpio-35 {
36 marvell,pins = "mpp35";
37 marvell,function = "gpio";
38 };
39 pmx_gpio_41: pmx-gpio-41 {
40 marvell,pins = "mpp41";
41 marvell,function = "gpio";
42 };
43 pmx_gpio_42: pmx-gpio-42 {
44 marvell,pins = "mpp42";
45 marvell,function = "gpio";
46 };
47 pmx_gpio_43: pmx-gpio-43 {
48 marvell,pins = "mpp43";
49 marvell,function = "gpio";
50 };
51 pmx_gpio_44: pmx-gpio-44 {
52 marvell,pins = "mpp44";
53 marvell,function = "gpio";
54 };
55 pmx_gpio_45: pmx-gpio-45 {
56 marvell,pins = "mpp45";
57 marvell,function = "gpio";
58 };
59 pmx_gpio_46: pmx-gpio-46 {
60 marvell,pins = "mpp46";
61 marvell,function = "gpio";
62 };
63 pmx_gpio_47: pmx-gpio-47 {
64 marvell,pins = "mpp47";
65 marvell,function = "gpio";
66 };
67 pmx_gpio_48: pmx-gpio-48 {
68 marvell,pins = "mpp48";
69 marvell,function = "gpio";
70 };
71 };
21 i2c@11000 { 72 i2c@11000 {
22 status = "okay"; 73 status = "okay";
23 74
diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
index 865aeec40a26..6cae4599c4b3 100644
--- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
+++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
@@ -1,6 +1,7 @@
1/dts-v1/; 1/dts-v1/;
2 2
3/include/ "kirkwood.dtsi" 3/include/ "kirkwood.dtsi"
4/include/ "kirkwood-6281.dtsi"
4 5
5/ { 6/ {
6 model = "Iomega StorCenter ix2-200"; 7 model = "Iomega StorCenter ix2-200";
@@ -16,6 +17,94 @@
16 }; 17 };
17 18
18 ocp@f1000000 { 19 ocp@f1000000 {
20 pinctrl: pinctrl@10000 {
21
22 pinctrl-0 = < &pmx_button_reset &pmx_button_power
23 &pmx_led_backup &pmx_led_power
24 &pmx_button_otb &pmx_led_rebuild
25 &pmx_led_health
26 &pmx_led_sata_brt_ctrl_1
27 &pmx_led_sata_brt_ctrl_2
28 &pmx_led_backup_brt_ctrl_1
29 &pmx_led_backup_brt_ctrl_2
30 &pmx_led_power_brt_ctrl_1
31 &pmx_led_power_brt_ctrl_2
32 &pmx_led_health_brt_ctrl_1
33 &pmx_led_health_brt_ctrl_2
34 &pmx_led_rebuild_brt_ctrl_1
35 &pmx_led_rebuild_brt_ctrl_2 >;
36 pinctrl-names = "default";
37
38 pmx_button_reset: pmx-button-reset {
39 marvell,pins = "mpp12";
40 marvell,function = "gpio";
41 };
42 pmx_button_power: pmx-button-power {
43 marvell,pins = "mpp14";
44 marvell,function = "gpio";
45 };
46 pmx_led_backup: pmx-led-backup {
47 marvell,pins = "mpp15";
48 marvell,function = "gpio";
49 };
50 pmx_led_power: pmx-led-power {
51 marvell,pins = "mpp16";
52 marvell,function = "gpio";
53 };
54 pmx_button_otb: pmx-button-otb {
55 marvell,pins = "mpp35";
56 marvell,function = "gpio";
57 };
58 pmx_led_rebuild: pmx-led-rebuild {
59 marvell,pins = "mpp36";
60 marvell,function = "gpio";
61 };
62 pmx_led_health: pmx-led_health {
63 marvell,pins = "mpp37";
64 marvell,function = "gpio";
65 };
66 pmx_led_sata_brt_ctrl_1: pmx-led-sata-brt-ctrl-1 {
67 marvell,pins = "mpp38";
68 marvell,function = "gpio";
69 };
70 pmx_led_sata_brt_ctrl_2: pmx-led-sata-brt-ctrl-2 {
71 marvell,pins = "mpp39";
72 marvell,function = "gpio";
73 };
74 pmx_led_backup_brt_ctrl_1: pmx-led-backup-brt-ctrl-1 {
75 marvell,pins = "mpp40";
76 marvell,function = "gpio";
77 };
78 pmx_led_backup_brt_ctrl_2: pmx-led-backup-brt-ctrl-2 {
79 marvell,pins = "mpp41";
80 marvell,function = "gpio";
81 };
82 pmx_led_power_brt_ctrl_1: pmx-led-power-brt-ctrl-1 {
83 marvell,pins = "mpp42";
84 marvell,function = "gpio";
85 };
86 pmx_led_power_brt_ctrl_2: pmx-led-power-brt-ctrl-2 {
87 marvell,pins = "mpp43";
88 marvell,function = "gpio";
89 };
90 pmx_led_health_brt_ctrl_1: pmx-led-health-brt-ctrl-1 {
91 marvell,pins = "mpp44";
92 marvell,function = "gpio";
93 };
94 pmx_led_health_brt_ctrl_2: pmx-led-health-brt-ctrl-2 {
95 marvell,pins = "mpp45";
96 marvell,function = "gpio";
97 };
98 pmx_led_rebuild_brt_ctrl_1: pmx-led-rebuild-brt-ctrl-1 {
99 marvell,pins = "mpp44";
100 marvell,function = "gpio";
101 };
102 pmx_led_rebuild_brt_ctrl_2: pmx-led-rebuild-brt-ctrl-2 {
103 marvell,pins = "mpp45";
104 marvell,function = "gpio";
105 };
106
107 };
19 i2c@11000 { 108 i2c@11000 {
20 status = "okay"; 109 status = "okay";
21 110
diff --git a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
index 75bdb93fed26..8db3123ac80f 100644
--- a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
+++ b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
@@ -1,6 +1,7 @@
1/dts-v1/; 1/dts-v1/;
2 2
3/include/ "kirkwood.dtsi" 3/include/ "kirkwood.dtsi"
4/include/ "kirkwood-98dx4122.dtsi"
4 5
5/ { 6/ {
6 model = "Keymile Kirkwood Reference Design"; 7 model = "Keymile Kirkwood Reference Design";
@@ -16,6 +17,22 @@
16 }; 17 };
17 18
18 ocp@f1000000 { 19 ocp@f1000000 {
20 pinctrl: pinctrl@10000 {
21
22 pinctrl-0 = < &pmx_nand &pmx_i2c_gpio_sda
23 &pmx_i2c_gpio_scl >;
24 pinctrl-names = "default";
25
26 pmx_i2c_gpio_sda: pmx-gpio-sda {
27 marvell,pins = "mpp8";
28 marvell,function = "gpio";
29 };
30 pmx_i2c_gpio_scl: pmx-gpio-scl {
31 marvell,pins = "mpp9";
32 marvell,function = "gpio";
33 };
34 };
35
19 serial@12000 { 36 serial@12000 {
20 clock-frequency = <200000000>; 37 clock-frequency = <200000000>;
21 status = "ok"; 38 status = "ok";
diff --git a/arch/arm/boot/dts/kirkwood-lsxl.dtsi b/arch/arm/boot/dts/kirkwood-lsxl.dtsi
index 798e60eeedf3..37d45c4f88fb 100644
--- a/arch/arm/boot/dts/kirkwood-lsxl.dtsi
+++ b/arch/arm/boot/dts/kirkwood-lsxl.dtsi
@@ -1,4 +1,5 @@
1/include/ "kirkwood.dtsi" 1/include/ "kirkwood.dtsi"
2/include/ "kirkwood-6281.dtsi"
2 3
3/ { 4/ {
4 chosen { 5 chosen {
@@ -6,6 +7,71 @@
6 }; 7 };
7 8
8 ocp@f1000000 { 9 ocp@f1000000 {
10 pinctrl: pinctrl@10000 {
11
12 pinctrl-0 = < &pmx_power_hdd &pmx_usb_vbus
13 &pmx_fan_low &pmx_fan_high
14 &pmx_led_function_red &pmx_led_alarm
15 &pmx_led_info &pmx_led_power
16 &pmx_fan_lock &pmx_button_function
17 &pmx_power_switch &pmx_power_auto_switch
18 &pmx_led_function_blue >;
19 pinctrl-names = "default";
20
21 pmx_power_hdd: pmx-power-hdd {
22 marvell,pins = "mpp10";
23 marvell,function = "gpo";
24 };
25 pmx_usb_vbus: pmx-usb-vbus {
26 marvell,pins = "mpp11";
27 marvell,function = "gpio";
28 };
29 pmx_fan_high: pmx-fan-high {
30 marvell,pins = "mpp18";
31 marvell,function = "gpo";
32 };
33 pmx_fan_low: pmx-fan-low {
34 marvell,pins = "mpp19";
35 marvell,function = "gpo";
36 };
37 pmx_led_function_blue: pmx-led-function-blue {
38 marvell,pins = "mpp36";
39 marvell,function = "gpio";
40 };
41 pmx_led_alarm: pmx-led-alarm {
42 marvell,pins = "mpp37";
43 marvell,function = "gpio";
44 };
45 pmx_led_info: pmx-led-info {
46 marvell,pins = "mpp38";
47 marvell,function = "gpio";
48 };
49 pmx_led_power: pmx-led-power {
50 marvell,pins = "mpp39";
51 marvell,function = "gpio";
52 };
53 pmx_fan_lock: pmx-fan-lock {
54 marvell,pins = "mpp40";
55 marvell,function = "gpio";
56 };
57 pmx_button_function: pmx-button-function {
58 marvell,pins = "mpp41";
59 marvell,function = "gpio";
60 };
61 pmx_power_switch: pmx-power-switch {
62 marvell,pins = "mpp42";
63 marvell,function = "gpio";
64 };
65 pmx_power_auto_switch: pmx-power-auto-switch {
66 marvell,pins = "mpp43";
67 marvell,function = "gpio";
68 };
69 pmx_led_function_red: pmx-led-function_red {
70 marvell,pins = "mpp48";
71 marvell,function = "gpio";
72 };
73
74 };
9 sata@80000 { 75 sata@80000 {
10 status = "okay"; 76 status = "okay";
11 nr-ports = <1>; 77 nr-ports = <1>;
@@ -105,4 +171,33 @@
105 5000 0>; 171 5000 0>;
106 alarm-gpios = <&gpio1 8 0>; 172 alarm-gpios = <&gpio1 8 0>;
107 }; 173 };
174
175 regulators {
176 compatible = "simple-bus";
177 #address-cells = <1>;
178 #size-cells = <0>;
179
180 usb_power: regulator@1 {
181 compatible = "regulator-fixed";
182 reg = <1>;
183 regulator-name = "USB Power";
184 regulator-min-microvolt = <5000000>;
185 regulator-max-microvolt = <5000000>;
186 enable-active-high;
187 regulator-always-on;
188 regulator-boot-on;
189 gpio = <&gpio0 11 0>;
190 };
191 hdd_power: regulator@2 {
192 compatible = "regulator-fixed";
193 reg = <2>;
194 regulator-name = "HDD Power";
195 regulator-min-microvolt = <5000000>;
196 regulator-max-microvolt = <5000000>;
197 enable-active-high;
198 regulator-always-on;
199 regulator-boot-on;
200 gpio = <&gpio0 10 0>;
201 };
202 };
108}; 203};
diff --git a/arch/arm/boot/dts/kirkwood-mplcec4.dts b/arch/arm/boot/dts/kirkwood-mplcec4.dts
index ac3c080bed21..262c65403760 100644
--- a/arch/arm/boot/dts/kirkwood-mplcec4.dts
+++ b/arch/arm/boot/dts/kirkwood-mplcec4.dts
@@ -1,6 +1,7 @@
1/dts-v1/; 1/dts-v1/;
2 2
3/include/ "kirkwood.dtsi" 3/include/ "kirkwood.dtsi"
4/include/ "kirkwood-6281.dtsi"
4 5
5/ { 6/ {
6 model = "MPL CEC4"; 7 model = "MPL CEC4";
@@ -16,6 +17,64 @@
16 }; 17 };
17 18
18 ocp@f1000000 { 19 ocp@f1000000 {
20 pinctrl: pinctrl@10000 {
21
22 pinctrl-0 = < &pmx_nand &pmx_uart0
23 &pmx_led_health &pmx_sdio
24 &pmx_sata0 &pmx_sata1
25 &pmx_led_user1o
26 &pmx_led_user1g &pmx_led_user0o
27 &pmx_led_user0g &pmx_led_misc
28 &pmx_sdio_cd
29 >;
30 pinctrl-names = "default";
31
32 pmx_led_health: pmx-led-health {
33 marvell,pins = "mpp7";
34 marvell,function = "gpo";
35 };
36
37 pmx_sata1: pmx-sata1 {
38 marvell,pins = "mpp34";
39 marvell,function = "sata1";
40 };
41
42 pmx_sata0: pmx-sata0 {
43 marvell,pins = "mpp35";
44 marvell,function = "sata0";
45 };
46
47 pmx_led_user1o: pmx-led-user1o {
48 marvell,pins = "mpp40";
49 marvell,function = "gpio";
50 };
51
52 pmx_led_user1g: pmx-led-user1g {
53 marvell,pins = "mpp41";
54 marvell,function = "gpio";
55 };
56
57 pmx_led_user0o: pmx-led-user0o {
58 marvell,pins = "mpp44";
59 marvell,function = "gpio";
60 };
61
62 pmx_led_user0g: pmx-led-user0g {
63 marvell,pins = "mpp45";
64 marvell,function = "gpio";
65 };
66
67 pmx_led_misc: pmx-led-misc {
68 marvell,pins = "mpp46";
69 marvell,function = "gpio";
70 };
71
72 pmx_sdio_cd: pmx-sdio-cd {
73 marvell,pins = "mpp47";
74 marvell,function = "gpio";
75 };
76 };
77
19 i2c@11000 { 78 i2c@11000 {
20 status = "okay"; 79 status = "okay";
21 80
diff --git a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
index 9a2606c8b78f..49d3d74d4d38 100644
--- a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
+++ b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
@@ -1,6 +1,7 @@
1/dts-v1/; 1/dts-v1/;
2 2
3/include/ "kirkwood.dtsi" 3/include/ "kirkwood.dtsi"
4/include/ "kirkwood-6282.dtsi"
4 5
5/ { 6/ {
6 model = "Plat'Home OpenBlocksA6"; 7 model = "Plat'Home OpenBlocksA6";
@@ -29,11 +30,69 @@
29 nand@3000000 { 30 nand@3000000 {
30 chip-delay = <25>; 31 chip-delay = <25>;
31 status = "okay"; 32 status = "okay";
33
34 partition@0 {
35 label = "uboot";
36 reg = <0x0 0x90000>;
37 };
38
39 partition@90000 {
40 label = "env";
41 reg = <0x90000 0x44000>;
42 };
43
44 partition@d4000 {
45 label = "test";
46 reg = <0xd4000 0x24000>;
47 };
48
49 partition@f4000 {
50 label = "conf";
51 reg = <0xf4000 0x400000>;
52 };
53
54 partition@4f4000 {
55 label = "linux";
56 reg = <0x4f4000 0x1d20000>;
57 };
58
59 partition@2214000 {
60 label = "user";
61 reg = <0x2214000 0x1dec000>;
62 };
32 }; 63 };
33 64
34 sata@80000 { 65 sata@80000 {
35 nr-ports = <1>; 66 nr-ports = <1>;
36 status = "okay"; 67 status = "okay";
37 }; 68 };
69
70 i2c@11100 {
71 status = "okay";
72
73 s35390a: s35390a@30 {
74 compatible = "s35390a";
75 reg = <0x30>;
76 };
77 };
38 }; 78 };
79
80 gpio-leds {
81 compatible = "gpio-leds";
82
83 led-red {
84 label = "obsa6:red:stat";
85 gpios = <&gpio1 9 1>;
86 };
87
88 led-green {
89 label = "obsa6:green:stat";
90 gpios = <&gpio1 10 1>;
91 };
92
93 led-yellow {
94 label = "obsa6:yellow:stat";
95 gpios = <&gpio1 11 1>;
96 };
97 };
39}; 98};
diff --git a/arch/arm/boot/dts/kirkwood-ts219-6281.dts b/arch/arm/boot/dts/kirkwood-ts219-6281.dts
index ccbf32757800..8295c833887f 100644
--- a/arch/arm/boot/dts/kirkwood-ts219-6281.dts
+++ b/arch/arm/boot/dts/kirkwood-ts219-6281.dts
@@ -1,8 +1,39 @@
1/dts-v1/; 1/dts-v1/;
2 2
3/include/ "kirkwood-ts219.dtsi" 3/include/ "kirkwood-ts219.dtsi"
4/include/ "kirkwood-6281.dtsi"
4 5
5/ { 6/ {
7 ocp@f1000000 {
8 pinctrl: pinctrl@10000 {
9
10 pinctrl-0 = < &pmx_uart0 &pmx_uart1 &pmx_spi
11 &pmx_twsi0 &pmx_sata0 &pmx_sata1
12 &pmx_ram_size &pmx_reset_button
13 &pmx_USB_copy_button &pmx_board_id>;
14 pinctrl-names = "default";
15
16 pmx_ram_size: pmx-ram-size {
17 /* RAM: 0: 256 MB, 1: 512 MB */
18 marvell,pins = "mpp36";
19 marvell,function = "gpio";
20 };
21 pmx_USB_copy_button: pmx-USB-copy-button {
22 marvell,pins = "mpp15";
23 marvell,function = "gpio";
24 };
25 pmx_reset_button: pmx-reset-button {
26 marvell,pins = "mpp16";
27 marvell,function = "gpio";
28 };
29 pmx_board_id: pmx-board-id {
30 /* 0: TS-11x, 1: TS-21x */
31 marvell,pins = "mpp44";
32 marvell,function = "gpio";
33 };
34 };
35 };
36
6 gpio_keys { 37 gpio_keys {
7 compatible = "gpio-keys"; 38 compatible = "gpio-keys";
8 #address-cells = <1>; 39 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/kirkwood-ts219-6282.dts b/arch/arm/boot/dts/kirkwood-ts219-6282.dts
index fbe9932161a1..df3f95dfba33 100644
--- a/arch/arm/boot/dts/kirkwood-ts219-6282.dts
+++ b/arch/arm/boot/dts/kirkwood-ts219-6282.dts
@@ -1,8 +1,39 @@
1/dts-v1/; 1/dts-v1/;
2 2
3/include/ "kirkwood-ts219.dtsi" 3/include/ "kirkwood-ts219.dtsi"
4/include/ "kirkwood-6282.dtsi"
4 5
5/ { 6/ {
7 ocp@f1000000 {
8 pinctrl: pinctrl@10000 {
9
10 pinctrl-0 = < &pmx_uart0 &pmx_uart1 &pmx_spi
11 &pmx_twsi0 &pmx_sata0 &pmx_sata1
12 &pmx_ram_size &pmx_reset_button
13 &pmx_USB_copy_button &pmx_board_id>;
14 pinctrl-names = "default";
15
16 pmx_ram_size: pmx-ram-size {
17 /* RAM: 0: 256 MB, 1: 512 MB */
18 marvell,pins = "mpp36";
19 marvell,function = "gpio";
20 };
21 pmx_reset_button: pmx-reset-button {
22 marvell,pins = "mpp37";
23 marvell,function = "gpio";
24 };
25 pmx_USB_copy_button: pmx-USB-copy-button {
26 marvell,pins = "mpp43";
27 marvell,function = "gpio";
28 };
29 pmx_board_id: pmx-board-id {
30 /* 0: TS-11x, 1: TS-21x */
31 marvell,pins = "mpp44";
32 marvell,function = "gpio";
33 };
34 };
35 };
36
6 gpio_keys { 37 gpio_keys {
7 compatible = "gpio-keys"; 38 compatible = "gpio-keys";
8 #address-cells = <1>; 39 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 4e5b8154a5be..a990c30f0a26 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -4,6 +4,10 @@
4 compatible = "marvell,kirkwood"; 4 compatible = "marvell,kirkwood";
5 interrupt-parent = <&intc>; 5 interrupt-parent = <&intc>;
6 6
7 aliases {
8 gpio0 = &gpio0;
9 gpio1 = &gpio1;
10 };
7 intc: interrupt-controller { 11 intc: interrupt-controller {
8 compatible = "marvell,orion-intc", "marvell,intc"; 12 compatible = "marvell,orion-intc", "marvell,intc";
9 interrupt-controller; 13 interrupt-controller;
@@ -24,7 +28,8 @@
24 #gpio-cells = <2>; 28 #gpio-cells = <2>;
25 gpio-controller; 29 gpio-controller;
26 reg = <0x10100 0x40>; 30 reg = <0x10100 0x40>;
27 ngpio = <32>; 31 ngpios = <32>;
32 interrupt-controller;
28 interrupts = <35>, <36>, <37>, <38>; 33 interrupts = <35>, <36>, <37>, <38>;
29 }; 34 };
30 35
@@ -33,7 +38,8 @@
33 #gpio-cells = <2>; 38 #gpio-cells = <2>;
34 gpio-controller; 39 gpio-controller;
35 reg = <0x10140 0x40>; 40 reg = <0x10140 0x40>;
36 ngpio = <18>; 41 ngpios = <18>;
42 interrupt-controller;
37 interrupts = <39>, <40>, <41>; 43 interrupts = <39>, <40>, <41>;
38 }; 44 };
39 45
@@ -77,6 +83,13 @@
77 status = "okay"; 83 status = "okay";
78 }; 84 };
79 85
86 ehci@50000 {
87 compatible = "marvell,orion-ehci";
88 reg = <0x50000 0x1000>;
89 interrupts = <19>;
90 status = "okay";
91 };
92
80 sata@80000 { 93 sata@80000 {
81 compatible = "marvell,orion-sata"; 94 compatible = "marvell,orion-sata";
82 reg = <0x80000 0x5000>; 95 reg = <0x80000 0x5000>;
diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
index e5ffe960dbf3..1582f484a867 100644
--- a/arch/arm/boot/dts/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/lpc32xx.dtsi
@@ -182,6 +182,13 @@
182 pnx,timeout = <0x64>; 182 pnx,timeout = <0x64>;
183 }; 183 };
184 184
185 mpwm: mpwm@400E8000 {
186 compatible = "nxp,lpc3220-motor-pwm";
187 reg = <0x400E8000 0x78>;
188 status = "disabled";
189 #pwm-cells = <2>;
190 };
191
185 i2cusb: i2c@31020300 { 192 i2cusb: i2c@31020300 {
186 compatible = "nxp,pnx-i2c"; 193 compatible = "nxp,pnx-i2c";
187 reg = <0x31020300 0x100>; 194 reg = <0x31020300 0x100>;
diff --git a/arch/arm/boot/dts/snowball.dts b/arch/arm/boot/dts/snowball.dts
index c6f85f0bc531..27f31a5fa494 100644
--- a/arch/arm/boot/dts/snowball.dts
+++ b/arch/arm/boot/dts/snowball.dts
@@ -14,7 +14,7 @@
14 14
15/ { 15/ {
16 model = "Calao Systems Snowball platform with device tree"; 16 model = "Calao Systems Snowball platform with device tree";
17 compatible = "calaosystems,snowball-a9500"; 17 compatible = "calaosystems,snowball-a9500", "st-ericsson,u9500";
18 18
19 memory { 19 memory {
20 reg = <0x00000000 0x20000000>; 20 reg = <0x00000000 0x20000000>;
@@ -147,10 +147,10 @@
147 }; 147 };
148 148
149 // External Micro SD slot 149 // External Micro SD slot
150 sdi@80126000 { 150 sdi0_per1@80126000 {
151 arm,primecell-periphid = <0x10480180>; 151 arm,primecell-periphid = <0x10480180>;
152 max-frequency = <50000000>; 152 max-frequency = <50000000>;
153 bus-width = <8>; 153 bus-width = <4>;
154 mmc-cap-mmc-highspeed; 154 mmc-cap-mmc-highspeed;
155 vmmc-supply = <&ab8500_ldo_aux3_reg>; 155 vmmc-supply = <&ab8500_ldo_aux3_reg>;
156 156
@@ -161,7 +161,7 @@
161 }; 161 };
162 162
163 // On-board eMMC 163 // On-board eMMC
164 sdi@80114000 { 164 sdi4_per2@80114000 {
165 arm,primecell-periphid = <0x10480180>; 165 arm,primecell-periphid = <0x10480180>;
166 max-frequency = <50000000>; 166 max-frequency = <50000000>;
167 bus-width = <8>; 167 bus-width = <8>;
@@ -214,5 +214,137 @@
214 cpufreq-cooling { 214 cpufreq-cooling {
215 status = "okay"; 215 status = "okay";
216 }; 216 };
217
218 prcmu@80157000 {
219 db8500-prcmu-regulators {
220 db8500_vape_reg: db8500_vape {
221 regulator-name = "db8500-vape";
222 };
223
224 db8500_varm_reg: db8500_varm {
225 regulator-name = "db8500-varm";
226 };
227
228 db8500_vmodem_reg: db8500_vmodem {
229 regulator-name = "db8500-vmodem";
230 };
231
232 db8500_vpll_reg: db8500_vpll {
233 regulator-name = "db8500-vpll";
234 };
235
236 db8500_vsmps1_reg: db8500_vsmps1 {
237 regulator-name = "db8500-vsmps1";
238 };
239
240 db8500_vsmps2_reg: db8500_vsmps2 {
241 regulator-name = "db8500-vsmps2";
242 };
243
244 db8500_vsmps3_reg: db8500_vsmps3 {
245 regulator-name = "db8500-vsmps3";
246 };
247
248 db8500_vrf1_reg: db8500_vrf1 {
249 regulator-name = "db8500-vrf1";
250 };
251
252 db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
253 regulator-name = "db8500-sva-mmdsp";
254 };
255
256 db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
257 regulator-name = "db8500-sva-mmdsp-ret";
258 };
259
260 db8500_sva_pipe_reg: db8500_sva_pipe {
261 regulator-name = "db8500_sva_pipe";
262 };
263
264 db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
265 regulator-name = "db8500_sia_mmdsp";
266 };
267
268 db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
269 regulator-name = "db8500-sia-mmdsp-ret";
270 };
271
272 db8500_sia_pipe_reg: db8500_sia_pipe {
273 regulator-name = "db8500-sia-pipe";
274 };
275
276 db8500_sga_reg: db8500_sga {
277 regulator-name = "db8500-sga";
278 };
279
280 db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
281 regulator-name = "db8500-b2r2-mcde";
282 };
283
284 db8500_esram12_reg: db8500_esram12 {
285 regulator-name = "db8500-esram12";
286 };
287
288 db8500_esram12_ret_reg: db8500_esram12_ret {
289 regulator-name = "db8500-esram12-ret";
290 };
291
292 db8500_esram34_reg: db8500_esram34 {
293 regulator-name = "db8500-esram34";
294 };
295
296 db8500_esram34_ret_reg: db8500_esram34_ret {
297 regulator-name = "db8500-esram34-ret";
298 };
299 };
300
301 ab8500@5 {
302 ab8500-regulators {
303 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
304 regulator-name = "V-DISPLAY";
305 };
306
307 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
308 regulator-name = "V-eMMC1";
309 };
310
311 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
312 regulator-name = "V-MMC-SD";
313 };
314
315 ab8500_ldo_initcore_reg: ab8500_ldo_initcore {
316 regulator-name = "V-INTCORE";
317 };
318
319 ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
320 regulator-name = "V-TVOUT";
321 };
322
323 ab8500_ldo_usb_reg: ab8500_ldo_usb {
324 regulator-name = "dummy";
325 };
326
327 ab8500_ldo_audio_reg: ab8500_ldo_audio {
328 regulator-name = "V-AUD";
329 };
330
331 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
332 regulator-name = "V-AMIC1";
333 };
334
335 ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 {
336 regulator-name = "V-AMIC2";
337 };
338
339 ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
340 regulator-name = "V-DMIC";
341 };
342
343 ab8500_ldo_ana_reg: ab8500_ldo_ana {
344 regulator-name = "V-CSI/DSI";
345 };
346 };
347 };
348 };
217 }; 349 };
218}; 350};
diff --git a/arch/arm/boot/dts/stuib.dtsi b/arch/arm/boot/dts/stuib.dtsi
new file mode 100644
index 000000000000..39446a247e79
--- /dev/null
+++ b/arch/arm/boot/dts/stuib.dtsi
@@ -0,0 +1,78 @@
1/*
2 * Copyright 2012 ST-Ericsson AB
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/ {
13 soc-u9500 {
14 i2c@80004000 {
15 stmpe1601: stmpe1601@40 {
16 compatible = "st,stmpe1601";
17 reg = <0x40>;
18 interrupts = <26 0x1>;
19 interrupt-parent = <&gpio6>;
20 interrupt-controller;
21
22 wakeup-source;
23 st,autosleep-timeout = <1024>;
24
25 stmpe_keypad {
26 compatible = "st,stmpe-keypad";
27
28 debounce-interval = <64>;
29 st,scan-count = <8>;
30 st,no-autorepeat;
31
32 linux,keymap = <0x205006b
33 0x4010074
34 0x3050072
35 0x1030004
36 0x502006a
37 0x500000a
38 0x5008b
39 0x706001c
40 0x405000b
41 0x6070003
42 0x3040067
43 0x303006c
44 0x60400e7
45 0x602009e
46 0x4020073
47 0x5050002
48 0x4030069
49 0x3020008>;
50 };
51 };
52 };
53
54 i2c@80110000 {
55 bu21013_tp@0x5c {
56 compatible = "rhom,bu21013_tp";
57 reg = <0x5c>;
58 touch-gpio = <&gpio2 20 0x4>;
59 avdd-supply = <&ab8500_ldo_aux1_reg>;
60
61 rhom,touch-max-x = <384>;
62 rhom,touch-max-y = <704>;
63 rhom,flip-y;
64 };
65
66 bu21013_tp@0x5d {
67 compatible = "rhom,bu21013_tp";
68 reg = <0x5d>;
69 touch-gpio = <&gpio2 20 0x4>;
70 avdd-supply = <&ab8500_ldo_aux1_reg>;
71
72 rhom,touch-max-x = <384>;
73 rhom,touch-max-y = <704>;
74 rhom,flip-y;
75 };
76 };
77 };
78};
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts
index 74b8a47adf91..43eb72af8948 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -10,6 +10,18 @@
10 reg = <0x00000000 0x40000000>; 10 reg = <0x00000000 0x40000000>;
11 }; 11 };
12 12
13 host1x {
14 hdmi {
15 status = "okay";
16
17 vdd-supply = <&hdmi_vdd_reg>;
18 pll-supply = <&hdmi_pll_reg>;
19
20 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
21 nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
22 };
23 };
24
13 pinmux { 25 pinmux {
14 pinctrl-names = "default"; 26 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>; 27 pinctrl-0 = <&state_default>;
@@ -262,9 +274,9 @@
262 }; 274 };
263 }; 275 };
264 276
265 i2c@7000c400 { 277 hdmi_ddc: i2c@7000c400 {
266 status = "okay"; 278 status = "okay";
267 clock-frequency = <400000>; 279 clock-frequency = <100000>;
268 }; 280 };
269 281
270 i2c@7000c500 { 282 i2c@7000c500 {
@@ -369,13 +381,13 @@
369 regulator-max-microvolt = <1800000>; 381 regulator-max-microvolt = <1800000>;
370 }; 382 };
371 383
372 ldo7 { 384 hdmi_vdd_reg: ldo7 {
373 regulator-name = "vdd_ldo7,avdd_hdmi"; 385 regulator-name = "vdd_ldo7,avdd_hdmi";
374 regulator-min-microvolt = <3300000>; 386 regulator-min-microvolt = <3300000>;
375 regulator-max-microvolt = <3300000>; 387 regulator-max-microvolt = <3300000>;
376 }; 388 };
377 389
378 ldo8 { 390 hdmi_pll_reg: ldo8 {
379 regulator-name = "vdd_ldo8,avdd_hdmi_pll"; 391 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
380 regulator-min-microvolt = <1800000>; 392 regulator-min-microvolt = <1800000>;
381 regulator-max-microvolt = <1800000>; 393 regulator-max-microvolt = <1800000>;
@@ -396,6 +408,11 @@
396 }; 408 };
397 }; 409 };
398 }; 410 };
411
412 temperature-sensor@4c {
413 compatible = "adi,adt7461";
414 reg = <0x4c>;
415 };
399 }; 416 };
400 417
401 pmc { 418 pmc {
diff --git a/arch/arm/boot/dts/tegra20-plutux.dts b/arch/arm/boot/dts/tegra20-plutux.dts
index 331a3ef24d59..289480026fbf 100644
--- a/arch/arm/boot/dts/tegra20-plutux.dts
+++ b/arch/arm/boot/dts/tegra20-plutux.dts
@@ -6,6 +6,12 @@
6 model = "Avionic Design Plutux board"; 6 model = "Avionic Design Plutux board";
7 compatible = "ad,plutux", "ad,tamonten", "nvidia,tegra20"; 7 compatible = "ad,plutux", "ad,tamonten", "nvidia,tegra20";
8 8
9 host1x {
10 hdmi {
11 status = "okay";
12 };
13 };
14
9 i2c@7000c000 { 15 i2c@7000c000 {
10 wm8903: wm8903@1a { 16 wm8903: wm8903@1a {
11 compatible = "wlf,wm8903"; 17 compatible = "wlf,wm8903";
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index e58a0e60f711..420459825b46 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -561,6 +561,12 @@
561 status = "okay"; 561 status = "okay";
562 }; 562 };
563 563
564 sdhci@c8000000 {
565 status = "okay";
566 power-gpios = <&gpio 86 0>; /* gpio PK6 */
567 bus-width = <4>;
568 };
569
564 sdhci@c8000400 { 570 sdhci@c8000400 {
565 status = "okay"; 571 status = "okay";
566 cd-gpios = <&gpio 69 0>; /* gpio PI5 */ 572 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi
index 5b3d8b157b33..a239ccdfaa52 100644
--- a/arch/arm/boot/dts/tegra20-tamonten.dtsi
+++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi
@@ -8,6 +8,16 @@
8 reg = <0x00000000 0x20000000>; 8 reg = <0x00000000 0x20000000>;
9 }; 9 };
10 10
11 host1x {
12 hdmi {
13 vdd-supply = <&hdmi_vdd_reg>;
14 pll-supply = <&hdmi_pll_reg>;
15
16 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
17 nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
18 };
19 };
20
11 pinmux { 21 pinmux {
12 pinctrl-names = "default"; 22 pinctrl-names = "default";
13 pinctrl-0 = <&state_default>; 23 pinctrl-0 = <&state_default>;
@@ -62,10 +72,6 @@
62 nvidia,pins = "dap4"; 72 nvidia,pins = "dap4";
63 nvidia,function = "dap4"; 73 nvidia,function = "dap4";
64 }; 74 };
65 ddc {
66 nvidia,pins = "ddc";
67 nvidia,function = "i2c2";
68 };
69 dta { 75 dta {
70 nvidia,pins = "dta", "dtd"; 76 nvidia,pins = "dta", "dtd";
71 nvidia,function = "sdio2"; 77 nvidia,function = "sdio2";
@@ -91,7 +97,7 @@
91 nvidia,function = "pcie"; 97 nvidia,function = "pcie";
92 }; 98 };
93 hdint { 99 hdint {
94 nvidia,pins = "hdint", "pta"; 100 nvidia,pins = "hdint";
95 nvidia,function = "hdmi"; 101 nvidia,function = "hdmi";
96 }; 102 };
97 i2cp { 103 i2cp {
@@ -230,6 +236,39 @@
230 nvidia,pull = <1>; 236 nvidia,pull = <1>;
231 }; 237 };
232 }; 238 };
239
240 state_i2cmux_ddc: pinmux_i2cmux_ddc {
241 ddc {
242 nvidia,pins = "ddc";
243 nvidia,function = "i2c2";
244 };
245 pta {
246 nvidia,pins = "pta";
247 nvidia,function = "rsvd4";
248 };
249 };
250
251 state_i2cmux_pta: pinmux_i2cmux_pta {
252 ddc {
253 nvidia,pins = "ddc";
254 nvidia,function = "rsvd4";
255 };
256 pta {
257 nvidia,pins = "pta";
258 nvidia,function = "i2c2";
259 };
260 };
261
262 state_i2cmux_idle: pinmux_i2cmux_idle {
263 ddc {
264 nvidia,pins = "ddc";
265 nvidia,function = "rsvd4";
266 };
267 pta {
268 nvidia,pins = "pta";
269 nvidia,function = "rsvd4";
270 };
271 };
233 }; 272 };
234 273
235 i2s@70002800 { 274 i2s@70002800 {
@@ -246,6 +285,36 @@
246 status = "okay"; 285 status = "okay";
247 }; 286 };
248 287
288 i2c@7000c400 {
289 clock-frequency = <100000>;
290 status = "okay";
291 };
292
293 i2cmux {
294 compatible = "i2c-mux-pinctrl";
295 #address-cells = <1>;
296 #size-cells = <0>;
297
298 i2c-parent = <&{/i2c@7000c400}>;
299
300 pinctrl-names = "ddc", "pta", "idle";
301 pinctrl-0 = <&state_i2cmux_ddc>;
302 pinctrl-1 = <&state_i2cmux_pta>;
303 pinctrl-2 = <&state_i2cmux_idle>;
304
305 hdmi_ddc: i2c@0 {
306 reg = <0>;
307 #address-cells = <1>;
308 #size-cells = <0>;
309 };
310
311 i2c@1 {
312 reg = <1>;
313 #address-cells = <1>;
314 #size-cells = <0>;
315 };
316 };
317
249 i2c@7000d000 { 318 i2c@7000d000 {
250 clock-frequency = <400000>; 319 clock-frequency = <400000>;
251 status = "okay"; 320 status = "okay";
@@ -348,13 +417,13 @@
348 regulator-max-microvolt = <2850000>; 417 regulator-max-microvolt = <2850000>;
349 }; 418 };
350 419
351 ldo7 { 420 hdmi_vdd_reg: ldo7 {
352 regulator-name = "vdd_ldo7,avdd_hdmi"; 421 regulator-name = "vdd_ldo7,avdd_hdmi";
353 regulator-min-microvolt = <3300000>; 422 regulator-min-microvolt = <3300000>;
354 regulator-max-microvolt = <3300000>; 423 regulator-max-microvolt = <3300000>;
355 }; 424 };
356 425
357 ldo8 { 426 hdmi_pll_reg: ldo8 {
358 regulator-name = "vdd_ldo8,avdd_hdmi_pll"; 427 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
359 regulator-min-microvolt = <1800000>; 428 regulator-min-microvolt = <1800000>;
360 regulator-max-microvolt = <1800000>; 429 regulator-max-microvolt = <1800000>;
@@ -381,6 +450,11 @@
381 }; 450 };
382 }; 451 };
383 }; 452 };
453
454 temperature-sensor@4c {
455 compatible = "onnn,nct1008";
456 reg = <0x4c>;
457 };
384 }; 458 };
385 459
386 pmc { 460 pmc {
diff --git a/arch/arm/boot/dts/tegra20-tec.dts b/arch/arm/boot/dts/tegra20-tec.dts
index 9aff31b0fe4a..402b21004bef 100644
--- a/arch/arm/boot/dts/tegra20-tec.dts
+++ b/arch/arm/boot/dts/tegra20-tec.dts
@@ -6,10 +6,13 @@
6 model = "Avionic Design Tamonten Evaluation Carrier"; 6 model = "Avionic Design Tamonten Evaluation Carrier";
7 compatible = "ad,tec", "ad,tamonten", "nvidia,tegra20"; 7 compatible = "ad,tec", "ad,tamonten", "nvidia,tegra20";
8 8
9 i2c@7000c000 { 9 host1x {
10 clock-frequency = <400000>; 10 hdmi {
11 status = "okay"; 11 status = "okay";
12 };
13 };
12 14
15 i2c@7000c000 {
13 wm8903: wm8903@1a { 16 wm8903: wm8903@1a {
14 compatible = "wlf,wm8903"; 17 compatible = "wlf,wm8903";
15 reg = <0x1a>; 18 reg = <0x1a>;
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index 27fb8a67ea42..b70b4cb754c8 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -10,6 +10,18 @@
10 reg = <0x00000000 0x40000000>; 10 reg = <0x00000000 0x40000000>;
11 }; 11 };
12 12
13 host1x {
14 hdmi {
15 status = "okay";
16
17 vdd-supply = <&hdmi_vdd_reg>;
18 pll-supply = <&hdmi_pll_reg>;
19
20 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
21 nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
22 };
23 };
24
13 pinmux { 25 pinmux {
14 pinctrl-names = "default"; 26 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>; 27 pinctrl-0 = <&state_default>;
@@ -249,14 +261,24 @@
249 clock-frequency = <216000000>; 261 clock-frequency = <216000000>;
250 }; 262 };
251 263
252 i2c@7000c000 { 264 dvi_ddc: i2c@7000c000 {
253 status = "okay"; 265 status = "okay";
254 clock-frequency = <400000>; 266 clock-frequency = <100000>;
255 }; 267 };
256 268
257 i2c@7000c400 { 269 spi@7000c380 {
258 status = "okay"; 270 status = "okay";
259 clock-frequency = <400000>; 271 spi-max-frequency = <48000000>;
272 spi-flash@0 {
273 compatible = "winbond,w25q80bl";
274 reg = <0>;
275 spi-max-frequency = <48000000>;
276 };
277 };
278
279 hdmi_ddc: i2c@7000c400 {
280 status = "okay";
281 clock-frequency = <100000>;
260 }; 282 };
261 283
262 i2c@7000c500 { 284 i2c@7000c500 {
@@ -300,6 +322,30 @@
300 bus-width = <4>; 322 bus-width = <4>;
301 }; 323 };
302 324
325 regulators {
326 compatible = "simple-bus";
327 #address-cells = <1>;
328 #size-cells = <0>;
329
330 hdmi_vdd_reg: regulator@0 {
331 compatible = "regulator-fixed";
332 reg = <0>;
333 regulator-name = "avdd_hdmi";
334 regulator-min-microvolt = <3300000>;
335 regulator-max-microvolt = <3300000>;
336 regulator-always-on;
337 };
338
339 hdmi_pll_reg: regulator@1 {
340 compatible = "regulator-fixed";
341 reg = <1>;
342 regulator-name = "avdd_hdmi_pll";
343 regulator-min-microvolt = <1800000>;
344 regulator-max-microvolt = <1800000>;
345 regulator-always-on;
346 };
347 };
348
303 sound { 349 sound {
304 compatible = "nvidia,tegra-audio-trimslice"; 350 compatible = "nvidia,tegra-audio-trimslice";
305 nvidia,i2s-controller = <&tegra_i2s1>; 351 nvidia,i2s-controller = <&tegra_i2s1>;
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index 86854f1abd58..adc47547eaae 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -64,11 +64,6 @@
64 nvidia,pins = "dap4"; 64 nvidia,pins = "dap4";
65 nvidia,function = "dap4"; 65 nvidia,function = "dap4";
66 }; 66 };
67 ddc {
68 nvidia,pins = "ddc", "owc", "spdi", "spdo",
69 "uac";
70 nvidia,function = "rsvd2";
71 };
72 dta { 67 dta {
73 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; 68 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
74 nvidia,function = "vi"; 69 nvidia,function = "vi";
@@ -98,7 +93,7 @@
98 nvidia,function = "pcie"; 93 nvidia,function = "pcie";
99 }; 94 };
100 hdint { 95 hdint {
101 nvidia,pins = "hdint", "pta"; 96 nvidia,pins = "hdint";
102 nvidia,function = "hdmi"; 97 nvidia,function = "hdmi";
103 }; 98 };
104 i2cp { 99 i2cp {
@@ -129,6 +124,10 @@
129 "lspi", "lvp1", "lvs"; 124 "lspi", "lvp1", "lvs";
130 nvidia,function = "displaya"; 125 nvidia,function = "displaya";
131 }; 126 };
127 owc {
128 nvidia,pins = "owc", "spdi", "spdo", "uac";
129 nvidia,function = "rsvd2";
130 };
132 pmc { 131 pmc {
133 nvidia,pins = "pmc"; 132 nvidia,pins = "pmc";
134 nvidia,function = "pwr_on"; 133 nvidia,function = "pwr_on";
@@ -237,6 +236,49 @@
237 "ld23_22"; 236 "ld23_22";
238 nvidia,pull = <1>; 237 nvidia,pull = <1>;
239 }; 238 };
239 drive_sdio1 {
240 nvidia,pins = "drive_sdio1";
241 nvidia,high-speed-mode = <0>;
242 nvidia,schmitt = <1>;
243 nvidia,low-power-mode = <3>;
244 nvidia,pull-down-strength = <31>;
245 nvidia,pull-up-strength = <31>;
246 nvidia,slew-rate-rising = <3>;
247 nvidia,slew-rate-falling = <3>;
248 };
249 };
250
251 state_i2cmux_ddc: pinmux_i2cmux_ddc {
252 ddc {
253 nvidia,pins = "ddc";
254 nvidia,function = "i2c2";
255 };
256 pta {
257 nvidia,pins = "pta";
258 nvidia,function = "rsvd4";
259 };
260 };
261
262 state_i2cmux_pta: pinmux_i2cmux_pta {
263 ddc {
264 nvidia,pins = "ddc";
265 nvidia,function = "rsvd4";
266 };
267 pta {
268 nvidia,pins = "pta";
269 nvidia,function = "i2c2";
270 };
271 };
272
273 state_i2cmux_idle: pinmux_i2cmux_idle {
274 ddc {
275 nvidia,pins = "ddc";
276 nvidia,function = "rsvd4";
277 };
278 pta {
279 nvidia,pins = "pta";
280 nvidia,function = "rsvd4";
281 };
240 }; 282 };
241 }; 283 };
242 284
@@ -281,6 +323,31 @@
281 clock-frequency = <400000>; 323 clock-frequency = <400000>;
282 }; 324 };
283 325
326 i2cmux {
327 compatible = "i2c-mux-pinctrl";
328 #address-cells = <1>;
329 #size-cells = <0>;
330
331 i2c-parent = <&{/i2c@7000c400}>;
332
333 pinctrl-names = "ddc", "pta", "idle";
334 pinctrl-0 = <&state_i2cmux_ddc>;
335 pinctrl-1 = <&state_i2cmux_pta>;
336 pinctrl-2 = <&state_i2cmux_idle>;
337
338 i2c@0 {
339 reg = <0>;
340 #address-cells = <1>;
341 #size-cells = <0>;
342 };
343
344 i2c@1 {
345 reg = <1>;
346 #address-cells = <1>;
347 #size-cells = <0>;
348 };
349 };
350
284 i2c@7000c500 { 351 i2c@7000c500 {
285 status = "okay"; 352 status = "okay";
286 clock-frequency = <400000>; 353 clock-frequency = <400000>;
@@ -406,6 +473,11 @@
406 }; 473 };
407 }; 474 };
408 }; 475 };
476
477 temperature-sensor@4c {
478 compatible = "onnn,nct1008";
479 reg = <0x4c>;
480 };
409 }; 481 };
410 482
411 pmc { 483 pmc {
@@ -425,6 +497,12 @@
425 status = "okay"; 497 status = "okay";
426 }; 498 };
427 499
500 sdhci@c8000000 {
501 status = "okay";
502 power-gpios = <&gpio 86 0>; /* gpio PK6 */
503 bus-width = <4>;
504 };
505
428 sdhci@c8000400 { 506 sdhci@c8000400 {
429 status = "okay"; 507 status = "okay";
430 cd-gpios = <&gpio 69 0>; /* gpio PI5 */ 508 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts
index 94a71c91beb5..20d576ecd555 100644
--- a/arch/arm/boot/dts/tegra20-whistler.dts
+++ b/arch/arm/boot/dts/tegra20-whistler.dts
@@ -10,6 +10,18 @@
10 reg = <0x00000000 0x20000000>; 10 reg = <0x00000000 0x20000000>;
11 }; 11 };
12 12
13 host1x {
14 hdmi {
15 status = "okay";
16
17 vdd-supply = <&hdmi_vdd_reg>;
18 pll-supply = <&hdmi_pll_reg>;
19
20 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
21 nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
22 };
23 };
24
13 pinmux { 25 pinmux {
14 pinctrl-names = "default"; 26 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>; 27 pinctrl-0 = <&state_default>;
@@ -246,6 +258,11 @@
246 clock-frequency = <216000000>; 258 clock-frequency = <216000000>;
247 }; 259 };
248 260
261 hdmi_ddc: i2c@7000c400 {
262 status = "okay";
263 clock-frequency = <100000>;
264 };
265
249 i2c@7000d000 { 266 i2c@7000d000 {
250 status = "okay"; 267 status = "okay";
251 clock-frequency = <100000>; 268 clock-frequency = <100000>;
@@ -356,7 +373,7 @@
356 regulator-always-on; 373 regulator-always-on;
357 }; 374 };
358 375
359 ldo6 { 376 hdmi_pll_reg: ldo6 {
360 regulator-name = "nvvdd_ldo6,avdd_hdmi_pll"; 377 regulator-name = "nvvdd_ldo6,avdd_hdmi_pll";
361 regulator-min-microvolt = <1800000>; 378 regulator-min-microvolt = <1800000>;
362 regulator-max-microvolt = <1800000>; 379 regulator-max-microvolt = <1800000>;
@@ -388,7 +405,7 @@
388 regulator-always-on; 405 regulator-always-on;
389 }; 406 };
390 407
391 ldo11 { 408 hdmi_vdd_reg: ldo11 {
392 regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi"; 409 regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi";
393 regulator-min-microvolt = <3300000>; 410 regulator-min-microvolt = <3300000>;
394 regulator-max-microvolt = <3300000>; 411 regulator-max-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index f40cfbaa7c7e..fba998e3954a 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -4,6 +4,93 @@
4 compatible = "nvidia,tegra20"; 4 compatible = "nvidia,tegra20";
5 interrupt-parent = <&intc>; 5 interrupt-parent = <&intc>;
6 6
7 host1x {
8 compatible = "nvidia,tegra20-host1x", "simple-bus";
9 reg = <0x50000000 0x00024000>;
10 interrupts = <0 65 0x04 /* mpcore syncpt */
11 0 67 0x04>; /* mpcore general */
12
13 #address-cells = <1>;
14 #size-cells = <1>;
15
16 ranges = <0x54000000 0x54000000 0x04000000>;
17
18 mpe {
19 compatible = "nvidia,tegra20-mpe";
20 reg = <0x54040000 0x00040000>;
21 interrupts = <0 68 0x04>;
22 };
23
24 vi {
25 compatible = "nvidia,tegra20-vi";
26 reg = <0x54080000 0x00040000>;
27 interrupts = <0 69 0x04>;
28 };
29
30 epp {
31 compatible = "nvidia,tegra20-epp";
32 reg = <0x540c0000 0x00040000>;
33 interrupts = <0 70 0x04>;
34 };
35
36 isp {
37 compatible = "nvidia,tegra20-isp";
38 reg = <0x54100000 0x00040000>;
39 interrupts = <0 71 0x04>;
40 };
41
42 gr2d {
43 compatible = "nvidia,tegra20-gr2d";
44 reg = <0x54140000 0x00040000>;
45 interrupts = <0 72 0x04>;
46 };
47
48 gr3d {
49 compatible = "nvidia,tegra20-gr3d";
50 reg = <0x54180000 0x00040000>;
51 };
52
53 dc@54200000 {
54 compatible = "nvidia,tegra20-dc";
55 reg = <0x54200000 0x00040000>;
56 interrupts = <0 73 0x04>;
57
58 rgb {
59 status = "disabled";
60 };
61 };
62
63 dc@54240000 {
64 compatible = "nvidia,tegra20-dc";
65 reg = <0x54240000 0x00040000>;
66 interrupts = <0 74 0x04>;
67
68 rgb {
69 status = "disabled";
70 };
71 };
72
73 hdmi {
74 compatible = "nvidia,tegra20-hdmi";
75 reg = <0x54280000 0x00040000>;
76 interrupts = <0 75 0x04>;
77 status = "disabled";
78 };
79
80 tvo {
81 compatible = "nvidia,tegra20-tvo";
82 reg = <0x542c0000 0x00040000>;
83 interrupts = <0 76 0x04>;
84 status = "disabled";
85 };
86
87 dsi {
88 compatible = "nvidia,tegra20-dsi";
89 reg = <0x54300000 0x00040000>;
90 status = "disabled";
91 };
92 };
93
7 cache-controller@50043000 { 94 cache-controller@50043000 {
8 compatible = "arm,pl310-cache"; 95 compatible = "arm,pl310-cache";
9 reg = <0x50043000 0x1000>; 96 reg = <0x50043000 0x1000>;
@@ -147,6 +234,16 @@
147 status = "disabled"; 234 status = "disabled";
148 }; 235 };
149 236
237 spi@7000c380 {
238 compatible = "nvidia,tegra20-sflash";
239 reg = <0x7000c380 0x80>;
240 interrupts = <0 39 0x04>;
241 nvidia,dma-request-selector = <&apbdma 11>;
242 #address-cells = <1>;
243 #size-cells = <0>;
244 status = "disabled";
245 };
246
150 i2c@7000c400 { 247 i2c@7000c400 {
151 compatible = "nvidia,tegra20-i2c"; 248 compatible = "nvidia,tegra20-i2c";
152 reg = <0x7000c400 0x100>; 249 reg = <0x7000c400 0x100>;
@@ -174,6 +271,46 @@
174 status = "disabled"; 271 status = "disabled";
175 }; 272 };
176 273
274 spi@7000d400 {
275 compatible = "nvidia,tegra20-slink";
276 reg = <0x7000d400 0x200>;
277 interrupts = <0 59 0x04>;
278 nvidia,dma-request-selector = <&apbdma 15>;
279 #address-cells = <1>;
280 #size-cells = <0>;
281 status = "disabled";
282 };
283
284 spi@7000d600 {
285 compatible = "nvidia,tegra20-slink";
286 reg = <0x7000d600 0x200>;
287 interrupts = <0 82 0x04>;
288 nvidia,dma-request-selector = <&apbdma 16>;
289 #address-cells = <1>;
290 #size-cells = <0>;
291 status = "disabled";
292 };
293
294 spi@7000d800 {
295 compatible = "nvidia,tegra20-slink";
296 reg = <0x7000d480 0x200>;
297 interrupts = <0 83 0x04>;
298 nvidia,dma-request-selector = <&apbdma 17>;
299 #address-cells = <1>;
300 #size-cells = <0>;
301 status = "disabled";
302 };
303
304 spi@7000da00 {
305 compatible = "nvidia,tegra20-slink";
306 reg = <0x7000da00 0x200>;
307 interrupts = <0 93 0x04>;
308 nvidia,dma-request-selector = <&apbdma 18>;
309 #address-cells = <1>;
310 #size-cells = <0>;
311 status = "disabled";
312 };
313
177 pmc { 314 pmc {
178 compatible = "nvidia,tegra20-pmc"; 315 compatible = "nvidia,tegra20-pmc";
179 reg = <0x7000e400 0x400>; 316 reg = <0x7000e400 0x400>;
diff --git a/arch/arm/boot/dts/tegra30-cardhu-a02.dts b/arch/arm/boot/dts/tegra30-cardhu-a02.dts
index dd4222f00eca..adc88aa50eb6 100644
--- a/arch/arm/boot/dts/tegra30-cardhu-a02.dts
+++ b/arch/arm/boot/dts/tegra30-cardhu-a02.dts
@@ -83,5 +83,11 @@
83 gpio = <&gpio 83 0>; /* GPIO PK3 */ 83 gpio = <&gpio 83 0>; /* GPIO PK3 */
84 }; 84 };
85 }; 85 };
86
87 sdhci@78000400 {
88 status = "okay";
89 power-gpios = <&gpio 28 0>; /* gpio PD4 */
90 bus-width = <4>;
91 };
86}; 92};
87 93
diff --git a/arch/arm/boot/dts/tegra30-cardhu-a04.dts b/arch/arm/boot/dts/tegra30-cardhu-a04.dts
index 0828f097ca86..08163e145d57 100644
--- a/arch/arm/boot/dts/tegra30-cardhu-a04.dts
+++ b/arch/arm/boot/dts/tegra30-cardhu-a04.dts
@@ -95,4 +95,10 @@
95 gpio = <&gpio 232 0>; /* GPIO PDD0 */ 95 gpio = <&gpio 232 0>; /* GPIO PDD0 */
96 }; 96 };
97 }; 97 };
98
99 sdhci@78000400 {
100 status = "okay";
101 power-gpios = <&gpio 27 0>; /* gpio PD3 */
102 bus-width = <4>;
103 };
98}; 104};
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index b1271a894327..bdb2a660f376 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -52,6 +52,22 @@
52 nvidia,pull = <2>; 52 nvidia,pull = <2>;
53 nvidia,tristate = <0>; 53 nvidia,tristate = <0>;
54 }; 54 };
55 sdmmc3_clk_pa6 {
56 nvidia,pins = "sdmmc3_clk_pa6";
57 nvidia,function = "sdmmc3";
58 nvidia,pull = <0>;
59 nvidia,tristate = <0>;
60 };
61 sdmmc3_cmd_pa7 {
62 nvidia,pins = "sdmmc3_cmd_pa7",
63 "sdmmc3_dat0_pb7",
64 "sdmmc3_dat1_pb6",
65 "sdmmc3_dat2_pb5",
66 "sdmmc3_dat3_pb4";
67 nvidia,function = "sdmmc3";
68 nvidia,pull = <2>;
69 nvidia,tristate = <0>;
70 };
55 sdmmc4_clk_pcc4 { 71 sdmmc4_clk_pcc4 {
56 nvidia,pins = "sdmmc4_clk_pcc4", 72 nvidia,pins = "sdmmc4_clk_pcc4",
57 "sdmmc4_rst_n_pcc3"; 73 "sdmmc4_rst_n_pcc3";
@@ -81,6 +97,15 @@
81 nvidia,pull = <0>; 97 nvidia,pull = <0>;
82 nvidia,tristate = <0>; 98 nvidia,tristate = <0>;
83 }; 99 };
100 sdio3 {
101 nvidia,pins = "drive_sdio3";
102 nvidia,high-speed-mode = <0>;
103 nvidia,schmitt = <0>;
104 nvidia,pull-down-strength = <46>;
105 nvidia,pull-up-strength = <42>;
106 nvidia,slew-rate-rising = <1>;
107 nvidia,slew-rate-falling = <1>;
108 };
84 }; 109 };
85 }; 110 };
86 111
@@ -250,6 +275,16 @@
250 }; 275 };
251 }; 276 };
252 277
278 spi@7000da00 {
279 status = "okay";
280 spi-max-frequency = <25000000>;
281 spi-flash@1 {
282 compatible = "winbond,w25q32";
283 reg = <1>;
284 spi-max-frequency = <20000000>;
285 };
286 };
287
253 ahub { 288 ahub {
254 i2s@70080400 { 289 i2s@70080400 {
255 status = "okay"; 290 status = "okay";
@@ -384,6 +419,8 @@
384 regulator-name = "vdd_com"; 419 regulator-name = "vdd_com";
385 regulator-min-microvolt = <3300000>; 420 regulator-min-microvolt = <3300000>;
386 regulator-max-microvolt = <3300000>; 421 regulator-max-microvolt = <3300000>;
422 regulator-always-on;
423 regulator-boot-on;
387 enable-active-high; 424 enable-active-high;
388 gpio = <&gpio 24 0>; /* gpio PD0 */ 425 gpio = <&gpio 24 0>; /* gpio PD0 */
389 vin-supply = <&sys_3v3_reg>; 426 vin-supply = <&sys_3v3_reg>;
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index fed8dca1692d..efa603d47a6a 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -4,6 +4,93 @@
4 compatible = "nvidia,tegra30"; 4 compatible = "nvidia,tegra30";
5 interrupt-parent = <&intc>; 5 interrupt-parent = <&intc>;
6 6
7 host1x {
8 compatible = "nvidia,tegra30-host1x", "simple-bus";
9 reg = <0x50000000 0x00024000>;
10 interrupts = <0 65 0x04 /* mpcore syncpt */
11 0 67 0x04>; /* mpcore general */
12
13 #address-cells = <1>;
14 #size-cells = <1>;
15
16 ranges = <0x54000000 0x54000000 0x04000000>;
17
18 mpe {
19 compatible = "nvidia,tegra30-mpe";
20 reg = <0x54040000 0x00040000>;
21 interrupts = <0 68 0x04>;
22 };
23
24 vi {
25 compatible = "nvidia,tegra30-vi";
26 reg = <0x54080000 0x00040000>;
27 interrupts = <0 69 0x04>;
28 };
29
30 epp {
31 compatible = "nvidia,tegra30-epp";
32 reg = <0x540c0000 0x00040000>;
33 interrupts = <0 70 0x04>;
34 };
35
36 isp {
37 compatible = "nvidia,tegra30-isp";
38 reg = <0x54100000 0x00040000>;
39 interrupts = <0 71 0x04>;
40 };
41
42 gr2d {
43 compatible = "nvidia,tegra30-gr2d";
44 reg = <0x54140000 0x00040000>;
45 interrupts = <0 72 0x04>;
46 };
47
48 gr3d {
49 compatible = "nvidia,tegra30-gr3d";
50 reg = <0x54180000 0x00040000>;
51 };
52
53 dc@54200000 {
54 compatible = "nvidia,tegra30-dc";
55 reg = <0x54200000 0x00040000>;
56 interrupts = <0 73 0x04>;
57
58 rgb {
59 status = "disabled";
60 };
61 };
62
63 dc@54240000 {
64 compatible = "nvidia,tegra30-dc";
65 reg = <0x54240000 0x00040000>;
66 interrupts = <0 74 0x04>;
67
68 rgb {
69 status = "disabled";
70 };
71 };
72
73 hdmi {
74 compatible = "nvidia,tegra30-hdmi";
75 reg = <0x54280000 0x00040000>;
76 interrupts = <0 75 0x04>;
77 status = "disabled";
78 };
79
80 tvo {
81 compatible = "nvidia,tegra30-tvo";
82 reg = <0x542c0000 0x00040000>;
83 interrupts = <0 76 0x04>;
84 status = "disabled";
85 };
86
87 dsi {
88 compatible = "nvidia,tegra30-dsi";
89 reg = <0x54300000 0x00040000>;
90 status = "disabled";
91 };
92 };
93
7 cache-controller@50043000 { 94 cache-controller@50043000 {
8 compatible = "arm,pl310-cache"; 95 compatible = "arm,pl310-cache";
9 reg = <0x50043000 0x1000>; 96 reg = <0x50043000 0x1000>;
@@ -177,6 +264,66 @@
177 status = "disabled"; 264 status = "disabled";
178 }; 265 };
179 266
267 spi@7000d400 {
268 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
269 reg = <0x7000d400 0x200>;
270 interrupts = <0 59 0x04>;
271 nvidia,dma-request-selector = <&apbdma 15>;
272 #address-cells = <1>;
273 #size-cells = <0>;
274 status = "disabled";
275 };
276
277 spi@7000d600 {
278 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
279 reg = <0x7000d600 0x200>;
280 interrupts = <0 82 0x04>;
281 nvidia,dma-request-selector = <&apbdma 16>;
282 #address-cells = <1>;
283 #size-cells = <0>;
284 status = "disabled";
285 };
286
287 spi@7000d800 {
288 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
289 reg = <0x7000d480 0x200>;
290 interrupts = <0 83 0x04>;
291 nvidia,dma-request-selector = <&apbdma 17>;
292 #address-cells = <1>;
293 #size-cells = <0>;
294 status = "disabled";
295 };
296
297 spi@7000da00 {
298 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
299 reg = <0x7000da00 0x200>;
300 interrupts = <0 93 0x04>;
301 nvidia,dma-request-selector = <&apbdma 18>;
302 #address-cells = <1>;
303 #size-cells = <0>;
304 status = "disabled";
305 };
306
307 spi@7000dc00 {
308 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
309 reg = <0x7000dc00 0x200>;
310 interrupts = <0 94 0x04>;
311 nvidia,dma-request-selector = <&apbdma 27>;
312 #address-cells = <1>;
313 #size-cells = <0>;
314 status = "disabled";
315 };
316
317 spi@7000de00 {
318 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
319 reg = <0x7000de00 0x200>;
320 interrupts = <0 79 0x04>;
321 nvidia,dma-request-selector = <&apbdma 28>;
322 #address-cells = <1>;
323 #size-cells = <0>;
324 status = "disabled";
325 };
326
180 pmc { 327 pmc {
181 compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc"; 328 compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc";
182 reg = <0x7000e400 0x400>; 329 reg = <0x7000e400 0x400>;
diff --git a/arch/arm/boot/dts/u9540.dts b/arch/arm/boot/dts/u9540.dts
new file mode 100644
index 000000000000..95892ec6c342
--- /dev/null
+++ b/arch/arm/boot/dts/u9540.dts
@@ -0,0 +1,72 @@
1/*
2 * Copyright 2012 ST-Ericsson AB
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13/include/ "dbx5x0.dtsi"
14
15/ {
16 model = "ST-Ericsson U9540 platform with Device Tree";
17 compatible = "st-ericsson,u9540";
18
19 memory {
20 reg = <0x00000000 0x20000000>;
21 };
22
23 soc-u9500 {
24 uart@80120000 {
25 status = "okay";
26 };
27
28 uart@80121000 {
29 status = "okay";
30 };
31
32 uart@80007000 {
33 status = "okay";
34 };
35
36 // External Micro SD slot
37 sdi0_per1@80126000 {
38 arm,primecell-periphid = <0x10480180>;
39 max-frequency = <100000000>;
40 bus-width = <4>;
41 mmc-cap-sd-highspeed;
42 mmc-cap-mmc-highspeed;
43 vmmc-supply = <&ab8500_ldo_aux3_reg>;
44
45 cd-gpios = <&gpio7 6 0x4>; // 230
46 cd-inverted;
47
48 status = "okay";
49 };
50
51
52 // WLAN SDIO channel
53 sdi1_per2@80118000 {
54 arm,primecell-periphid = <0x10480180>;
55 max-frequency = <50000000>;
56 bus-width = <4>;
57
58 status = "okay";
59 };
60
61 // On-board eMMC
62 sdi4_per2@80114000 {
63 arm,primecell-periphid = <0x10480180>;
64 max-frequency = <100000000>;
65 bus-width = <8>;
66 mmc-cap-mmc-highspeed;
67 vmmc-supply = <&ab8500_ldo_aux2_reg>;
68
69 status = "okay";
70 };
71 };
72};
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
new file mode 100644
index 000000000000..401c1262d4ed
--- /dev/null
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -0,0 +1,166 @@
1/*
2 * Copyright (C) 2011 Xilinx
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13/include/ "skeleton.dtsi"
14
15/ {
16 compatible = "xlnx,zynq-7000";
17
18 amba {
19 compatible = "simple-bus";
20 #address-cells = <1>;
21 #size-cells = <1>;
22 interrupt-parent = <&intc>;
23 ranges;
24
25 intc: interrupt-controller@f8f01000 {
26 compatible = "arm,cortex-a9-gic";
27 #interrupt-cells = <3>;
28 #address-cells = <1>;
29 interrupt-controller;
30 reg = <0xF8F01000 0x1000>,
31 <0xF8F00100 0x100>;
32 };
33
34 L2: cache-controller {
35 compatible = "arm,pl310-cache";
36 reg = <0xF8F02000 0x1000>;
37 arm,data-latency = <2 3 2>;
38 arm,tag-latency = <2 3 2>;
39 cache-unified;
40 cache-level = <2>;
41 };
42
43 uart0: uart@e0000000 {
44 compatible = "xlnx,xuartps";
45 reg = <0xE0000000 0x1000>;
46 interrupts = <0 27 4>;
47 clock = <50000000>;
48 };
49
50 uart1: uart@e0001000 {
51 compatible = "xlnx,xuartps";
52 reg = <0xE0001000 0x1000>;
53 interrupts = <0 50 4>;
54 clock = <50000000>;
55 };
56
57 slcr: slcr@f8000000 {
58 compatible = "xlnx,zynq-slcr";
59 reg = <0xF8000000 0x1000>;
60
61 clocks {
62 #address-cells = <1>;
63 #size-cells = <0>;
64
65 ps_clk: ps_clk {
66 #clock-cells = <0>;
67 compatible = "fixed-clock";
68 /* clock-frequency set in board-specific file */
69 clock-output-names = "ps_clk";
70 };
71 armpll: armpll {
72 #clock-cells = <0>;
73 compatible = "xlnx,zynq-pll";
74 clocks = <&ps_clk>;
75 reg = <0x100 0x110>;
76 clock-output-names = "armpll";
77 };
78 ddrpll: ddrpll {
79 #clock-cells = <0>;
80 compatible = "xlnx,zynq-pll";
81 clocks = <&ps_clk>;
82 reg = <0x104 0x114>;
83 clock-output-names = "ddrpll";
84 };
85 iopll: iopll {
86 #clock-cells = <0>;
87 compatible = "xlnx,zynq-pll";
88 clocks = <&ps_clk>;
89 reg = <0x108 0x118>;
90 clock-output-names = "iopll";
91 };
92 uart_clk: uart_clk {
93 #clock-cells = <1>;
94 compatible = "xlnx,zynq-periph-clock";
95 clocks = <&iopll &armpll &ddrpll>;
96 reg = <0x154>;
97 clock-output-names = "uart0_ref_clk",
98 "uart1_ref_clk";
99 };
100 cpu_clk: cpu_clk {
101 #clock-cells = <1>;
102 compatible = "xlnx,zynq-cpu-clock";
103 clocks = <&iopll &armpll &ddrpll>;
104 reg = <0x120 0x1C4>;
105 clock-output-names = "cpu_6x4x",
106 "cpu_3x2x",
107 "cpu_2x",
108 "cpu_1x";
109 };
110 };
111 };
112
113 ttc0: ttc0@f8001000 {
114 #address-cells = <1>;
115 #size-cells = <0>;
116 compatible = "xlnx,ttc";
117 reg = <0xF8001000 0x1000>;
118 clocks = <&cpu_clk 3>;
119 clock-names = "cpu_1x";
120 clock-ranges;
121
122 ttc0_0: ttc0.0 {
123 status = "disabled";
124 reg = <0>;
125 interrupts = <0 10 4>;
126 };
127 ttc0_1: ttc0.1 {
128 status = "disabled";
129 reg = <1>;
130 interrupts = <0 11 4>;
131 };
132 ttc0_2: ttc0.2 {
133 status = "disabled";
134 reg = <2>;
135 interrupts = <0 12 4>;
136 };
137 };
138
139 ttc1: ttc1@f8002000 {
140 #interrupt-parent = <&intc>;
141 #address-cells = <1>;
142 #size-cells = <0>;
143 compatible = "xlnx,ttc";
144 reg = <0xF8002000 0x1000>;
145 clocks = <&cpu_clk 3>;
146 clock-names = "cpu_1x";
147 clock-ranges;
148
149 ttc1_0: ttc1.0 {
150 status = "disabled";
151 reg = <0>;
152 interrupts = <0 37 4>;
153 };
154 ttc1_1: ttc1.1 {
155 status = "disabled";
156 reg = <1>;
157 interrupts = <0 38 4>;
158 };
159 ttc1_2: ttc1.2 {
160 status = "disabled";
161 reg = <2>;
162 interrupts = <0 39 4>;
163 };
164 };
165 };
166};
diff --git a/arch/arm/boot/dts/zynq-ep107.dts b/arch/arm/boot/dts/zynq-ep107.dts
deleted file mode 100644
index 574bc044f572..000000000000
--- a/arch/arm/boot/dts/zynq-ep107.dts
+++ /dev/null
@@ -1,63 +0,0 @@
1/*
2 * Copyright (C) 2011 Xilinx
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14/dts-v1/;
15/ {
16 model = "Xilinx Zynq EP107";
17 compatible = "xlnx,zynq-ep107";
18 #address-cells = <1>;
19 #size-cells = <1>;
20 interrupt-parent = <&intc>;
21
22 memory {
23 device_type = "memory";
24 reg = <0x0 0x10000000>;
25 };
26
27 chosen {
28 bootargs = "console=ttyPS0,9600 root=/dev/ram rw initrd=0x800000,8M earlyprintk";
29 linux,stdout-path = &uart0;
30 };
31
32 amba {
33 compatible = "simple-bus";
34 #address-cells = <1>;
35 #size-cells = <1>;
36 ranges;
37
38 intc: interrupt-controller@f8f01000 {
39 compatible = "arm,cortex-a9-gic";
40 #interrupt-cells = <3>;
41 #address-cells = <1>;
42 interrupt-controller;
43 reg = <0xF8F01000 0x1000>,
44 <0xF8F00100 0x100>;
45 };
46
47 L2: cache-controller {
48 compatible = "arm,pl310-cache";
49 reg = <0xF8F02000 0x1000>;
50 arm,data-latency = <2 3 2>;
51 arm,tag-latency = <2 3 2>;
52 cache-unified;
53 cache-level = <2>;
54 };
55
56 uart0: uart@e0000000 {
57 compatible = "xlnx,xuartps";
58 reg = <0xE0000000 0x1000>;
59 interrupts = <0 27 4>;
60 clock = <50000000>;
61 };
62 };
63};
diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
new file mode 100644
index 000000000000..c772942a399a
--- /dev/null
+++ b/arch/arm/boot/dts/zynq-zc702.dts
@@ -0,0 +1,44 @@
1/*
2 * Copyright (C) 2011 Xilinx
3 * Copyright (C) 2012 National Instruments Corp.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14/dts-v1/;
15/include/ "zynq-7000.dtsi"
16
17/ {
18 model = "Zynq ZC702 Development Board";
19 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
20
21 memory {
22 device_type = "memory";
23 reg = <0x0 0x40000000>;
24 };
25
26 chosen {
27 bootargs = "console=ttyPS1,115200 earlyprintk";
28 };
29
30};
31
32&ps_clk {
33 clock-frequency = <33333330>;
34};
35
36&ttc0_0 {
37 status = "ok";
38 compatible = "xlnx,ttc-counter-clocksource";
39};
40
41&ttc0_1 {
42 status = "ok";
43 compatible = "xlnx,ttc-counter-clockevent";
44};
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-05 15:02:58 -0500