1 files changed, 5 insertions, 2 deletions

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index d9ddecbb859c..220662f38435 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -758,16 +758,19 @@
                         compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
                         reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
                         clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
-                                 <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>;
+                                 <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&zs_clk>,
+                                 <&zs_clk>;
                         #clock-cells = <1>;
                         renesas,clock-indices = <
                                 R8A7790_CLK_SCIFA2 R8A7790_CLK_SCIFA1 R8A7790_CLK_SCIFA0
                                 R8A7790_CLK_MSIOF2 R8A7790_CLK_SCIFB0 R8A7790_CLK_SCIFB1
                                 R8A7790_CLK_MSIOF1 R8A7790_CLK_MSIOF3 R8A7790_CLK_SCIFB2
+                                R8A7790_CLK_SYS_DMAC1 R8A7790_CLK_SYS_DMAC0
                         >;
                         clock-output-names =
                                 "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
-                                "scifb1", "msiof1", "msiof3", "scifb2";
+                                "scifb1", "msiof1", "msiof3", "scifb2",
+                                "sys-dmac1", "sys-dmac0";
                 };
                 mstp3_clks: mstp3_clks@e615013c {
                         compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";