diff options
Diffstat (limited to 'arch/arm/boot/dts/vt8500.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/vt8500.dtsi | 40 |
1 files changed, 36 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/vt8500.dtsi b/arch/arm/boot/dts/vt8500.dtsi index d8645e990b21..cf31ced46602 100644 --- a/arch/arm/boot/dts/vt8500.dtsi +++ b/arch/arm/boot/dts/vt8500.dtsi | |||
| @@ -45,6 +45,38 @@ | |||
| 45 | compatible = "fixed-clock"; | 45 | compatible = "fixed-clock"; |
| 46 | clock-frequency = <24000000>; | 46 | clock-frequency = <24000000>; |
| 47 | }; | 47 | }; |
| 48 | |||
| 49 | clkuart0: uart0 { | ||
| 50 | #clock-cells = <0>; | ||
| 51 | compatible = "via,vt8500-device-clock"; | ||
| 52 | clocks = <&ref24>; | ||
| 53 | enable-reg = <0x250>; | ||
| 54 | enable-bit = <1>; | ||
| 55 | }; | ||
| 56 | |||
| 57 | clkuart1: uart1 { | ||
| 58 | #clock-cells = <0>; | ||
| 59 | compatible = "via,vt8500-device-clock"; | ||
| 60 | clocks = <&ref24>; | ||
| 61 | enable-reg = <0x250>; | ||
| 62 | enable-bit = <2>; | ||
| 63 | }; | ||
| 64 | |||
| 65 | clkuart2: uart2 { | ||
| 66 | #clock-cells = <0>; | ||
| 67 | compatible = "via,vt8500-device-clock"; | ||
| 68 | clocks = <&ref24>; | ||
| 69 | enable-reg = <0x250>; | ||
| 70 | enable-bit = <3>; | ||
| 71 | }; | ||
| 72 | |||
| 73 | clkuart3: uart3 { | ||
| 74 | #clock-cells = <0>; | ||
| 75 | compatible = "via,vt8500-device-clock"; | ||
| 76 | clocks = <&ref24>; | ||
| 77 | enable-reg = <0x250>; | ||
| 78 | enable-bit = <4>; | ||
| 79 | }; | ||
| 48 | }; | 80 | }; |
| 49 | }; | 81 | }; |
| 50 | 82 | ||
| @@ -83,28 +115,28 @@ | |||
| 83 | compatible = "via,vt8500-uart"; | 115 | compatible = "via,vt8500-uart"; |
| 84 | reg = <0xd8200000 0x1040>; | 116 | reg = <0xd8200000 0x1040>; |
| 85 | interrupts = <32>; | 117 | interrupts = <32>; |
| 86 | clocks = <&ref24>; | 118 | clocks = <&clkuart0>; |
| 87 | }; | 119 | }; |
| 88 | 120 | ||
| 89 | uart@d82b0000 { | 121 | uart@d82b0000 { |
| 90 | compatible = "via,vt8500-uart"; | 122 | compatible = "via,vt8500-uart"; |
| 91 | reg = <0xd82b0000 0x1040>; | 123 | reg = <0xd82b0000 0x1040>; |
| 92 | interrupts = <33>; | 124 | interrupts = <33>; |
| 93 | clocks = <&ref24>; | 125 | clocks = <&clkuart1>; |
| 94 | }; | 126 | }; |
| 95 | 127 | ||
| 96 | uart@d8210000 { | 128 | uart@d8210000 { |
| 97 | compatible = "via,vt8500-uart"; | 129 | compatible = "via,vt8500-uart"; |
| 98 | reg = <0xd8210000 0x1040>; | 130 | reg = <0xd8210000 0x1040>; |
| 99 | interrupts = <47>; | 131 | interrupts = <47>; |
| 100 | clocks = <&ref24>; | 132 | clocks = <&clkuart2>; |
| 101 | }; | 133 | }; |
| 102 | 134 | ||
| 103 | uart@d82c0000 { | 135 | uart@d82c0000 { |
| 104 | compatible = "via,vt8500-uart"; | 136 | compatible = "via,vt8500-uart"; |
| 105 | reg = <0xd82c0000 0x1040>; | 137 | reg = <0xd82c0000 0x1040>; |
| 106 | interrupts = <50>; | 138 | interrupts = <50>; |
| 107 | clocks = <&ref24>; | 139 | clocks = <&clkuart3>; |
| 108 | }; | 140 | }; |
| 109 | 141 | ||
| 110 | rtc@d8100000 { | 142 | rtc@d8100000 { |
