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Diffstat (limited to 'arch/arm/boot/dts/tegra20.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi40
1 files changed, 20 insertions, 20 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index c417d67e9027..9f1921634eb7 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -72,7 +72,7 @@
72 reg = <0x70002800 0x200>; 72 reg = <0x70002800 0x200>;
73 interrupts = <0 13 0x04>; 73 interrupts = <0 13 0x04>;
74 nvidia,dma-request-selector = <&apbdma 2>; 74 nvidia,dma-request-selector = <&apbdma 2>;
75 status = "disable"; 75 status = "disabled";
76 }; 76 };
77 77
78 tegra_i2s2: i2s@70002a00 { 78 tegra_i2s2: i2s@70002a00 {
@@ -80,7 +80,7 @@
80 reg = <0x70002a00 0x200>; 80 reg = <0x70002a00 0x200>;
81 interrupts = <0 3 0x04>; 81 interrupts = <0 3 0x04>;
82 nvidia,dma-request-selector = <&apbdma 1>; 82 nvidia,dma-request-selector = <&apbdma 1>;
83 status = "disable"; 83 status = "disabled";
84 }; 84 };
85 85
86 serial@70006000 { 86 serial@70006000 {
@@ -88,7 +88,7 @@
88 reg = <0x70006000 0x40>; 88 reg = <0x70006000 0x40>;
89 reg-shift = <2>; 89 reg-shift = <2>;
90 interrupts = <0 36 0x04>; 90 interrupts = <0 36 0x04>;
91 status = "disable"; 91 status = "disabled";
92 }; 92 };
93 93
94 serial@70006040 { 94 serial@70006040 {
@@ -96,7 +96,7 @@
96 reg = <0x70006040 0x40>; 96 reg = <0x70006040 0x40>;
97 reg-shift = <2>; 97 reg-shift = <2>;
98 interrupts = <0 37 0x04>; 98 interrupts = <0 37 0x04>;
99 status = "disable"; 99 status = "disabled";
100 }; 100 };
101 101
102 serial@70006200 { 102 serial@70006200 {
@@ -104,7 +104,7 @@
104 reg = <0x70006200 0x100>; 104 reg = <0x70006200 0x100>;
105 reg-shift = <2>; 105 reg-shift = <2>;
106 interrupts = <0 46 0x04>; 106 interrupts = <0 46 0x04>;
107 status = "disable"; 107 status = "disabled";
108 }; 108 };
109 109
110 serial@70006300 { 110 serial@70006300 {
@@ -112,7 +112,7 @@
112 reg = <0x70006300 0x100>; 112 reg = <0x70006300 0x100>;
113 reg-shift = <2>; 113 reg-shift = <2>;
114 interrupts = <0 90 0x04>; 114 interrupts = <0 90 0x04>;
115 status = "disable"; 115 status = "disabled";
116 }; 116 };
117 117
118 serial@70006400 { 118 serial@70006400 {
@@ -120,7 +120,7 @@
120 reg = <0x70006400 0x100>; 120 reg = <0x70006400 0x100>;
121 reg-shift = <2>; 121 reg-shift = <2>;
122 interrupts = <0 91 0x04>; 122 interrupts = <0 91 0x04>;
123 status = "disable"; 123 status = "disabled";
124 }; 124 };
125 125
126 i2c@7000c000 { 126 i2c@7000c000 {
@@ -129,7 +129,7 @@
129 interrupts = <0 38 0x04>; 129 interrupts = <0 38 0x04>;
130 #address-cells = <1>; 130 #address-cells = <1>;
131 #size-cells = <0>; 131 #size-cells = <0>;
132 status = "disable"; 132 status = "disabled";
133 }; 133 };
134 134
135 i2c@7000c400 { 135 i2c@7000c400 {
@@ -138,7 +138,7 @@
138 interrupts = <0 84 0x04>; 138 interrupts = <0 84 0x04>;
139 #address-cells = <1>; 139 #address-cells = <1>;
140 #size-cells = <0>; 140 #size-cells = <0>;
141 status = "disable"; 141 status = "disabled";
142 }; 142 };
143 143
144 i2c@7000c500 { 144 i2c@7000c500 {
@@ -147,7 +147,7 @@
147 interrupts = <0 92 0x04>; 147 interrupts = <0 92 0x04>;
148 #address-cells = <1>; 148 #address-cells = <1>;
149 #size-cells = <0>; 149 #size-cells = <0>;
150 status = "disable"; 150 status = "disabled";
151 }; 151 };
152 152
153 i2c@7000d000 { 153 i2c@7000d000 {
@@ -156,7 +156,7 @@
156 interrupts = <0 53 0x04>; 156 interrupts = <0 53 0x04>;
157 #address-cells = <1>; 157 #address-cells = <1>;
158 #size-cells = <0>; 158 #size-cells = <0>;
159 status = "disable"; 159 status = "disabled";
160 }; 160 };
161 161
162 pmc { 162 pmc {
@@ -164,7 +164,7 @@
164 reg = <0x7000e400 0x400>; 164 reg = <0x7000e400 0x400>;
165 }; 165 };
166 166
167 mc { 167 memory-controller@0x7000f000 {
168 compatible = "nvidia,tegra20-mc"; 168 compatible = "nvidia,tegra20-mc";
169 reg = <0x7000f000 0x024 169 reg = <0x7000f000 0x024
170 0x7000f03c 0x3c4>; 170 0x7000f03c 0x3c4>;
@@ -177,7 +177,7 @@
177 0x58000000 0x02000000>; /* GART aperture */ 177 0x58000000 0x02000000>; /* GART aperture */
178 }; 178 };
179 179
180 emc { 180 memory-controller@0x7000f400 {
181 compatible = "nvidia,tegra20-emc"; 181 compatible = "nvidia,tegra20-emc";
182 reg = <0x7000f400 0x200>; 182 reg = <0x7000f400 0x200>;
183 #address-cells = <1>; 183 #address-cells = <1>;
@@ -190,7 +190,7 @@
190 interrupts = <0 20 0x04>; 190 interrupts = <0 20 0x04>;
191 phy_type = "utmi"; 191 phy_type = "utmi";
192 nvidia,has-legacy-mode; 192 nvidia,has-legacy-mode;
193 status = "disable"; 193 status = "disabled";
194 }; 194 };
195 195
196 usb@c5004000 { 196 usb@c5004000 {
@@ -198,7 +198,7 @@
198 reg = <0xc5004000 0x4000>; 198 reg = <0xc5004000 0x4000>;
199 interrupts = <0 21 0x04>; 199 interrupts = <0 21 0x04>;
200 phy_type = "ulpi"; 200 phy_type = "ulpi";
201 status = "disable"; 201 status = "disabled";
202 }; 202 };
203 203
204 usb@c5008000 { 204 usb@c5008000 {
@@ -206,35 +206,35 @@
206 reg = <0xc5008000 0x4000>; 206 reg = <0xc5008000 0x4000>;
207 interrupts = <0 97 0x04>; 207 interrupts = <0 97 0x04>;
208 phy_type = "utmi"; 208 phy_type = "utmi";
209 status = "disable"; 209 status = "disabled";
210 }; 210 };
211 211
212 sdhci@c8000000 { 212 sdhci@c8000000 {
213 compatible = "nvidia,tegra20-sdhci"; 213 compatible = "nvidia,tegra20-sdhci";
214 reg = <0xc8000000 0x200>; 214 reg = <0xc8000000 0x200>;
215 interrupts = <0 14 0x04>; 215 interrupts = <0 14 0x04>;
216 status = "disable"; 216 status = "disabled";
217 }; 217 };
218 218
219 sdhci@c8000200 { 219 sdhci@c8000200 {
220 compatible = "nvidia,tegra20-sdhci"; 220 compatible = "nvidia,tegra20-sdhci";
221 reg = <0xc8000200 0x200>; 221 reg = <0xc8000200 0x200>;
222 interrupts = <0 15 0x04>; 222 interrupts = <0 15 0x04>;
223 status = "disable"; 223 status = "disabled";
224 }; 224 };
225 225
226 sdhci@c8000400 { 226 sdhci@c8000400 {
227 compatible = "nvidia,tegra20-sdhci"; 227 compatible = "nvidia,tegra20-sdhci";
228 reg = <0xc8000400 0x200>; 228 reg = <0xc8000400 0x200>;
229 interrupts = <0 19 0x04>; 229 interrupts = <0 19 0x04>;
230 status = "disable"; 230 status = "disabled";
231 }; 231 };
232 232
233 sdhci@c8000600 { 233 sdhci@c8000600 {
234 compatible = "nvidia,tegra20-sdhci"; 234 compatible = "nvidia,tegra20-sdhci";
235 reg = <0xc8000600 0x200>; 235 reg = <0xc8000600 0x200>;
236 interrupts = <0 31 0x04>; 236 interrupts = <0 31 0x04>;
237 status = "disable"; 237 status = "disabled";
238 }; 238 };
239 239
240 pmu { 240 pmu {