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Diffstat (limited to 'arch/arm/boot/dts/sun7i-a20.dtsi')
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi95
1 files changed, 95 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index aba1c8a3f388..385933bac114 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -57,6 +57,12 @@
57 <1 10 0xf08>; 57 <1 10 0xf08>;
58 }; 58 };
59 59
60 pmu {
61 compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu";
62 interrupts = <0 120 4>,
63 <0 121 4>;
64 };
65
60 clocks { 66 clocks {
61 #address-cells = <1>; 67 #address-cells = <1>;
62 #size-cells = <1>; 68 #size-cells = <1>;
@@ -455,6 +461,42 @@
455 #size-cells = <0>; 461 #size-cells = <0>;
456 }; 462 };
457 463
464 mmc0: mmc@01c0f000 {
465 compatible = "allwinner,sun5i-a13-mmc";
466 reg = <0x01c0f000 0x1000>;
467 clocks = <&ahb_gates 8>, <&mmc0_clk>;
468 clock-names = "ahb", "mmc";
469 interrupts = <0 32 4>;
470 status = "disabled";
471 };
472
473 mmc1: mmc@01c10000 {
474 compatible = "allwinner,sun5i-a13-mmc";
475 reg = <0x01c10000 0x1000>;
476 clocks = <&ahb_gates 9>, <&mmc1_clk>;
477 clock-names = "ahb", "mmc";
478 interrupts = <0 33 4>;
479 status = "disabled";
480 };
481
482 mmc2: mmc@01c11000 {
483 compatible = "allwinner,sun5i-a13-mmc";
484 reg = <0x01c11000 0x1000>;
485 clocks = <&ahb_gates 10>, <&mmc2_clk>;
486 clock-names = "ahb", "mmc";
487 interrupts = <0 34 4>;
488 status = "disabled";
489 };
490
491 mmc3: mmc@01c12000 {
492 compatible = "allwinner,sun5i-a13-mmc";
493 reg = <0x01c12000 0x1000>;
494 clocks = <&ahb_gates 11>, <&mmc3_clk>;
495 clock-names = "ahb", "mmc";
496 interrupts = <0 35 4>;
497 status = "disabled";
498 };
499
458 usbphy: phy@01c13400 { 500 usbphy: phy@01c13400 {
459 #phy-cells = <1>; 501 #phy-cells = <1>;
460 compatible = "allwinner,sun7i-a20-usb-phy"; 502 compatible = "allwinner,sun7i-a20-usb-phy";
@@ -548,6 +590,20 @@
548 #size-cells = <0>; 590 #size-cells = <0>;
549 #gpio-cells = <3>; 591 #gpio-cells = <3>;
550 592
593 pwm0_pins_a: pwm0@0 {
594 allwinner,pins = "PB2";
595 allwinner,function = "pwm";
596 allwinner,drive = <0>;
597 allwinner,pull = <0>;
598 };
599
600 pwm1_pins_a: pwm1@0 {
601 allwinner,pins = "PI3";
602 allwinner,function = "pwm";
603 allwinner,drive = <0>;
604 allwinner,pull = <0>;
605 };
606
551 uart0_pins_a: uart0@0 { 607 uart0_pins_a: uart0@0 {
552 allwinner,pins = "PB22", "PB23"; 608 allwinner,pins = "PB22", "PB23";
553 allwinner,function = "uart0"; 609 allwinner,function = "uart0";
@@ -661,6 +717,27 @@
661 allwinner,drive = <0>; 717 allwinner,drive = <0>;
662 allwinner,pull = <0>; 718 allwinner,pull = <0>;
663 }; 719 };
720
721 mmc0_pins_a: mmc0@0 {
722 allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
723 allwinner,function = "mmc0";
724 allwinner,drive = <2>;
725 allwinner,pull = <0>;
726 };
727
728 mmc0_cd_pin_reference_design: mmc0_cd_pin@0 {
729 allwinner,pins = "PH1";
730 allwinner,function = "gpio_in";
731 allwinner,drive = <0>;
732 allwinner,pull = <1>;
733 };
734
735 mmc3_pins_a: mmc3@0 {
736 allwinner,pins = "PI4","PI5","PI6","PI7","PI8","PI9";
737 allwinner,function = "mmc3";
738 allwinner,drive = <2>;
739 allwinner,pull = <0>;
740 };
664 }; 741 };
665 742
666 timer@01c20c00 { 743 timer@01c20c00 {
@@ -686,6 +763,14 @@
686 interrupts = <0 24 4>; 763 interrupts = <0 24 4>;
687 }; 764 };
688 765
766 pwm: pwm@01c20e00 {
767 compatible = "allwinner,sun7i-a20-pwm";
768 reg = <0x01c20e00 0xc>;
769 clocks = <&osc24M>;
770 #pwm-cells = <3>;
771 status = "disabled";
772 };
773
689 sid: eeprom@01c23800 { 774 sid: eeprom@01c23800 {
690 compatible = "allwinner,sun7i-a20-sid"; 775 compatible = "allwinner,sun7i-a20-sid";
691 reg = <0x01c23800 0x200>; 776 reg = <0x01c23800 0x200>;
@@ -784,6 +869,8 @@
784 clocks = <&apb1_gates 0>; 869 clocks = <&apb1_gates 0>;
785 clock-frequency = <100000>; 870 clock-frequency = <100000>;
786 status = "disabled"; 871 status = "disabled";
872 #address-cells = <1>;
873 #size-cells = <0>;
787 }; 874 };
788 875
789 i2c1: i2c@01c2b000 { 876 i2c1: i2c@01c2b000 {
@@ -793,6 +880,8 @@
793 clocks = <&apb1_gates 1>; 880 clocks = <&apb1_gates 1>;
794 clock-frequency = <100000>; 881 clock-frequency = <100000>;
795 status = "disabled"; 882 status = "disabled";
883 #address-cells = <1>;
884 #size-cells = <0>;
796 }; 885 };
797 886
798 i2c2: i2c@01c2b400 { 887 i2c2: i2c@01c2b400 {
@@ -802,6 +891,8 @@
802 clocks = <&apb1_gates 2>; 891 clocks = <&apb1_gates 2>;
803 clock-frequency = <100000>; 892 clock-frequency = <100000>;
804 status = "disabled"; 893 status = "disabled";
894 #address-cells = <1>;
895 #size-cells = <0>;
805 }; 896 };
806 897
807 i2c3: i2c@01c2b800 { 898 i2c3: i2c@01c2b800 {
@@ -811,6 +902,8 @@
811 clocks = <&apb1_gates 3>; 902 clocks = <&apb1_gates 3>;
812 clock-frequency = <100000>; 903 clock-frequency = <100000>;
813 status = "disabled"; 904 status = "disabled";
905 #address-cells = <1>;
906 #size-cells = <0>;
814 }; 907 };
815 908
816 i2c4: i2c@01c2c000 { 909 i2c4: i2c@01c2c000 {
@@ -820,6 +913,8 @@
820 clocks = <&apb1_gates 15>; 913 clocks = <&apb1_gates 15>;
821 clock-frequency = <100000>; 914 clock-frequency = <100000>;
822 status = "disabled"; 915 status = "disabled";
916 #address-cells = <1>;
917 #size-cells = <0>;
823 }; 918 };
824 919
825 gmac: ethernet@01c50000 { 920 gmac: ethernet@01c50000 {