diff options
Diffstat (limited to 'arch/arm/boot/dts/sun7i-a20.dtsi')
-rw-r--r-- | arch/arm/boot/dts/sun7i-a20.dtsi | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 32efc105df83..aba1c8a3f388 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi | |||
@@ -87,7 +87,7 @@ | |||
87 | 87 | ||
88 | pll4: clk@01c20018 { | 88 | pll4: clk@01c20018 { |
89 | #clock-cells = <0>; | 89 | #clock-cells = <0>; |
90 | compatible = "allwinner,sun4i-a10-pll1-clk"; | 90 | compatible = "allwinner,sun7i-a20-pll4-clk"; |
91 | reg = <0x01c20018 0x4>; | 91 | reg = <0x01c20018 0x4>; |
92 | clocks = <&osc24M>; | 92 | clocks = <&osc24M>; |
93 | clock-output-names = "pll4"; | 93 | clock-output-names = "pll4"; |
@@ -109,6 +109,14 @@ | |||
109 | clock-output-names = "pll6_sata", "pll6_other", "pll6"; | 109 | clock-output-names = "pll6_sata", "pll6_other", "pll6"; |
110 | }; | 110 | }; |
111 | 111 | ||
112 | pll8: clk@01c20040 { | ||
113 | #clock-cells = <0>; | ||
114 | compatible = "allwinner,sun7i-a20-pll4-clk"; | ||
115 | reg = <0x01c20040 0x4>; | ||
116 | clocks = <&osc24M>; | ||
117 | clock-output-names = "pll8"; | ||
118 | }; | ||
119 | |||
112 | cpu: cpu@01c20054 { | 120 | cpu: cpu@01c20054 { |
113 | #clock-cells = <0>; | 121 | #clock-cells = <0>; |
114 | compatible = "allwinner,sun4i-a10-cpu-clk"; | 122 | compatible = "allwinner,sun4i-a10-cpu-clk"; |
@@ -805,9 +813,9 @@ | |||
805 | status = "disabled"; | 813 | status = "disabled"; |
806 | }; | 814 | }; |
807 | 815 | ||
808 | i2c4: i2c@01c2bc00 { | 816 | i2c4: i2c@01c2c000 { |
809 | compatible = "allwinner,sun4i-i2c"; | 817 | compatible = "allwinner,sun4i-i2c"; |
810 | reg = <0x01c2bc00 0x400>; | 818 | reg = <0x01c2c000 0x400>; |
811 | interrupts = <0 89 4>; | 819 | interrupts = <0 89 4>; |
812 | clocks = <&apb1_gates 15>; | 820 | clocks = <&apb1_gates 15>; |
813 | clock-frequency = <100000>; | 821 | clock-frequency = <100000>; |