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Diffstat (limited to 'arch/arm/boot/dts/sun5i-a13.dtsi')
-rw-r--r--arch/arm/boot/dts/sun5i-a13.dtsi89
1 files changed, 66 insertions, 23 deletions
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index 31fa38f8cc98..7363211daf84 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -17,8 +17,12 @@
17 interrupt-parent = <&intc>; 17 interrupt-parent = <&intc>;
18 18
19 cpus { 19 cpus {
20 #address-cells = <1>;
21 #size-cells = <0>;
20 cpu@0 { 22 cpu@0 {
23 device_type = "cpu";
21 compatible = "arm,cortex-a8"; 24 compatible = "arm,cortex-a8";
25 reg = <0x0>;
22 }; 26 };
23 }; 27 };
24 28
@@ -95,20 +99,15 @@
95 99
96 ahb_gates: ahb_gates@01c20060 { 100 ahb_gates: ahb_gates@01c20060 {
97 #clock-cells = <1>; 101 #clock-cells = <1>;
98 compatible = "allwinner,sun4i-ahb-gates-clk"; 102 compatible = "allwinner,sun5i-a13-ahb-gates-clk";
99 reg = <0x01c20060 0x8>; 103 reg = <0x01c20060 0x8>;
100 clocks = <&ahb>; 104 clocks = <&ahb>;
101 clock-output-names = "ahb_usb0", "ahb_ehci0", 105 clock-output-names = "ahb_usbotg", "ahb_ehci", "ahb_ohci",
102 "ahb_ohci0", "ahb_ehci1", "ahb_ohci1", "ahb_ss", 106 "ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0",
103 "ahb_dma", "ahb_bist", "ahb_mmc0", "ahb_mmc1", 107 "ahb_mmc1", "ahb_mmc2", "ahb_nand", "ahb_sdram",
104 "ahb_mmc2", "ahb_mmc3", "ahb_ms", "ahb_nand", 108 "ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_stimer",
105 "ahb_sdram", "ahb_ace", "ahb_emac", "ahb_ts", 109 "ahb_ve", "ahb_lcd", "ahb_csi", "ahb_de_be",
106 "ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_spi3", 110 "ahb_de_fe", "ahb_iep", "ahb_mali400";
107 "ahb_pata", "ahb_sata", "ahb_gps", "ahb_ve",
108 "ahb_tvd", "ahb_tve0", "ahb_tve1", "ahb_lcd0",
109 "ahb_lcd1", "ahb_csi0", "ahb_csi1", "ahb_hdmi",
110 "ahb_de_be0", "ahb_de_be1", "ahb_de_fe0",
111 "ahb_de_fe1", "ahb_mp", "ahb_mali400";
112 }; 111 };
113 112
114 apb0: apb0@01c20054 { 113 apb0: apb0@01c20054 {
@@ -120,15 +119,13 @@
120 119
121 apb0_gates: apb0_gates@01c20068 { 120 apb0_gates: apb0_gates@01c20068 {
122 #clock-cells = <1>; 121 #clock-cells = <1>;
123 compatible = "allwinner,sun4i-apb0-gates-clk"; 122 compatible = "allwinner,sun5i-a13-apb0-gates-clk";
124 reg = <0x01c20068 0x4>; 123 reg = <0x01c20068 0x4>;
125 clocks = <&apb0>; 124 clocks = <&apb0>;
126 clock-output-names = "apb0_codec", "apb0_spdif", 125 clock-output-names = "apb0_codec", "apb0_pio", "apb0_ir";
127 "apb0_ac97", "apb0_iis", "apb0_pio", "apb0_ir0",
128 "apb0_ir1", "apb0_keypad";
129 }; 126 };
130 127
131 /* dummy is pll62 */ 128 /* dummy is pll6 */
132 apb1_mux: apb1_mux@01c20058 { 129 apb1_mux: apb1_mux@01c20058 {
133 #clock-cells = <0>; 130 #clock-cells = <0>;
134 compatible = "allwinner,sun4i-apb1-mux-clk"; 131 compatible = "allwinner,sun4i-apb1-mux-clk";
@@ -145,15 +142,11 @@
145 142
146 apb1_gates: apb1_gates@01c2006c { 143 apb1_gates: apb1_gates@01c2006c {
147 #clock-cells = <1>; 144 #clock-cells = <1>;
148 compatible = "allwinner,sun4i-apb1-gates-clk"; 145 compatible = "allwinner,sun5i-a13-apb1-gates-clk";
149 reg = <0x01c2006c 0x4>; 146 reg = <0x01c2006c 0x4>;
150 clocks = <&apb1>; 147 clocks = <&apb1>;
151 clock-output-names = "apb1_i2c0", "apb1_i2c1", 148 clock-output-names = "apb1_i2c0", "apb1_i2c1",
152 "apb1_i2c2", "apb1_can", "apb1_scr", 149 "apb1_i2c2", "apb1_uart1", "apb1_uart3";
153 "apb1_ps20", "apb1_ps21", "apb1_uart0",
154 "apb1_uart1", "apb1_uart2", "apb1_uart3",
155 "apb1_uart4", "apb1_uart5", "apb1_uart6",
156 "apb1_uart7";
157 }; 150 };
158 }; 151 };
159 152
@@ -174,8 +167,10 @@
174 pio: pinctrl@01c20800 { 167 pio: pinctrl@01c20800 {
175 compatible = "allwinner,sun5i-a13-pinctrl"; 168 compatible = "allwinner,sun5i-a13-pinctrl";
176 reg = <0x01c20800 0x400>; 169 reg = <0x01c20800 0x400>;
170 interrupts = <28>;
177 clocks = <&apb0_gates 5>; 171 clocks = <&apb0_gates 5>;
178 gpio-controller; 172 gpio-controller;
173 interrupt-controller;
179 #address-cells = <1>; 174 #address-cells = <1>;
180 #size-cells = <0>; 175 #size-cells = <0>;
181 #gpio-cells = <3>; 176 #gpio-cells = <3>;
@@ -193,6 +188,27 @@
193 allwinner,drive = <0>; 188 allwinner,drive = <0>;
194 allwinner,pull = <0>; 189 allwinner,pull = <0>;
195 }; 190 };
191
192 i2c0_pins_a: i2c0@0 {
193 allwinner,pins = "PB0", "PB1";
194 allwinner,function = "i2c0";
195 allwinner,drive = <0>;
196 allwinner,pull = <0>;
197 };
198
199 i2c1_pins_a: i2c1@0 {
200 allwinner,pins = "PB15", "PB16";
201 allwinner,function = "i2c1";
202 allwinner,drive = <0>;
203 allwinner,pull = <0>;
204 };
205
206 i2c2_pins_a: i2c2@0 {
207 allwinner,pins = "PB17", "PB18";
208 allwinner,function = "i2c2";
209 allwinner,drive = <0>;
210 allwinner,pull = <0>;
211 };
196 }; 212 };
197 213
198 timer@01c20c00 { 214 timer@01c20c00 {
@@ -226,5 +242,32 @@
226 clocks = <&apb1_gates 19>; 242 clocks = <&apb1_gates 19>;
227 status = "disabled"; 243 status = "disabled";
228 }; 244 };
245
246 i2c0: i2c@01c2ac00 {
247 compatible = "allwinner,sun4i-i2c";
248 reg = <0x01c2ac00 0x400>;
249 interrupts = <7>;
250 clocks = <&apb1_gates 0>;
251 clock-frequency = <100000>;
252 status = "disabled";
253 };
254
255 i2c1: i2c@01c2b000 {
256 compatible = "allwinner,sun4i-i2c";
257 reg = <0x01c2b000 0x400>;
258 interrupts = <8>;
259 clocks = <&apb1_gates 1>;
260 clock-frequency = <100000>;
261 status = "disabled";
262 };
263
264 i2c2: i2c@01c2b400 {
265 compatible = "allwinner,sun4i-i2c";
266 reg = <0x01c2b400 0x400>;
267 interrupts = <9>;
268 clocks = <&apb1_gates 2>;
269 clock-frequency = <100000>;
270 status = "disabled";
271 };
229 }; 272 };
230}; 273};