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-rw-r--r--arch/arm/boot/dts/sun5i-a10s.dtsi76
1 files changed, 47 insertions, 29 deletions
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 1b76667f3182..905f84d141f0 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -11,17 +11,16 @@
11 * http://www.gnu.org/copyleft/gpl.html 11 * http://www.gnu.org/copyleft/gpl.html
12 */ 12 */
13 13
14/include/ "skeleton.dtsi" 14#include "skeleton.dtsi"
15
16#include <dt-bindings/dma/sun4i-a10.h>
17#include <dt-bindings/pinctrl/sun4i-a10.h>
15 18
16/ { 19/ {
17 interrupt-parent = <&intc>; 20 interrupt-parent = <&intc>;
18 21
19 aliases { 22 aliases {
20 ethernet0 = &emac; 23 ethernet0 = &emac;
21 serial0 = &uart0;
22 serial1 = &uart1;
23 serial2 = &uart2;
24 serial3 = &uart3;
25 }; 24 };
26 25
27 chosen { 26 chosen {
@@ -36,6 +35,14 @@
36 <&ahb_gates 44>; 35 <&ahb_gates 44>;
37 status = "disabled"; 36 status = "disabled";
38 }; 37 };
38
39 framebuffer@1 {
40 compatible = "allwinner,simple-framebuffer",
41 "simple-framebuffer";
42 allwinner,pipeline = "de_be0-lcd0";
43 clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
44 status = "disabled";
45 };
39 }; 46 };
40 47
41 cpus { 48 cpus {
@@ -320,7 +327,8 @@
320 interrupts = <10>; 327 interrupts = <10>;
321 clocks = <&ahb_gates 20>, <&spi0_clk>; 328 clocks = <&ahb_gates 20>, <&spi0_clk>;
322 clock-names = "ahb", "mod"; 329 clock-names = "ahb", "mod";
323 dmas = <&dma 1 27>, <&dma 1 26>; 330 dmas = <&dma SUN4I_DMA_DEDICATED 27>,
331 <&dma SUN4I_DMA_DEDICATED 26>;
324 dma-names = "rx", "tx"; 332 dma-names = "rx", "tx";
325 status = "disabled"; 333 status = "disabled";
326 #address-cells = <1>; 334 #address-cells = <1>;
@@ -333,7 +341,8 @@
333 interrupts = <11>; 341 interrupts = <11>;
334 clocks = <&ahb_gates 21>, <&spi1_clk>; 342 clocks = <&ahb_gates 21>, <&spi1_clk>;
335 clock-names = "ahb", "mod"; 343 clock-names = "ahb", "mod";
336 dmas = <&dma 1 9>, <&dma 1 8>; 344 dmas = <&dma SUN4I_DMA_DEDICATED 9>,
345 <&dma SUN4I_DMA_DEDICATED 8>;
337 dma-names = "rx", "tx"; 346 dma-names = "rx", "tx";
338 status = "disabled"; 347 status = "disabled";
339 #address-cells = <1>; 348 #address-cells = <1>;
@@ -348,7 +357,7 @@
348 status = "disabled"; 357 status = "disabled";
349 }; 358 };
350 359
351 mdio@01c0b080 { 360 mdio: mdio@01c0b080 {
352 compatible = "allwinner,sun4i-a10-mdio"; 361 compatible = "allwinner,sun4i-a10-mdio";
353 reg = <0x01c0b080 0x14>; 362 reg = <0x01c0b080 0x14>;
354 status = "disabled"; 363 status = "disabled";
@@ -390,8 +399,8 @@
390 reg-names = "phy_ctrl", "pmu1"; 399 reg-names = "phy_ctrl", "pmu1";
391 clocks = <&usb_clk 8>; 400 clocks = <&usb_clk 8>;
392 clock-names = "usb_phy"; 401 clock-names = "usb_phy";
393 resets = <&usb_clk 1>; 402 resets = <&usb_clk 0>, <&usb_clk 1>;
394 reset-names = "usb1_reset"; 403 reset-names = "usb0_reset", "usb1_reset";
395 status = "disabled"; 404 status = "disabled";
396 }; 405 };
397 406
@@ -421,7 +430,8 @@
421 interrupts = <12>; 430 interrupts = <12>;
422 clocks = <&ahb_gates 22>, <&spi2_clk>; 431 clocks = <&ahb_gates 22>, <&spi2_clk>;
423 clock-names = "ahb", "mod"; 432 clock-names = "ahb", "mod";
424 dmas = <&dma 1 29>, <&dma 1 28>; 433 dmas = <&dma SUN4I_DMA_DEDICATED 29>,
434 <&dma SUN4I_DMA_DEDICATED 28>;
425 dma-names = "rx", "tx"; 435 dma-names = "rx", "tx";
426 status = "disabled"; 436 status = "disabled";
427 #address-cells = <1>; 437 #address-cells = <1>;
@@ -449,22 +459,22 @@
449 uart0_pins_a: uart0@0 { 459 uart0_pins_a: uart0@0 {
450 allwinner,pins = "PB19", "PB20"; 460 allwinner,pins = "PB19", "PB20";
451 allwinner,function = "uart0"; 461 allwinner,function = "uart0";
452 allwinner,drive = <0>; 462 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
453 allwinner,pull = <0>; 463 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
454 }; 464 };
455 465
456 uart2_pins_a: uart2@0 { 466 uart2_pins_a: uart2@0 {
457 allwinner,pins = "PC18", "PC19"; 467 allwinner,pins = "PC18", "PC19";
458 allwinner,function = "uart2"; 468 allwinner,function = "uart2";
459 allwinner,drive = <0>; 469 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
460 allwinner,pull = <0>; 470 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
461 }; 471 };
462 472
463 uart3_pins_a: uart3@0 { 473 uart3_pins_a: uart3@0 {
464 allwinner,pins = "PG9", "PG10"; 474 allwinner,pins = "PG9", "PG10";
465 allwinner,function = "uart3"; 475 allwinner,function = "uart3";
466 allwinner,drive = <0>; 476 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
467 allwinner,pull = <0>; 477 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
468 }; 478 };
469 479
470 emac_pins_a: emac0@0 { 480 emac_pins_a: emac0@0 {
@@ -474,43 +484,43 @@
474 "PA11", "PA12", "PA13", "PA14", 484 "PA11", "PA12", "PA13", "PA14",
475 "PA15", "PA16"; 485 "PA15", "PA16";
476 allwinner,function = "emac"; 486 allwinner,function = "emac";
477 allwinner,drive = <0>; 487 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
478 allwinner,pull = <0>; 488 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
479 }; 489 };
480 490
481 i2c0_pins_a: i2c0@0 { 491 i2c0_pins_a: i2c0@0 {
482 allwinner,pins = "PB0", "PB1"; 492 allwinner,pins = "PB0", "PB1";
483 allwinner,function = "i2c0"; 493 allwinner,function = "i2c0";
484 allwinner,drive = <0>; 494 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
485 allwinner,pull = <0>; 495 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
486 }; 496 };
487 497
488 i2c1_pins_a: i2c1@0 { 498 i2c1_pins_a: i2c1@0 {
489 allwinner,pins = "PB15", "PB16"; 499 allwinner,pins = "PB15", "PB16";
490 allwinner,function = "i2c1"; 500 allwinner,function = "i2c1";
491 allwinner,drive = <0>; 501 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
492 allwinner,pull = <0>; 502 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
493 }; 503 };
494 504
495 i2c2_pins_a: i2c2@0 { 505 i2c2_pins_a: i2c2@0 {
496 allwinner,pins = "PB17", "PB18"; 506 allwinner,pins = "PB17", "PB18";
497 allwinner,function = "i2c2"; 507 allwinner,function = "i2c2";
498 allwinner,drive = <0>; 508 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
499 allwinner,pull = <0>; 509 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
500 }; 510 };
501 511
502 mmc0_pins_a: mmc0@0 { 512 mmc0_pins_a: mmc0@0 {
503 allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5"; 513 allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
504 allwinner,function = "mmc0"; 514 allwinner,function = "mmc0";
505 allwinner,drive = <2>; 515 allwinner,drive = <SUN4I_PINCTRL_30_MA>;
506 allwinner,pull = <0>; 516 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
507 }; 517 };
508 518
509 mmc1_pins_a: mmc1@0 { 519 mmc1_pins_a: mmc1@0 {
510 allwinner,pins = "PG3","PG4","PG5","PG6","PG7","PG8"; 520 allwinner,pins = "PG3","PG4","PG5","PG6","PG7","PG8";
511 allwinner,function = "mmc1"; 521 allwinner,function = "mmc1";
512 allwinner,drive = <2>; 522 allwinner,drive = <SUN4I_PINCTRL_30_MA>;
513 allwinner,pull = <0>; 523 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
514 }; 524 };
515 }; 525 };
516 526
@@ -526,6 +536,13 @@
526 reg = <0x01c20c90 0x10>; 536 reg = <0x01c20c90 0x10>;
527 }; 537 };
528 538
539 lradc: lradc@01c22800 {
540 compatible = "allwinner,sun4i-a10-lradc-keys";
541 reg = <0x01c22800 0x100>;
542 interrupts = <31>;
543 status = "disabled";
544 };
545
529 sid: eeprom@01c23800 { 546 sid: eeprom@01c23800 {
530 compatible = "allwinner,sun4i-a10-sid"; 547 compatible = "allwinner,sun4i-a10-sid";
531 reg = <0x01c23800 0x10>; 548 reg = <0x01c23800 0x10>;
@@ -535,6 +552,7 @@
535 compatible = "allwinner,sun4i-a10-ts"; 552 compatible = "allwinner,sun4i-a10-ts";
536 reg = <0x01c25000 0x100>; 553 reg = <0x01c25000 0x100>;
537 interrupts = <29>; 554 interrupts = <29>;
555 #thermal-sensor-cells = <0>;
538 }; 556 };
539 557
540 uart0: serial@01c28000 { 558 uart0: serial@01c28000 {
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-14 11:30:15 -0500