aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/sun5i-a10s.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/boot/dts/sun5i-a10s.dtsi')
-rw-r--r--arch/arm/boot/dts/sun5i-a10s.dtsi54
1 files changed, 39 insertions, 15 deletions
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 1b76667f3182..0e011427615f 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -211,27 +211,33 @@
211 }; 211 };
212 212
213 mmc0_clk: clk@01c20088 { 213 mmc0_clk: clk@01c20088 {
214 #clock-cells = <0>; 214 #clock-cells = <1>;
215 compatible = "allwinner,sun4i-a10-mod0-clk"; 215 compatible = "allwinner,sun4i-a10-mmc-clk";
216 reg = <0x01c20088 0x4>; 216 reg = <0x01c20088 0x4>;
217 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 217 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
218 clock-output-names = "mmc0"; 218 clock-output-names = "mmc0",
219 "mmc0_output",
220 "mmc0_sample";
219 }; 221 };
220 222
221 mmc1_clk: clk@01c2008c { 223 mmc1_clk: clk@01c2008c {
222 #clock-cells = <0>; 224 #clock-cells = <1>;
223 compatible = "allwinner,sun4i-a10-mod0-clk"; 225 compatible = "allwinner,sun4i-a10-mmc-clk";
224 reg = <0x01c2008c 0x4>; 226 reg = <0x01c2008c 0x4>;
225 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 227 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
226 clock-output-names = "mmc1"; 228 clock-output-names = "mmc1",
229 "mmc1_output",
230 "mmc1_sample";
227 }; 231 };
228 232
229 mmc2_clk: clk@01c20090 { 233 mmc2_clk: clk@01c20090 {
230 #clock-cells = <0>; 234 #clock-cells = <1>;
231 compatible = "allwinner,sun4i-a10-mod0-clk"; 235 compatible = "allwinner,sun4i-a10-mmc-clk";
232 reg = <0x01c20090 0x4>; 236 reg = <0x01c20090 0x4>;
233 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 237 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
234 clock-output-names = "mmc2"; 238 clock-output-names = "mmc2",
239 "mmc2_output",
240 "mmc2_sample";
235 }; 241 };
236 242
237 ts_clk: clk@01c20098 { 243 ts_clk: clk@01c20098 {
@@ -359,8 +365,14 @@
359 mmc0: mmc@01c0f000 { 365 mmc0: mmc@01c0f000 {
360 compatible = "allwinner,sun5i-a13-mmc"; 366 compatible = "allwinner,sun5i-a13-mmc";
361 reg = <0x01c0f000 0x1000>; 367 reg = <0x01c0f000 0x1000>;
362 clocks = <&ahb_gates 8>, <&mmc0_clk>; 368 clocks = <&ahb_gates 8>,
363 clock-names = "ahb", "mmc"; 369 <&mmc0_clk 0>,
370 <&mmc0_clk 1>,
371 <&mmc0_clk 2>;
372 clock-names = "ahb",
373 "mmc",
374 "output",
375 "sample";
364 interrupts = <32>; 376 interrupts = <32>;
365 status = "disabled"; 377 status = "disabled";
366 }; 378 };
@@ -368,8 +380,14 @@
368 mmc1: mmc@01c10000 { 380 mmc1: mmc@01c10000 {
369 compatible = "allwinner,sun5i-a13-mmc"; 381 compatible = "allwinner,sun5i-a13-mmc";
370 reg = <0x01c10000 0x1000>; 382 reg = <0x01c10000 0x1000>;
371 clocks = <&ahb_gates 9>, <&mmc1_clk>; 383 clocks = <&ahb_gates 9>,
372 clock-names = "ahb", "mmc"; 384 <&mmc1_clk 0>,
385 <&mmc1_clk 1>,
386 <&mmc1_clk 2>;
387 clock-names = "ahb",
388 "mmc",
389 "output",
390 "sample";
373 interrupts = <33>; 391 interrupts = <33>;
374 status = "disabled"; 392 status = "disabled";
375 }; 393 };
@@ -377,8 +395,14 @@
377 mmc2: mmc@01c11000 { 395 mmc2: mmc@01c11000 {
378 compatible = "allwinner,sun5i-a13-mmc"; 396 compatible = "allwinner,sun5i-a13-mmc";
379 reg = <0x01c11000 0x1000>; 397 reg = <0x01c11000 0x1000>;
380 clocks = <&ahb_gates 10>, <&mmc2_clk>; 398 clocks = <&ahb_gates 10>,
381 clock-names = "ahb", "mmc"; 399 <&mmc2_clk 0>,
400 <&mmc2_clk 1>,
401 <&mmc2_clk 2>;
402 clock-names = "ahb",
403 "mmc",
404 "output",
405 "sample";
382 interrupts = <34>; 406 interrupts = <34>;
383 status = "disabled"; 407 status = "disabled";
384 }; 408 };