diff options
Diffstat (limited to 'arch/arm/boot/dts/stih416.dtsi')
-rw-r--r-- | arch/arm/boot/dts/stih416.dtsi | 96 |
1 files changed, 96 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi new file mode 100644 index 000000000000..3cecd9689a49 --- /dev/null +++ b/arch/arm/boot/dts/stih416.dtsi | |||
@@ -0,0 +1,96 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2012 STMicroelectronics Limited. | ||
3 | * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 as | ||
7 | * publishhed by the Free Software Foundation. | ||
8 | */ | ||
9 | #include "stih41x.dtsi" | ||
10 | #include "stih416-clock.dtsi" | ||
11 | #include "stih416-pinctrl.dtsi" | ||
12 | / { | ||
13 | L2: cache-controller { | ||
14 | compatible = "arm,pl310-cache"; | ||
15 | reg = <0xfffe2000 0x1000>; | ||
16 | arm,data-latency = <3 3 3>; | ||
17 | arm,tag-latency = <2 2 2>; | ||
18 | cache-unified; | ||
19 | cache-level = <2>; | ||
20 | }; | ||
21 | |||
22 | soc { | ||
23 | #address-cells = <1>; | ||
24 | #size-cells = <1>; | ||
25 | interrupt-parent = <&intc>; | ||
26 | ranges; | ||
27 | compatible = "simple-bus"; | ||
28 | |||
29 | syscfg_sbc:sbc-syscfg@fe600000{ | ||
30 | compatible = "st,stih416-sbc-syscfg", "syscon"; | ||
31 | reg = <0xfe600000 0x1000>; | ||
32 | }; | ||
33 | |||
34 | syscfg_front:front-syscfg@fee10000{ | ||
35 | compatible = "st,stih416-front-syscfg", "syscon"; | ||
36 | reg = <0xfee10000 0x1000>; | ||
37 | }; | ||
38 | |||
39 | syscfg_rear:rear-syscfg@fe830000{ | ||
40 | compatible = "st,stih416-rear-syscfg", "syscon"; | ||
41 | reg = <0xfe830000 0x1000>; | ||
42 | }; | ||
43 | |||
44 | /* MPE */ | ||
45 | syscfg_fvdp_fe:fvdp-fe-syscfg@fddf0000{ | ||
46 | compatible = "st,stih416-fvdp-fe-syscfg", "syscon"; | ||
47 | reg = <0xfddf0000 0x1000>; | ||
48 | }; | ||
49 | |||
50 | syscfg_fvdp_lite:fvdp-lite-syscfg@fd6a0000{ | ||
51 | compatible = "st,stih416-fvdp-lite-syscfg", "syscon"; | ||
52 | reg = <0xfd6a0000 0x1000>; | ||
53 | }; | ||
54 | |||
55 | syscfg_cpu:cpu-syscfg@fdde0000{ | ||
56 | compatible = "st,stih416-cpu-syscfg", "syscon"; | ||
57 | reg = <0xfdde0000 0x1000>; | ||
58 | }; | ||
59 | |||
60 | syscfg_compo:compo-syscfg@fd320000{ | ||
61 | compatible = "st,stih416-compo-syscfg", "syscon"; | ||
62 | reg = <0xfd320000 0x1000>; | ||
63 | }; | ||
64 | |||
65 | syscfg_transport:transport-syscfg@fd690000{ | ||
66 | compatible = "st,stih416-transport-syscfg", "syscon"; | ||
67 | reg = <0xfd690000 0x1000>; | ||
68 | }; | ||
69 | |||
70 | syscfg_lpm:lpm-syscfg@fe4b5100{ | ||
71 | compatible = "st,stih416-lpm-syscfg", "syscon"; | ||
72 | reg = <0xfe4b5100 0x8>; | ||
73 | }; | ||
74 | |||
75 | serial2: serial@fed32000{ | ||
76 | compatible = "st,asc"; | ||
77 | status = "disabled"; | ||
78 | reg = <0xfed32000 0x2c>; | ||
79 | interrupts = <0 197 0>; | ||
80 | clocks = <&CLK_S_ICN_REG_0>; | ||
81 | pinctrl-names = "default"; | ||
82 | pinctrl-0 = <&pinctrl_serial2>; | ||
83 | }; | ||
84 | |||
85 | /* SBC_UART1 */ | ||
86 | sbc_serial1: serial@fe531000 { | ||
87 | compatible = "st,asc"; | ||
88 | status = "disabled"; | ||
89 | reg = <0xfe531000 0x2c>; | ||
90 | interrupts = <0 210 0>; | ||
91 | pinctrl-names = "default"; | ||
92 | pinctrl-0 = <&pinctrl_sbc_serial1>; | ||
93 | clocks = <&CLK_SYSIN>; | ||
94 | }; | ||
95 | }; | ||
96 | }; | ||