diff options
Diffstat (limited to 'arch/arm/boot/dts/rk3066a.dtsi')
-rw-r--r-- | arch/arm/boot/dts/rk3066a.dtsi | 98 |
1 files changed, 1 insertions, 97 deletions
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 98f3597a6a35..be5d2b09a363 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi | |||
@@ -14,15 +14,12 @@ | |||
14 | */ | 14 | */ |
15 | 15 | ||
16 | #include <dt-bindings/gpio/gpio.h> | 16 | #include <dt-bindings/gpio/gpio.h> |
17 | #include <dt-bindings/interrupt-controller/irq.h> | ||
18 | #include <dt-bindings/interrupt-controller/arm-gic.h> | ||
19 | #include <dt-bindings/pinctrl/rockchip.h> | 17 | #include <dt-bindings/pinctrl/rockchip.h> |
20 | #include "skeleton.dtsi" | 18 | #include "rk3xxx.dtsi" |
21 | #include "rk3066a-clocks.dtsi" | 19 | #include "rk3066a-clocks.dtsi" |
22 | 20 | ||
23 | / { | 21 | / { |
24 | compatible = "rockchip,rk3066a"; | 22 | compatible = "rockchip,rk3066a"; |
25 | interrupt-parent = <&gic>; | ||
26 | 23 | ||
27 | cpus { | 24 | cpus { |
28 | #address-cells = <1>; | 25 | #address-cells = <1>; |
@@ -43,33 +40,6 @@ | |||
43 | }; | 40 | }; |
44 | 41 | ||
45 | soc { | 42 | soc { |
46 | #address-cells = <1>; | ||
47 | #size-cells = <1>; | ||
48 | compatible = "simple-bus"; | ||
49 | ranges; | ||
50 | |||
51 | gic: interrupt-controller@1013d000 { | ||
52 | compatible = "arm,cortex-a9-gic"; | ||
53 | interrupt-controller; | ||
54 | #interrupt-cells = <3>; | ||
55 | reg = <0x1013d000 0x1000>, | ||
56 | <0x1013c100 0x0100>; | ||
57 | }; | ||
58 | |||
59 | L2: l2-cache-controller@10138000 { | ||
60 | compatible = "arm,pl310-cache"; | ||
61 | reg = <0x10138000 0x1000>; | ||
62 | cache-unified; | ||
63 | cache-level = <2>; | ||
64 | }; | ||
65 | |||
66 | local-timer@1013c600 { | ||
67 | compatible = "arm,cortex-a9-twd-timer"; | ||
68 | reg = <0x1013c600 0x20>; | ||
69 | interrupts = <GIC_PPI 13 0x304>; | ||
70 | clocks = <&dummy150m>; | ||
71 | }; | ||
72 | |||
73 | timer@20038000 { | 43 | timer@20038000 { |
74 | compatible = "snps,dw-apb-timer-osc"; | 44 | compatible = "snps,dw-apb-timer-osc"; |
75 | reg = <0x20038000 0x100>; | 45 | reg = <0x20038000 0x100>; |
@@ -298,71 +268,5 @@ | |||
298 | }; | 268 | }; |
299 | }; | 269 | }; |
300 | }; | 270 | }; |
301 | |||
302 | uart0: serial@10124000 { | ||
303 | compatible = "snps,dw-apb-uart"; | ||
304 | reg = <0x10124000 0x400>; | ||
305 | interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; | ||
306 | reg-shift = <2>; | ||
307 | reg-io-width = <1>; | ||
308 | clocks = <&clk_gates1 8>; | ||
309 | status = "disabled"; | ||
310 | }; | ||
311 | |||
312 | uart1: serial@10126000 { | ||
313 | compatible = "snps,dw-apb-uart"; | ||
314 | reg = <0x10126000 0x400>; | ||
315 | interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; | ||
316 | reg-shift = <2>; | ||
317 | reg-io-width = <1>; | ||
318 | clocks = <&clk_gates1 10>; | ||
319 | status = "disabled"; | ||
320 | }; | ||
321 | |||
322 | uart2: serial@20064000 { | ||
323 | compatible = "snps,dw-apb-uart"; | ||
324 | reg = <0x20064000 0x400>; | ||
325 | interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; | ||
326 | reg-shift = <2>; | ||
327 | reg-io-width = <1>; | ||
328 | clocks = <&clk_gates1 12>; | ||
329 | status = "disabled"; | ||
330 | }; | ||
331 | |||
332 | uart3: serial@20068000 { | ||
333 | compatible = "snps,dw-apb-uart"; | ||
334 | reg = <0x20068000 0x400>; | ||
335 | interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; | ||
336 | reg-shift = <2>; | ||
337 | reg-io-width = <1>; | ||
338 | clocks = <&clk_gates1 14>; | ||
339 | status = "disabled"; | ||
340 | }; | ||
341 | |||
342 | dwmmc@10214000 { | ||
343 | compatible = "rockchip,rk2928-dw-mshc"; | ||
344 | reg = <0x10214000 0x1000>; | ||
345 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; | ||
346 | #address-cells = <1>; | ||
347 | #size-cells = <0>; | ||
348 | |||
349 | clocks = <&clk_gates5 10>, <&clk_gates2 11>; | ||
350 | clock-names = "biu", "ciu"; | ||
351 | |||
352 | status = "disabled"; | ||
353 | }; | ||
354 | |||
355 | dwmmc@10218000 { | ||
356 | compatible = "rockchip,rk2928-dw-mshc"; | ||
357 | reg = <0x10218000 0x1000>; | ||
358 | interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; | ||
359 | #address-cells = <1>; | ||
360 | #size-cells = <0>; | ||
361 | |||
362 | clocks = <&clk_gates5 11>, <&clk_gates2 13>; | ||
363 | clock-names = "biu", "ciu"; | ||
364 | |||
365 | status = "disabled"; | ||
366 | }; | ||
367 | }; | 271 | }; |
368 | }; | 272 | }; |