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Diffstat (limited to 'arch/arm/boot/dts/r8a7790.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a7790.dtsi189
1 files changed, 170 insertions, 19 deletions
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 0c20c90d8c06..af7e255f629e 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -312,6 +312,70 @@
312 #dma-cells = <1>; 312 #dma-cells = <1>;
313 dma-channels = <15>; 313 dma-channels = <15>;
314 }; 314 };
315
316 audma0: dma-controller@ec700000 {
317 compatible = "renesas,rcar-dmac";
318 reg = <0 0xec700000 0 0x10000>;
319 interrupts = <0 346 IRQ_TYPE_LEVEL_HIGH
320 0 320 IRQ_TYPE_LEVEL_HIGH
321 0 321 IRQ_TYPE_LEVEL_HIGH
322 0 322 IRQ_TYPE_LEVEL_HIGH
323 0 323 IRQ_TYPE_LEVEL_HIGH
324 0 324 IRQ_TYPE_LEVEL_HIGH
325 0 325 IRQ_TYPE_LEVEL_HIGH
326 0 326 IRQ_TYPE_LEVEL_HIGH
327 0 327 IRQ_TYPE_LEVEL_HIGH
328 0 328 IRQ_TYPE_LEVEL_HIGH
329 0 329 IRQ_TYPE_LEVEL_HIGH
330 0 330 IRQ_TYPE_LEVEL_HIGH
331 0 331 IRQ_TYPE_LEVEL_HIGH
332 0 332 IRQ_TYPE_LEVEL_HIGH>;
333 interrupt-names = "error",
334 "ch0", "ch1", "ch2", "ch3",
335 "ch4", "ch5", "ch6", "ch7",
336 "ch8", "ch9", "ch10", "ch11",
337 "ch12";
338 clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>;
339 clock-names = "fck";
340 #dma-cells = <1>;
341 dma-channels = <13>;
342 };
343
344 audma1: dma-controller@ec720000 {
345 compatible = "renesas,rcar-dmac";
346 reg = <0 0xec720000 0 0x10000>;
347 interrupts = <0 347 IRQ_TYPE_LEVEL_HIGH
348 0 333 IRQ_TYPE_LEVEL_HIGH
349 0 334 IRQ_TYPE_LEVEL_HIGH
350 0 335 IRQ_TYPE_LEVEL_HIGH
351 0 336 IRQ_TYPE_LEVEL_HIGH
352 0 337 IRQ_TYPE_LEVEL_HIGH
353 0 338 IRQ_TYPE_LEVEL_HIGH
354 0 339 IRQ_TYPE_LEVEL_HIGH
355 0 340 IRQ_TYPE_LEVEL_HIGH
356 0 341 IRQ_TYPE_LEVEL_HIGH
357 0 342 IRQ_TYPE_LEVEL_HIGH
358 0 343 IRQ_TYPE_LEVEL_HIGH
359 0 344 IRQ_TYPE_LEVEL_HIGH
360 0 345 IRQ_TYPE_LEVEL_HIGH>;
361 interrupt-names = "error",
362 "ch0", "ch1", "ch2", "ch3",
363 "ch4", "ch5", "ch6", "ch7",
364 "ch8", "ch9", "ch10", "ch11",
365 "ch12";
366 clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>;
367 clock-names = "fck";
368 #dma-cells = <1>;
369 dma-channels = <13>;
370 };
371
372 audmapp: dma-controller@ec740000 {
373 compatible = "renesas,rcar-audmapp";
374 #dma-cells = <1>;
375
376 reg = <0 0xec740000 0 0x200>;
377 };
378
315 i2c0: i2c@e6508000 { 379 i2c0: i2c@e6508000 {
316 #address-cells = <1>; 380 #address-cells = <1>;
317 #size-cells = <0>; 381 #size-cells = <0>;
@@ -359,6 +423,8 @@
359 reg = <0 0xe6500000 0 0x425>; 423 reg = <0 0xe6500000 0 0x425>;
360 interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>; 424 interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
361 clocks = <&mstp3_clks R8A7790_CLK_IIC0>; 425 clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
426 dmas = <&dmac0 0x61>, <&dmac0 0x62>;
427 dma-names = "tx", "rx";
362 status = "disabled"; 428 status = "disabled";
363 }; 429 };
364 430
@@ -369,6 +435,8 @@
369 reg = <0 0xe6510000 0 0x425>; 435 reg = <0 0xe6510000 0 0x425>;
370 interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>; 436 interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
371 clocks = <&mstp3_clks R8A7790_CLK_IIC1>; 437 clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
438 dmas = <&dmac0 0x65>, <&dmac0 0x66>;
439 dma-names = "tx", "rx";
372 status = "disabled"; 440 status = "disabled";
373 }; 441 };
374 442
@@ -379,6 +447,8 @@
379 reg = <0 0xe6520000 0 0x425>; 447 reg = <0 0xe6520000 0 0x425>;
380 interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>; 448 interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
381 clocks = <&mstp3_clks R8A7790_CLK_IIC2>; 449 clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
450 dmas = <&dmac0 0x69>, <&dmac0 0x6a>;
451 dma-names = "tx", "rx";
382 status = "disabled"; 452 status = "disabled";
383 }; 453 };
384 454
@@ -389,14 +459,18 @@
389 reg = <0 0xe60b0000 0 0x425>; 459 reg = <0 0xe60b0000 0 0x425>;
390 interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>; 460 interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
391 clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>; 461 clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
462 dmas = <&dmac0 0x77>, <&dmac0 0x78>;
463 dma-names = "tx", "rx";
392 status = "disabled"; 464 status = "disabled";
393 }; 465 };
394 466
395 mmcif0: mmcif@ee200000 { 467 mmcif0: mmc@ee200000 {
396 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif"; 468 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
397 reg = <0 0xee200000 0 0x80>; 469 reg = <0 0xee200000 0 0x80>;
398 interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>; 470 interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
399 clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>; 471 clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>;
472 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>;
473 dma-names = "tx", "rx";
400 reg-io-width = <4>; 474 reg-io-width = <4>;
401 status = "disabled"; 475 status = "disabled";
402 }; 476 };
@@ -406,6 +480,8 @@
406 reg = <0 0xee220000 0 0x80>; 480 reg = <0 0xee220000 0 0x80>;
407 interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>; 481 interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
408 clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>; 482 clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;
483 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>;
484 dma-names = "tx", "rx";
409 reg-io-width = <4>; 485 reg-io-width = <4>;
410 status = "disabled"; 486 status = "disabled";
411 }; 487 };
@@ -420,7 +496,6 @@
420 reg = <0 0xee100000 0 0x200>; 496 reg = <0 0xee100000 0 0x200>;
421 interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; 497 interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
422 clocks = <&mstp3_clks R8A7790_CLK_SDHI0>; 498 clocks = <&mstp3_clks R8A7790_CLK_SDHI0>;
423 cap-sd-highspeed;
424 status = "disabled"; 499 status = "disabled";
425 }; 500 };
426 501
@@ -429,7 +504,6 @@
429 reg = <0 0xee120000 0 0x200>; 504 reg = <0 0xee120000 0 0x200>;
430 interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>; 505 interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
431 clocks = <&mstp3_clks R8A7790_CLK_SDHI1>; 506 clocks = <&mstp3_clks R8A7790_CLK_SDHI1>;
432 cap-sd-highspeed;
433 status = "disabled"; 507 status = "disabled";
434 }; 508 };
435 509
@@ -438,7 +512,6 @@
438 reg = <0 0xee140000 0 0x100>; 512 reg = <0 0xee140000 0 0x100>;
439 interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>; 513 interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
440 clocks = <&mstp3_clks R8A7790_CLK_SDHI2>; 514 clocks = <&mstp3_clks R8A7790_CLK_SDHI2>;
441 cap-sd-highspeed;
442 status = "disabled"; 515 status = "disabled";
443 }; 516 };
444 517
@@ -447,7 +520,6 @@
447 reg = <0 0xee160000 0 0x100>; 520 reg = <0 0xee160000 0 0x100>;
448 interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>; 521 interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;
449 clocks = <&mstp3_clks R8A7790_CLK_SDHI3>; 522 clocks = <&mstp3_clks R8A7790_CLK_SDHI3>;
450 cap-sd-highspeed;
451 status = "disabled"; 523 status = "disabled";
452 }; 524 };
453 525
@@ -568,6 +640,36 @@
568 status = "disabled"; 640 status = "disabled";
569 }; 641 };
570 642
643 hsusb: usb@e6590000 {
644 compatible = "renesas,usbhs-r8a7790";
645 reg = <0 0xe6590000 0 0x100>;
646 interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
647 clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
648 renesas,buswait = <4>;
649 phys = <&usb0 1>;
650 phy-names = "usb";
651 status = "disabled";
652 };
653
654 usbphy: usb-phy@e6590100 {
655 compatible = "renesas,usb-phy-r8a7790";
656 reg = <0 0xe6590100 0 0x100>;
657 #address-cells = <1>;
658 #size-cells = <0>;
659 clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
660 clock-names = "usbhs";
661 status = "disabled";
662
663 usb0: usb-channel@0 {
664 reg = <0>;
665 #phy-cells = <1>;
666 };
667 usb2: usb-channel@2 {
668 reg = <2>;
669 #phy-cells = <1>;
670 };
671 };
672
571 vin0: video@e6ef0000 { 673 vin0: video@e6ef0000 {
572 compatible = "renesas,vin-r8a7790"; 674 compatible = "renesas,vin-r8a7790";
573 clocks = <&mstp8_clks R8A7790_CLK_VIN0>; 675 clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
@@ -958,18 +1060,25 @@
958 mstp1_clks: mstp1_clks@e6150134 { 1060 mstp1_clks: mstp1_clks@e6150134 {
959 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; 1061 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
960 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; 1062 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
961 clocks = <&m2_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, 1063 clocks = <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&m2_clk>,
962 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, 1064 <&zs_clk>, <&p_clk>, <&zg_clk>, <&zs_clk>, <&zs_clk>,
963 <&zs_clk>; 1065 <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
1066 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
964 #clock-cells = <1>; 1067 #clock-cells = <1>;
965 renesas,clock-indices = < 1068 renesas,clock-indices = <
966 R8A7790_CLK_JPU R8A7790_CLK_TMU1 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2 1069 R8A7790_CLK_VCP1 R8A7790_CLK_VCP0 R8A7790_CLK_VPC1
967 R8A7790_CLK_CMT0 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1 1070 R8A7790_CLK_VPC0 R8A7790_CLK_JPU R8A7790_CLK_SSP1
968 R8A7790_CLK_VSP1_DU0 R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S 1071 R8A7790_CLK_TMU1 R8A7790_CLK_3DG R8A7790_CLK_2DDMAC
1072 R8A7790_CLK_FDP1_2 R8A7790_CLK_FDP1_1 R8A7790_CLK_FDP1_0
1073 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2 R8A7790_CLK_CMT0
1074 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1 R8A7790_CLK_VSP1_DU0
1075 R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S
969 >; 1076 >;
970 clock-output-names = 1077 clock-output-names =
971 "jpu", "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1", 1078 "vcp1", "vcp0", "vpc1", "vpc0", "jpu", "ssp1",
972 "vsp1-du0", "vsp1-rt", "vsp1-sy"; 1079 "tmu1", "3dg", "2ddmac", "fdp1-2", "fdp1-1",
1080 "fdp1-0", "tmu3", "tmu2", "cmt0", "tmu0",
1081 "vsp1-du1", "vsp1-du0", "vsp1-rt", "vsp1-sy";
973 }; 1082 };
974 mstp2_clks: mstp2_clks@e6150138 { 1083 mstp2_clks: mstp2_clks@e6150138 {
975 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; 1084 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
@@ -994,25 +1103,29 @@
994 reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; 1103 reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
995 clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, 1104 clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,
996 <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>, 1105 <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
997 <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>; 1106 <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>,
1107 <&hp_clk>, <&hp_clk>;
998 #clock-cells = <1>; 1108 #clock-cells = <1>;
999 renesas,clock-indices = < 1109 renesas,clock-indices = <
1000 R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3 1110 R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
1001 R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0 1111 R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
1002 R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1 1112 R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1
1113 R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1
1003 >; 1114 >;
1004 clock-output-names = 1115 clock-output-names =
1005 "iic2", "tpu0", "mmcif1", "sdhi3", 1116 "iic2", "tpu0", "mmcif1", "sdhi3",
1006 "sdhi2", "sdhi1", "sdhi0", "mmcif0", 1117 "sdhi2", "sdhi1", "sdhi0", "mmcif0",
1007 "iic0", "pciec", "iic1", "ssusb", "cmt1"; 1118 "iic0", "pciec", "iic1", "ssusb", "cmt1",
1119 "usbdmac0", "usbdmac1";
1008 }; 1120 };
1009 mstp5_clks: mstp5_clks@e6150144 { 1121 mstp5_clks: mstp5_clks@e6150144 {
1010 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; 1122 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1011 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; 1123 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
1012 clocks = <&extal_clk>, <&p_clk>; 1124 clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>;
1013 #clock-cells = <1>; 1125 #clock-cells = <1>;
1014 renesas,clock-indices = <R8A7790_CLK_THERMAL R8A7790_CLK_PWM>; 1126 renesas,clock-indices = <R8A7790_CLK_AUDIO_DMAC0 R8A7790_CLK_AUDIO_DMAC1
1015 clock-output-names = "thermal", "pwm"; 1127 R8A7790_CLK_THERMAL R8A7790_CLK_PWM>;
1128 clock-output-names = "audmac0", "audmac1", "thermal", "pwm";
1016 }; 1129 };
1017 mstp7_clks: mstp7_clks@e615014c { 1130 mstp7_clks: mstp7_clks@e615014c {
1018 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; 1131 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
@@ -1160,6 +1273,16 @@
1160 status = "disabled"; 1273 status = "disabled";
1161 }; 1274 };
1162 1275
1276 xhci: usb@ee000000 {
1277 compatible = "renesas,xhci-r8a7790";
1278 reg = <0 0xee000000 0 0xc00>;
1279 interrupts = <0 101 IRQ_TYPE_LEVEL_HIGH>;
1280 clocks = <&mstp3_clks R8A7790_CLK_SSUSB>;
1281 phys = <&usb2 1>;
1282 phy-names = "usb";
1283 status = "disabled";
1284 };
1285
1163 pci0: pci@ee090000 { 1286 pci0: pci@ee090000 {
1164 compatible = "renesas,pci-r8a7790"; 1287 compatible = "renesas,pci-r8a7790";
1165 device_type = "pci"; 1288 device_type = "pci";
@@ -1178,6 +1301,20 @@
1178 interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH 1301 interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
1179 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH 1302 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
1180 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>; 1303 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
1304
1305 usb@0,1 {
1306 reg = <0x800 0 0 0 0>;
1307 device_type = "pci";
1308 phys = <&usb0 0>;
1309 phy-names = "usb";
1310 };
1311
1312 usb@0,2 {
1313 reg = <0x1000 0 0 0 0>;
1314 device_type = "pci";
1315 phys = <&usb0 0>;
1316 phy-names = "usb";
1317 };
1181 }; 1318 };
1182 1319
1183 pci1: pci@ee0b0000 { 1320 pci1: pci@ee0b0000 {
@@ -1218,6 +1355,20 @@
1218 interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH 1355 interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
1219 0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH 1356 0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
1220 0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>; 1357 0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
1358
1359 usb@0,1 {
1360 reg = <0x800 0 0 0 0>;
1361 device_type = "pci";
1362 phys = <&usb2 0>;
1363 phy-names = "usb";
1364 };
1365
1366 usb@0,2 {
1367 reg = <0x1000 0 0 0 0>;
1368 device_type = "pci";
1369 phys = <&usb2 0>;
1370 phy-names = "usb";
1371 };
1221 }; 1372 };
1222 1373
1223 pciec: pcie@fe000000 { 1374 pciec: pcie@fe000000 {
@@ -1245,7 +1396,7 @@
1245 status = "disabled"; 1396 status = "disabled";
1246 }; 1397 };
1247 1398
1248 rcar_sound: rcar_sound@0xec500000 { 1399 rcar_sound: rcar_sound@ec500000 {
1249 #sound-dai-cells = <1>; 1400 #sound-dai-cells = <1>;
1250 compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2", "renesas,rcar_sound"; 1401 compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2", "renesas,rcar_sound";
1251 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1402 reg = <0 0xec500000 0 0x1000>, /* SCU */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 19:41:52 -0500