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Diffstat (limited to 'arch/arm/boot/dts/qcom-msm8974.dtsi')
-rw-r--r--arch/arm/boot/dts/qcom-msm8974.dtsi24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 6ac94967d2d3..9e5dadb101eb 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -2,6 +2,8 @@
2 2
3#include "skeleton.dtsi" 3#include "skeleton.dtsi"
4 4
5#include <dt-bindings/clock/qcom,gcc-msm8974.h>
6
5/ { 7/ {
6 model = "Qualcomm MSM8974"; 8 model = "Qualcomm MSM8974";
7 compatible = "qcom,msm8974"; 9 compatible = "qcom,msm8974";
@@ -93,5 +95,27 @@
93 compatible = "qcom,pshold"; 95 compatible = "qcom,pshold";
94 reg = <0xfc4ab000 0x4>; 96 reg = <0xfc4ab000 0x4>;
95 }; 97 };
98
99 gcc: clock-controller@fc400000 {
100 compatible = "qcom,gcc-msm8974";
101 #clock-cells = <1>;
102 #reset-cells = <1>;
103 reg = <0xfc400000 0x4000>;
104 };
105
106 mmcc: clock-controller@fd8c0000 {
107 compatible = "qcom,mmcc-msm8974";
108 #clock-cells = <1>;
109 #reset-cells = <1>;
110 reg = <0xfd8c0000 0x6000>;
111 };
112
113 serial@f991e000 {
114 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
115 reg = <0xf991e000 0x1000>;
116 interrupts = <0 108 0x0>;
117 clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
118 clock-names = "core", "iface";
119 };
96 }; 120 };
97}; 121};