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Diffstat (limited to 'arch/arm/boot/dts/qcom-msm8660-surf.dts')
-rw-r--r--arch/arm/boot/dts/qcom-msm8660-surf.dts11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8660-surf.dts b/arch/arm/boot/dts/qcom-msm8660-surf.dts
index 1187185cf25b..68a72f5507b9 100644
--- a/arch/arm/boot/dts/qcom-msm8660-surf.dts
+++ b/arch/arm/boot/dts/qcom-msm8660-surf.dts
@@ -2,6 +2,8 @@
2 2
3/include/ "skeleton.dtsi" 3/include/ "skeleton.dtsi"
4 4
5#include <dt-bindings/clock/qcom,gcc-msm8660.h>
6
5/ { 7/ {
6 model = "Qualcomm MSM8660 SURF"; 8 model = "Qualcomm MSM8660 SURF";
7 compatible = "qcom,msm8660-surf", "qcom,msm8660"; 9 compatible = "qcom,msm8660-surf", "qcom,msm8660";
@@ -37,11 +39,20 @@
37 #interrupt-cells = <2>; 39 #interrupt-cells = <2>;
38 }; 40 };
39 41
42 gcc: clock-controller@900000 {
43 compatible = "qcom,gcc-msm8660";
44 #clock-cells = <1>;
45 #reset-cells = <1>;
46 reg = <0x900000 0x4000>;
47 };
48
40 serial@19c40000 { 49 serial@19c40000 {
41 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; 50 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
42 reg = <0x19c40000 0x1000>, 51 reg = <0x19c40000 0x1000>,
43 <0x19c00000 0x1000>; 52 <0x19c00000 0x1000>;
44 interrupts = <0 195 0x0>; 53 interrupts = <0 195 0x0>;
54 clocks = <&gcc GSBI12_UART_CLK>, <&gcc GSBI12_H_CLK>;
55 clock-names = "core", "iface";
45 }; 56 };
46 57
47 qcom,ssbi@500000 { 58 qcom,ssbi@500000 {