diff options
Diffstat (limited to 'arch/arm/boot/dts/omap4-sdp.dts')
-rw-r--r-- | arch/arm/boot/dts/omap4-sdp.dts | 142 |
1 files changed, 81 insertions, 61 deletions
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts index a35d9cd58063..7951b4ea500a 100644 --- a/arch/arm/boot/dts/omap4-sdp.dts +++ b/arch/arm/boot/dts/omap4-sdp.dts | |||
@@ -7,8 +7,8 @@ | |||
7 | */ | 7 | */ |
8 | /dts-v1/; | 8 | /dts-v1/; |
9 | 9 | ||
10 | /include/ "omap443x.dtsi" | 10 | #include "omap443x.dtsi" |
11 | /include/ "elpida_ecb240abacn.dtsi" | 11 | #include "elpida_ecb240abacn.dtsi" |
12 | 12 | ||
13 | / { | 13 | / { |
14 | model = "TI OMAP4 SDP board"; | 14 | model = "TI OMAP4 SDP board"; |
@@ -41,42 +41,42 @@ | |||
41 | compatible = "gpio-leds"; | 41 | compatible = "gpio-leds"; |
42 | debug0 { | 42 | debug0 { |
43 | label = "omap4:green:debug0"; | 43 | label = "omap4:green:debug0"; |
44 | gpios = <&gpio2 29 0>; /* 61 */ | 44 | gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>; /* 61 */ |
45 | }; | 45 | }; |
46 | 46 | ||
47 | debug1 { | 47 | debug1 { |
48 | label = "omap4:green:debug1"; | 48 | label = "omap4:green:debug1"; |
49 | gpios = <&gpio1 30 0>; /* 30 */ | 49 | gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; /* 30 */ |
50 | }; | 50 | }; |
51 | 51 | ||
52 | debug2 { | 52 | debug2 { |
53 | label = "omap4:green:debug2"; | 53 | label = "omap4:green:debug2"; |
54 | gpios = <&gpio1 7 0>; /* 7 */ | 54 | gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; /* 7 */ |
55 | }; | 55 | }; |
56 | 56 | ||
57 | debug3 { | 57 | debug3 { |
58 | label = "omap4:green:debug3"; | 58 | label = "omap4:green:debug3"; |
59 | gpios = <&gpio1 8 0>; /* 8 */ | 59 | gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; /* 8 */ |
60 | }; | 60 | }; |
61 | 61 | ||
62 | debug4 { | 62 | debug4 { |
63 | label = "omap4:green:debug4"; | 63 | label = "omap4:green:debug4"; |
64 | gpios = <&gpio2 18 0>; /* 50 */ | 64 | gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>; /* 50 */ |
65 | }; | 65 | }; |
66 | 66 | ||
67 | user1 { | 67 | user1 { |
68 | label = "omap4:blue:user"; | 68 | label = "omap4:blue:user"; |
69 | gpios = <&gpio6 9 0>; /* 169 */ | 69 | gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* 169 */ |
70 | }; | 70 | }; |
71 | 71 | ||
72 | user2 { | 72 | user2 { |
73 | label = "omap4:red:user"; | 73 | label = "omap4:red:user"; |
74 | gpios = <&gpio6 10 0>; /* 170 */ | 74 | gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>; /* 170 */ |
75 | }; | 75 | }; |
76 | 76 | ||
77 | user3 { | 77 | user3 { |
78 | label = "omap4:green:user"; | 78 | label = "omap4:green:user"; |
79 | gpios = <&gpio5 11 0>; /* 139 */ | 79 | gpios = <&gpio5 11 GPIO_ACTIVE_HIGH>; /* 139 */ |
80 | }; | 80 | }; |
81 | }; | 81 | }; |
82 | 82 | ||
@@ -142,9 +142,23 @@ | |||
142 | }; | 142 | }; |
143 | }; | 143 | }; |
144 | 144 | ||
145 | &omap4_pmx_wkup { | ||
146 | pinctrl-names = "default"; | ||
147 | pinctrl-0 = < | ||
148 | &twl6030_wkup_pins | ||
149 | >; | ||
150 | |||
151 | twl6030_wkup_pins: pinmux_twl6030_wkup_pins { | ||
152 | pinctrl-single,pins = < | ||
153 | 0x14 (PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */ | ||
154 | >; | ||
155 | }; | ||
156 | }; | ||
157 | |||
145 | &omap4_pmx_core { | 158 | &omap4_pmx_core { |
146 | pinctrl-names = "default"; | 159 | pinctrl-names = "default"; |
147 | pinctrl-0 = < | 160 | pinctrl-0 = < |
161 | &twl6030_pins | ||
148 | &twl6040_pins | 162 | &twl6040_pins |
149 | &mcpdm_pins | 163 | &mcpdm_pins |
150 | &dmic_pins | 164 | &dmic_pins |
@@ -156,123 +170,129 @@ | |||
156 | 170 | ||
157 | uart2_pins: pinmux_uart2_pins { | 171 | uart2_pins: pinmux_uart2_pins { |
158 | pinctrl-single,pins = < | 172 | pinctrl-single,pins = < |
159 | 0xd8 0x118 /* uart2_cts.uart2_cts INPUT_PULLUP | MODE0 */ | 173 | 0xd8 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */ |
160 | 0xda 0 /* uart2_rts.uart2_rts OUTPUT | MODE0 */ | 174 | 0xda (PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */ |
161 | 0xdc 0x118 /* uart2_rx.uart2_rx INPUT_PULLUP | MODE0 */ | 175 | 0xdc (PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_rx.uart2_rx */ |
162 | 0xde 0 /* uart2_tx.uart2_tx OUTPUT | MODE0 */ | 176 | 0xde (PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ |
163 | >; | 177 | >; |
164 | }; | 178 | }; |
165 | 179 | ||
166 | uart3_pins: pinmux_uart3_pins { | 180 | uart3_pins: pinmux_uart3_pins { |
167 | pinctrl-single,pins = < | 181 | pinctrl-single,pins = < |
168 | 0x100 0x118 /* uart3_cts_rctx.uart3_cts_rctx INPUT_PULLUP | MODE0 */ | 182 | 0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */ |
169 | 0x102 0 /* uart3_rts_sd.uart3_rts_sd OUTPUT | MODE0 */ | 183 | 0x102 (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */ |
170 | 0x104 0x100 /* uart3_rx_irrx.uart3_rx_irrx INPUT | MODE0 */ | 184 | 0x104 (PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ |
171 | 0x106 0 /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */ | 185 | 0x106 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ |
172 | >; | 186 | >; |
173 | }; | 187 | }; |
174 | 188 | ||
175 | uart4_pins: pinmux_uart4_pins { | 189 | uart4_pins: pinmux_uart4_pins { |
176 | pinctrl-single,pins = < | 190 | pinctrl-single,pins = < |
177 | 0x11c 0x100 /* uart4_rx.uart4_rx INPUT | MODE0 */ | 191 | 0x11c (PIN_INPUT | MUX_MODE0) /* uart4_rx.uart4_rx */ |
178 | 0x11e 0 /* uart4_tx.uart4_tx OUTPUT | MODE0 */ | 192 | 0x11e (PIN_OUTPUT | MUX_MODE0) /* uart4_tx.uart4_tx */ |
193 | >; | ||
194 | }; | ||
195 | |||
196 | twl6030_pins: pinmux_twl6030_pins { | ||
197 | pinctrl-single,pins = < | ||
198 | 0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */ | ||
179 | >; | 199 | >; |
180 | }; | 200 | }; |
181 | 201 | ||
182 | twl6040_pins: pinmux_twl6040_pins { | 202 | twl6040_pins: pinmux_twl6040_pins { |
183 | pinctrl-single,pins = < | 203 | pinctrl-single,pins = < |
184 | 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */ | 204 | 0xe0 (PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */ |
185 | 0x160 0x100 /* sys_nirq2.sys_nirq2 INPUT | MODE0 */ | 205 | 0x160 (PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */ |
186 | >; | 206 | >; |
187 | }; | 207 | }; |
188 | 208 | ||
189 | mcpdm_pins: pinmux_mcpdm_pins { | 209 | mcpdm_pins: pinmux_mcpdm_pins { |
190 | pinctrl-single,pins = < | 210 | pinctrl-single,pins = < |
191 | 0xc6 0x108 /* abe_pdm_ul_data.abe_pdm_ul_data INPUT PULLDOWN | MODE0 */ | 211 | 0xc6 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_ul_data.abe_pdm_ul_data */ |
192 | 0xc8 0x108 /* abe_pdm_dl_data.abe_pdm_dl_data INPUT PULLDOWN | MODE0 */ | 212 | 0xc8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_dl_data.abe_pdm_dl_data */ |
193 | 0xca 0x118 /* abe_pdm_frame.abe_pdm_frame INPUT PULLUP | MODE0 */ | 213 | 0xca (PIN_INPUT_PULLUP | MUX_MODE0) /* abe_pdm_frame.abe_pdm_frame */ |
194 | 0xcc 0x108 /* abe_pdm_lb_clk.abe_pdm_lb_clk INPUT PULLDOWN | MODE0 */ | 214 | 0xcc (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_lb_clk.abe_pdm_lb_clk */ |
195 | 0xce 0x108 /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */ | 215 | 0xce (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */ |
196 | >; | 216 | >; |
197 | }; | 217 | }; |
198 | 218 | ||
199 | dmic_pins: pinmux_dmic_pins { | 219 | dmic_pins: pinmux_dmic_pins { |
200 | pinctrl-single,pins = < | 220 | pinctrl-single,pins = < |
201 | 0xd0 0 /* abe_dmic_clk1.abe_dmic_clk1 OUTPUT | MODE0 */ | 221 | 0xd0 (PIN_OUTPUT | MUX_MODE0) /* abe_dmic_clk1.abe_dmic_clk1 */ |
202 | 0xd2 0x100 /* abe_dmic_din1.abe_dmic_din1 INPUT | MODE0 */ | 222 | 0xd2 (PIN_INPUT | MUX_MODE0) /* abe_dmic_din1.abe_dmic_din1 */ |
203 | 0xd4 0x100 /* abe_dmic_din2.abe_dmic_din2 INPUT | MODE0 */ | 223 | 0xd4 (PIN_INPUT | MUX_MODE0) /* abe_dmic_din2.abe_dmic_din2 */ |
204 | 0xd6 0x100 /* abe_dmic_din3.abe_dmic_din3 INPUT | MODE0 */ | 224 | 0xd6 (PIN_INPUT | MUX_MODE0) /* abe_dmic_din3.abe_dmic_din3 */ |
205 | >; | 225 | >; |
206 | }; | 226 | }; |
207 | 227 | ||
208 | mcbsp1_pins: pinmux_mcbsp1_pins { | 228 | mcbsp1_pins: pinmux_mcbsp1_pins { |
209 | pinctrl-single,pins = < | 229 | pinctrl-single,pins = < |
210 | 0xbe 0x100 /* abe_mcbsp1_clkx.abe_mcbsp1_clkx INPUT | MODE0 */ | 230 | 0xbe (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */ |
211 | 0xc0 0x108 /* abe_mcbsp1_dr.abe_mcbsp1_dr INPUT PULLDOWN | MODE0 */ | 231 | 0xc0 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */ |
212 | 0xc2 0x8 /* abe_mcbsp1_dx.abe_mcbsp1_dx OUTPUT PULLDOWN | MODE0 */ | 232 | 0xc2 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dx.abe_mcbsp1_dx */ |
213 | 0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */ | 233 | 0xc4 (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */ |
214 | >; | 234 | >; |
215 | }; | 235 | }; |
216 | 236 | ||
217 | mcbsp2_pins: pinmux_mcbsp2_pins { | 237 | mcbsp2_pins: pinmux_mcbsp2_pins { |
218 | pinctrl-single,pins = < | 238 | pinctrl-single,pins = < |
219 | 0xb6 0x100 /* abe_mcbsp2_clkx.abe_mcbsp2_clkx INPUT | MODE0 */ | 239 | 0xb6 (PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx.abe_mcbsp2_clkx */ |
220 | 0xb8 0x108 /* abe_mcbsp2_dr.abe_mcbsp2_dr INPUT PULLDOWN | MODE0 */ | 240 | 0xb8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dr.abe_mcbsp2_dr */ |
221 | 0xba 0x8 /* abe_mcbsp2_dx.abe_mcbsp2_dx OUTPUT PULLDOWN | MODE0 */ | 241 | 0xba (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dx.abe_mcbsp2_dx */ |
222 | 0xbc 0x100 /* abe_mcbsp2_fsx.abe_mcbsp2_fsx INPUT | MODE0 */ | 242 | 0xbc (PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_fsx.abe_mcbsp2_fsx */ |
223 | >; | 243 | >; |
224 | }; | 244 | }; |
225 | 245 | ||
226 | mcspi1_pins: pinmux_mcspi1_pins { | 246 | mcspi1_pins: pinmux_mcspi1_pins { |
227 | pinctrl-single,pins = < | 247 | pinctrl-single,pins = < |
228 | 0xf2 0x100 /* mcspi1_clk.mcspi1_clk INPUT | MODE0 */ | 248 | 0xf2 (PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */ |
229 | 0xf4 0x100 /* mcspi1_somi.mcspi1_somi INPUT | MODE0 */ | 249 | 0xf4 (PIN_INPUT | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */ |
230 | 0xf6 0x100 /* mcspi1_simo.mcspi1_simo INPUT | MODE0 */ | 250 | 0xf6 (PIN_INPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */ |
231 | 0xf8 0x100 /* mcspi1_cs0.mcspi1_cs0 INPUT | MODE0*/ | 251 | 0xf8 (PIN_INPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */ |
232 | >; | 252 | >; |
233 | }; | 253 | }; |
234 | 254 | ||
235 | dss_hdmi_pins: pinmux_dss_hdmi_pins { | 255 | dss_hdmi_pins: pinmux_dss_hdmi_pins { |
236 | pinctrl-single,pins = < | 256 | pinctrl-single,pins = < |
237 | 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ | 257 | 0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */ |
238 | 0x5c 0x118 /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */ | 258 | 0x5c (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */ |
239 | 0x5e 0x118 /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */ | 259 | 0x5e (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_sda.hdmi_sda */ |
240 | >; | 260 | >; |
241 | }; | 261 | }; |
242 | 262 | ||
243 | tpd12s015_pins: pinmux_tpd12s015_pins { | 263 | tpd12s015_pins: pinmux_tpd12s015_pins { |
244 | pinctrl-single,pins = < | 264 | pinctrl-single,pins = < |
245 | 0x22 0x3 /* gpmc_a17.gpio_41 OUTPUT | MODE3 */ | 265 | 0x22 (PIN_OUTPUT | MUX_MODE3) /* gpmc_a17.gpio_41 */ |
246 | 0x48 0x3 /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */ | 266 | 0x48 (PIN_OUTPUT | MUX_MODE3) /* gpmc_nbe1.gpio_60 */ |
247 | 0x58 0x10b /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */ | 267 | 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* hdmi_hpd.gpio_63 */ |
248 | >; | 268 | >; |
249 | }; | 269 | }; |
250 | 270 | ||
251 | i2c1_pins: pinmux_i2c1_pins { | 271 | i2c1_pins: pinmux_i2c1_pins { |
252 | pinctrl-single,pins = < | 272 | pinctrl-single,pins = < |
253 | 0xe2 0x118 /* i2c1_scl PULLUP | INPUTENABLE | MODE0 */ | 273 | 0xe2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */ |
254 | 0xe4 0x118 /* i2c1_sda PULLUP | INPUTENABLE | MODE0 */ | 274 | 0xe4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */ |
255 | >; | 275 | >; |
256 | }; | 276 | }; |
257 | 277 | ||
258 | i2c2_pins: pinmux_i2c2_pins { | 278 | i2c2_pins: pinmux_i2c2_pins { |
259 | pinctrl-single,pins = < | 279 | pinctrl-single,pins = < |
260 | 0xe6 0x118 /* i2c2_scl PULLUP | INPUTENABLE | MODE0 */ | 280 | 0xe6 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */ |
261 | 0xe8 0x118 /* i2c2_sda PULLUP | INPUTENABLE | MODE0 */ | 281 | 0xe8 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */ |
262 | >; | 282 | >; |
263 | }; | 283 | }; |
264 | 284 | ||
265 | i2c3_pins: pinmux_i2c3_pins { | 285 | i2c3_pins: pinmux_i2c3_pins { |
266 | pinctrl-single,pins = < | 286 | pinctrl-single,pins = < |
267 | 0xea 0x118 /* i2c3_scl PULLUP | INPUTENABLE | MODE0 */ | 287 | 0xea (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */ |
268 | 0xec 0x118 /* i2c3_sda PULLUP | INPUTENABLE | MODE0 */ | 288 | 0xec (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */ |
269 | >; | 289 | >; |
270 | }; | 290 | }; |
271 | 291 | ||
272 | i2c4_pins: pinmux_i2c4_pins { | 292 | i2c4_pins: pinmux_i2c4_pins { |
273 | pinctrl-single,pins = < | 293 | pinctrl-single,pins = < |
274 | 0xee 0x118 /* i2c4_scl PULLUP | INPUTENABLE | MODE0 */ | 294 | 0xee (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */ |
275 | 0xf0 0x118 /* i2c4_sda PULLUP | INPUTENABLE | MODE0 */ | 295 | 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */ |
276 | >; | 296 | >; |
277 | }; | 297 | }; |
278 | }; | 298 | }; |
@@ -286,7 +306,7 @@ | |||
286 | twl: twl@48 { | 306 | twl: twl@48 { |
287 | reg = <0x48>; | 307 | reg = <0x48>; |
288 | /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */ | 308 | /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */ |
289 | interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */ | 309 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */ |
290 | interrupt-parent = <&gic>; | 310 | interrupt-parent = <&gic>; |
291 | }; | 311 | }; |
292 | 312 | ||
@@ -294,7 +314,7 @@ | |||
294 | compatible = "ti,twl6040"; | 314 | compatible = "ti,twl6040"; |
295 | reg = <0x4b>; | 315 | reg = <0x4b>; |
296 | /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */ | 316 | /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */ |
297 | interrupts = <0 119 4>; /* IRQ_SYS_2N cascaded to gic */ | 317 | interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */ |
298 | interrupt-parent = <&gic>; | 318 | interrupt-parent = <&gic>; |
299 | ti,audpwron-gpio = <&gpio4 31 0>; /* gpio line 127 */ | 319 | ti,audpwron-gpio = <&gpio4 31 0>; /* gpio line 127 */ |
300 | 320 | ||
@@ -316,7 +336,7 @@ | |||
316 | }; | 336 | }; |
317 | }; | 337 | }; |
318 | 338 | ||
319 | /include/ "twl6030.dtsi" | 339 | #include "twl6030.dtsi" |
320 | 340 | ||
321 | &i2c2 { | 341 | &i2c2 { |
322 | pinctrl-names = "default"; | 342 | pinctrl-names = "default"; |
@@ -375,7 +395,7 @@ | |||
375 | spi-max-frequency = <24000000>; | 395 | spi-max-frequency = <24000000>; |
376 | reg = <0>; | 396 | reg = <0>; |
377 | interrupt-parent = <&gpio2>; | 397 | interrupt-parent = <&gpio2>; |
378 | interrupts = <2 8>; /* gpio line 34, low triggered */ | 398 | interrupts = <2 IRQ_TYPE_LEVEL_LOW>; /* gpio line 34 */ |
379 | vdd-supply = <&vdd_eth>; | 399 | vdd-supply = <&vdd_eth>; |
380 | }; | 400 | }; |
381 | }; | 401 | }; |