diff options
Diffstat (limited to 'arch/arm/boot/dts/omap2.dtsi')
-rw-r--r-- | arch/arm/boot/dts/omap2.dtsi | 96 |
1 files changed, 96 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi index a2bfcde858a6..d0c5b37e248c 100644 --- a/arch/arm/boot/dts/omap2.dtsi +++ b/arch/arm/boot/dts/omap2.dtsi | |||
@@ -9,6 +9,7 @@ | |||
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <dt-bindings/gpio/gpio.h> | 11 | #include <dt-bindings/gpio/gpio.h> |
12 | #include <dt-bindings/interrupt-controller/irq.h> | ||
12 | #include <dt-bindings/pinctrl/omap.h> | 13 | #include <dt-bindings/pinctrl/omap.h> |
13 | 14 | ||
14 | #include "skeleton.dtsi" | 15 | #include "skeleton.dtsi" |
@@ -21,6 +22,8 @@ | |||
21 | serial0 = &uart1; | 22 | serial0 = &uart1; |
22 | serial1 = &uart2; | 23 | serial1 = &uart2; |
23 | serial2 = &uart3; | 24 | serial2 = &uart3; |
25 | i2c0 = &i2c1; | ||
26 | i2c1 = &i2c2; | ||
24 | }; | 27 | }; |
25 | 28 | ||
26 | cpus { | 29 | cpus { |
@@ -53,6 +56,28 @@ | |||
53 | ranges; | 56 | ranges; |
54 | ti,hwmods = "l3_main"; | 57 | ti,hwmods = "l3_main"; |
55 | 58 | ||
59 | aes: aes@480a6000 { | ||
60 | compatible = "ti,omap2-aes"; | ||
61 | ti,hwmods = "aes"; | ||
62 | reg = <0x480a6000 0x50>; | ||
63 | dmas = <&sdma 9 &sdma 10>; | ||
64 | dma-names = "tx", "rx"; | ||
65 | }; | ||
66 | |||
67 | hdq1w: 1w@480b2000 { | ||
68 | compatible = "ti,omap2420-1w"; | ||
69 | ti,hwmods = "hdq1w"; | ||
70 | reg = <0x480b2000 0x1000>; | ||
71 | interrupts = <58>; | ||
72 | }; | ||
73 | |||
74 | mailbox: mailbox@48094000 { | ||
75 | compatible = "ti,omap2-mailbox"; | ||
76 | ti,hwmods = "mailbox"; | ||
77 | reg = <0x48094000 0x200>; | ||
78 | interrupts = <26>; | ||
79 | }; | ||
80 | |||
56 | intc: interrupt-controller@1 { | 81 | intc: interrupt-controller@1 { |
57 | compatible = "ti,omap2-intc"; | 82 | compatible = "ti,omap2-intc"; |
58 | interrupt-controller; | 83 | interrupt-controller; |
@@ -63,6 +88,7 @@ | |||
63 | 88 | ||
64 | sdma: dma-controller@48056000 { | 89 | sdma: dma-controller@48056000 { |
65 | compatible = "ti,omap2430-sdma", "ti,omap2420-sdma"; | 90 | compatible = "ti,omap2430-sdma", "ti,omap2420-sdma"; |
91 | ti,hwmods = "dma"; | ||
66 | reg = <0x48056000 0x1000>; | 92 | reg = <0x48056000 0x1000>; |
67 | interrupts = <12>, | 93 | interrupts = <12>, |
68 | <13>, | 94 | <13>, |
@@ -73,21 +99,91 @@ | |||
73 | #dma-requests = <64>; | 99 | #dma-requests = <64>; |
74 | }; | 100 | }; |
75 | 101 | ||
102 | i2c1: i2c@48070000 { | ||
103 | compatible = "ti,omap2-i2c"; | ||
104 | ti,hwmods = "i2c1"; | ||
105 | reg = <0x48070000 0x80>; | ||
106 | #address-cells = <1>; | ||
107 | #size-cells = <0>; | ||
108 | interrupts = <56>; | ||
109 | dmas = <&sdma 27 &sdma 28>; | ||
110 | dma-names = "tx", "rx"; | ||
111 | }; | ||
112 | |||
113 | i2c2: i2c@48072000 { | ||
114 | compatible = "ti,omap2-i2c"; | ||
115 | ti,hwmods = "i2c2"; | ||
116 | reg = <0x48072000 0x80>; | ||
117 | #address-cells = <1>; | ||
118 | #size-cells = <0>; | ||
119 | interrupts = <57>; | ||
120 | dmas = <&sdma 29 &sdma 30>; | ||
121 | dma-names = "tx", "rx"; | ||
122 | }; | ||
123 | |||
124 | mcspi1: mcspi@48098000 { | ||
125 | compatible = "ti,omap2-mcspi"; | ||
126 | ti,hwmods = "mcspi1"; | ||
127 | reg = <0x48098000 0x100>; | ||
128 | interrupts = <65>; | ||
129 | dmas = <&sdma 35 &sdma 36 &sdma 37 &sdma 38 | ||
130 | &sdma 39 &sdma 40 &sdma 41 &sdma 42>; | ||
131 | dma-names = "tx0", "rx0", "tx1", "rx1", | ||
132 | "tx2", "rx2", "tx3", "rx3"; | ||
133 | }; | ||
134 | |||
135 | mcspi2: mcspi@4809a000 { | ||
136 | compatible = "ti,omap2-mcspi"; | ||
137 | ti,hwmods = "mcspi2"; | ||
138 | reg = <0x4809a000 0x100>; | ||
139 | interrupts = <66>; | ||
140 | dmas = <&sdma 43 &sdma 44 &sdma 45 &sdma 46>; | ||
141 | dma-names = "tx0", "rx0", "tx1", "rx1"; | ||
142 | }; | ||
143 | |||
144 | rng: rng@480a0000 { | ||
145 | compatible = "ti,omap2-rng"; | ||
146 | ti,hwmods = "rng"; | ||
147 | reg = <0x480a0000 0x50>; | ||
148 | interrupts = <36>; | ||
149 | }; | ||
150 | |||
151 | sham: sham@480a4000 { | ||
152 | compatible = "ti,omap2-sham"; | ||
153 | ti,hwmods = "sham"; | ||
154 | reg = <0x480a4000 0x64>; | ||
155 | interrupts = <51>; | ||
156 | dmas = <&sdma 13>; | ||
157 | dma-names = "rx"; | ||
158 | }; | ||
159 | |||
76 | uart1: serial@4806a000 { | 160 | uart1: serial@4806a000 { |
77 | compatible = "ti,omap2-uart"; | 161 | compatible = "ti,omap2-uart"; |
78 | ti,hwmods = "uart1"; | 162 | ti,hwmods = "uart1"; |
163 | reg = <0x4806a000 0x2000>; | ||
164 | interrupts = <72>; | ||
165 | dmas = <&sdma 49 &sdma 50>; | ||
166 | dma-names = "tx", "rx"; | ||
79 | clock-frequency = <48000000>; | 167 | clock-frequency = <48000000>; |
80 | }; | 168 | }; |
81 | 169 | ||
82 | uart2: serial@4806c000 { | 170 | uart2: serial@4806c000 { |
83 | compatible = "ti,omap2-uart"; | 171 | compatible = "ti,omap2-uart"; |
84 | ti,hwmods = "uart2"; | 172 | ti,hwmods = "uart2"; |
173 | reg = <0x4806c000 0x400>; | ||
174 | interrupts = <73>; | ||
175 | dmas = <&sdma 51 &sdma 52>; | ||
176 | dma-names = "tx", "rx"; | ||
85 | clock-frequency = <48000000>; | 177 | clock-frequency = <48000000>; |
86 | }; | 178 | }; |
87 | 179 | ||
88 | uart3: serial@4806e000 { | 180 | uart3: serial@4806e000 { |
89 | compatible = "ti,omap2-uart"; | 181 | compatible = "ti,omap2-uart"; |
90 | ti,hwmods = "uart3"; | 182 | ti,hwmods = "uart3"; |
183 | reg = <0x4806e000 0x400>; | ||
184 | interrupts = <74>; | ||
185 | dmas = <&sdma 53 &sdma 54>; | ||
186 | dma-names = "tx", "rx"; | ||
91 | clock-frequency = <48000000>; | 187 | clock-frequency = <48000000>; |
92 | }; | 188 | }; |
93 | 189 | ||