diff options
Diffstat (limited to 'arch/arm/boot/dts/kirkwood.dtsi')
-rw-r--r-- | arch/arm/boot/dts/kirkwood.dtsi | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi index 9809fc1f105c..70f414d9bd9a 100644 --- a/arch/arm/boot/dts/kirkwood.dtsi +++ b/arch/arm/boot/dts/kirkwood.dtsi | |||
@@ -1,5 +1,7 @@ | |||
1 | /include/ "skeleton.dtsi" | 1 | /include/ "skeleton.dtsi" |
2 | 2 | ||
3 | #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) | ||
4 | |||
3 | / { | 5 | / { |
4 | compatible = "marvell,kirkwood"; | 6 | compatible = "marvell,kirkwood"; |
5 | interrupt-parent = <&intc>; | 7 | interrupt-parent = <&intc>; |
@@ -28,15 +30,28 @@ | |||
28 | <0xf1020214 0x04>; | 30 | <0xf1020214 0x04>; |
29 | }; | 31 | }; |
30 | 32 | ||
33 | mbus { | ||
34 | compatible = "marvell,kirkwood-mbus", "simple-bus"; | ||
35 | #address-cells = <2>; | ||
36 | #size-cells = <1>; | ||
37 | controller = <&mbusc>; | ||
38 | pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */ | ||
39 | pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */ | ||
40 | }; | ||
41 | |||
31 | ocp@f1000000 { | 42 | ocp@f1000000 { |
32 | compatible = "simple-bus"; | 43 | compatible = "simple-bus"; |
33 | ranges = <0x00000000 0xf1000000 0x0100000 | 44 | ranges = <0x00000000 0xf1000000 0x0100000 |
34 | 0xe0000000 0xe0000000 0x8100000 /* PCIE */ | ||
35 | 0xf4000000 0xf4000000 0x0000400 | 45 | 0xf4000000 0xf4000000 0x0000400 |
36 | 0xf5000000 0xf5000000 0x0000400>; | 46 | 0xf5000000 0xf5000000 0x0000400>; |
37 | #address-cells = <1>; | 47 | #address-cells = <1>; |
38 | #size-cells = <1>; | 48 | #size-cells = <1>; |
39 | 49 | ||
50 | mbusc: mbus-controller@20000 { | ||
51 | compatible = "marvell,mbus-controller"; | ||
52 | reg = <0x20000 0x80>, <0x1500 0x20>; | ||
53 | }; | ||
54 | |||
40 | core_clk: core-clocks@10030 { | 55 | core_clk: core-clocks@10030 { |
41 | compatible = "marvell,kirkwood-core-clock"; | 56 | compatible = "marvell,kirkwood-core-clock"; |
42 | reg = <0x10030 0x4>; | 57 | reg = <0x10030 0x4>; |