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Diffstat (limited to 'arch/arm/boot/dts/imx6sl.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi176
1 files changed, 167 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index c46651e4d966..28558f1aaf2d 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -13,16 +13,20 @@
13 13
14/ { 14/ {
15 aliases { 15 aliases {
16 serial0 = &uart1;
17 serial1 = &uart2;
18 serial2 = &uart3;
19 serial3 = &uart4;
20 serial4 = &uart5;
21 gpio0 = &gpio1; 16 gpio0 = &gpio1;
22 gpio1 = &gpio2; 17 gpio1 = &gpio2;
23 gpio2 = &gpio3; 18 gpio2 = &gpio3;
24 gpio3 = &gpio4; 19 gpio3 = &gpio4;
25 gpio4 = &gpio5; 20 gpio4 = &gpio5;
21 serial0 = &uart1;
22 serial1 = &uart2;
23 serial2 = &uart3;
24 serial3 = &uart4;
25 serial4 = &uart5;
26 spi0 = &ecspi1;
27 spi1 = &ecspi2;
28 spi2 = &ecspi3;
29 spi3 = &ecspi4;
26 }; 30 };
27 31
28 cpus { 32 cpus {
@@ -380,7 +384,9 @@
380 }; 384 };
381 385
382 anatop: anatop@020c8000 { 386 anatop: anatop@020c8000 {
383 compatible = "fsl,imx6sl-anatop", "syscon", "simple-bus"; 387 compatible = "fsl,imx6sl-anatop",
388 "fsl,imx6q-anatop",
389 "syscon", "simple-bus";
384 reg = <0x020c8000 0x1000>; 390 reg = <0x020c8000 0x1000>;
385 interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>; 391 interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>;
386 392
@@ -528,10 +534,26 @@
528 interrupts = <0 89 0x04>; 534 interrupts = <0 89 0x04>;
529 }; 535 };
530 536
537 gpr: iomuxc-gpr@020e0000 {
538 compatible = "fsl,imx6sl-iomuxc-gpr",
539 "fsl,imx6q-iomuxc-gpr", "syscon";
540 reg = <0x020e0000 0x38>;
541 };
542
531 iomuxc: iomuxc@020e0000 { 543 iomuxc: iomuxc@020e0000 {
532 compatible = "fsl,imx6sl-iomuxc"; 544 compatible = "fsl,imx6sl-iomuxc";
533 reg = <0x020e0000 0x4000>; 545 reg = <0x020e0000 0x4000>;
534 546
547 ecspi1 {
548 pinctrl_ecspi1_1: ecspi1grp-1 {
549 fsl,pins = <
550 MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1
551 MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1
552 MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1
553 >;
554 };
555 };
556
535 fec { 557 fec {
536 pinctrl_fec_1: fecgrp-1 { 558 pinctrl_fec_1: fecgrp-1 {
537 fsl,pins = < 559 fsl,pins = <
@@ -557,6 +579,64 @@
557 }; 579 };
558 }; 580 };
559 581
582 usbotg1 {
583 pinctrl_usbotg1_1: usbotg1grp-1 {
584 fsl,pins = <
585 MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059
586 >;
587 };
588
589 pinctrl_usbotg1_2: usbotg1grp-2 {
590 fsl,pins = <
591 MX6SL_PAD_FEC_RXD0__USB_OTG1_ID 0x17059
592 >;
593 };
594
595 pinctrl_usbotg1_3: usbotg1grp-3 {
596 fsl,pins = <
597 MX6SL_PAD_LCD_DAT1__USB_OTG1_ID 0x17059
598 >;
599 };
600
601 pinctrl_usbotg1_4: usbotg1grp-4 {
602 fsl,pins = <
603 MX6SL_PAD_REF_CLK_32K__USB_OTG1_ID 0x17059
604 >;
605 };
606
607 pinctrl_usbotg1_5: usbotg1grp-5 {
608 fsl,pins = <
609 MX6SL_PAD_SD3_DAT0__USB_OTG1_ID 0x17059
610 >;
611 };
612 };
613
614 usbotg2 {
615 pinctrl_usbotg2_1: usbotg2grp-1 {
616 fsl,pins = <
617 MX6SL_PAD_ECSPI1_SCLK__USB_OTG2_OC 0x17059
618 >;
619 };
620
621 pinctrl_usbotg2_2: usbotg2grp-2 {
622 fsl,pins = <
623 MX6SL_PAD_ECSPI2_SCLK__USB_OTG2_OC 0x17059
624 >;
625 };
626
627 pinctrl_usbotg2_3: usbotg2grp-3 {
628 fsl,pins = <
629 MX6SL_PAD_KEY_ROW5__USB_OTG2_OC 0x17059
630 >;
631 };
632
633 pinctrl_usbotg2_4: usbotg2grp-4 {
634 fsl,pins = <
635 MX6SL_PAD_SD3_DAT2__USB_OTG2_OC 0x17059
636 >;
637 };
638 };
639
560 usdhc1 { 640 usdhc1 {
561 pinctrl_usdhc1_1: usdhc1grp-1 { 641 pinctrl_usdhc1_1: usdhc1grp-1 {
562 fsl,pins = < 642 fsl,pins = <
@@ -572,6 +652,38 @@
572 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059 652 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059
573 >; 653 >;
574 }; 654 };
655
656 pinctrl_usdhc1_1_100mhz: usdhc1grp-1-100mhz {
657 fsl,pins = <
658 MX6SL_PAD_SD1_CMD__SD1_CMD 0x170b9
659 MX6SL_PAD_SD1_CLK__SD1_CLK 0x100b9
660 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170b9
661 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170b9
662 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170b9
663 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170b9
664 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9
665 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9
666 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9
667 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9
668 >;
669 };
670
671 pinctrl_usdhc1_1_200mhz: usdhc1grp-1-200mhz {
672 fsl,pins = <
673 MX6SL_PAD_SD1_CMD__SD1_CMD 0x170f9
674 MX6SL_PAD_SD1_CLK__SD1_CLK 0x100f9
675 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
676 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
677 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
678 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
679 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170f9
680 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170f9
681 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170f9
682 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170f9
683 >;
684 };
685
686
575 }; 687 };
576 688
577 usdhc2 { 689 usdhc2 {
@@ -585,6 +697,29 @@
585 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059 697 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059
586 >; 698 >;
587 }; 699 };
700
701 pinctrl_usdhc2_1_100mhz: usdhc2grp-1-100mhz {
702 fsl,pins = <
703 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9
704 MX6SL_PAD_SD2_CLK__SD2_CLK 0x100b9
705 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
706 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
707 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
708 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
709 >;
710 };
711
712 pinctrl_usdhc2_1_200mhz: usdhc2grp-1-200mhz {
713 fsl,pins = <
714 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9
715 MX6SL_PAD_SD2_CLK__SD2_CLK 0x100f9
716 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
717 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
718 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
719 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
720 >;
721 };
722
588 }; 723 };
589 724
590 usdhc3 { 725 usdhc3 {
@@ -598,6 +733,28 @@
598 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059 733 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059
599 >; 734 >;
600 }; 735 };
736
737 pinctrl_usdhc3_1_100mhz: usdhc3grp-1-100mhz {
738 fsl,pins = <
739 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9
740 MX6SL_PAD_SD3_CLK__SD3_CLK 0x100b9
741 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
742 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
743 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
744 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
745 >;
746 };
747
748 pinctrl_usdhc3_1_200mhz: usdhc3grp-1-200mhz {
749 fsl,pins = <
750 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9
751 MX6SL_PAD_SD3_CLK__SD3_CLK 0x100f9
752 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
753 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
754 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
755 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
756 >;
757 };
601 }; 758 };
602 }; 759 };
603 760
@@ -619,7 +776,8 @@
619 <&clks IMX6SL_CLK_SDMA>; 776 <&clks IMX6SL_CLK_SDMA>;
620 clock-names = "ipg", "ahb"; 777 clock-names = "ipg", "ahb";
621 #dma-cells = <3>; 778 #dma-cells = <3>;
622 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6sl.bin"; 779 /* imx6sl reuses imx6q sdma firmware */
780 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
623 }; 781 };
624 782
625 pxp: pxp@020f0000 { 783 pxp: pxp@020f0000 {
@@ -663,7 +821,7 @@
663 usbotg2: usb@02184200 { 821 usbotg2: usb@02184200 {
664 compatible = "fsl,imx6sl-usb", "fsl,imx27-usb"; 822 compatible = "fsl,imx6sl-usb", "fsl,imx27-usb";
665 reg = <0x02184200 0x200>; 823 reg = <0x02184200 0x200>;
666 interrupts = <0 40 0x04>; 824 interrupts = <0 42 0x04>;
667 clocks = <&clks IMX6SL_CLK_USBOH3>; 825 clocks = <&clks IMX6SL_CLK_USBOH3>;
668 fsl,usbphy = <&usbphy2>; 826 fsl,usbphy = <&usbphy2>;
669 fsl,usbmisc = <&usbmisc 1>; 827 fsl,usbmisc = <&usbmisc 1>;
@@ -673,7 +831,7 @@
673 usbh: usb@02184400 { 831 usbh: usb@02184400 {
674 compatible = "fsl,imx6sl-usb", "fsl,imx27-usb"; 832 compatible = "fsl,imx6sl-usb", "fsl,imx27-usb";
675 reg = <0x02184400 0x200>; 833 reg = <0x02184400 0x200>;
676 interrupts = <0 42 0x04>; 834 interrupts = <0 40 0x04>;
677 clocks = <&clks IMX6SL_CLK_USBOH3>; 835 clocks = <&clks IMX6SL_CLK_USBOH3>;
678 fsl,usbmisc = <&usbmisc 2>; 836 fsl,usbmisc = <&usbmisc 2>;
679 status = "disabled"; 837 status = "disabled";
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-03 09:01:11 -0500