aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-sabrelite.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabrelite.dtsi423
1 files changed, 423 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
new file mode 100644
index 000000000000..3bec128c7971
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -0,0 +1,423 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/input/input.h>
14
15/ {
16 memory {
17 reg = <0x10000000 0x40000000>;
18 };
19
20 regulators {
21 compatible = "simple-bus";
22 #address-cells = <1>;
23 #size-cells = <0>;
24
25 reg_2p5v: regulator@0 {
26 compatible = "regulator-fixed";
27 reg = <0>;
28 regulator-name = "2P5V";
29 regulator-min-microvolt = <2500000>;
30 regulator-max-microvolt = <2500000>;
31 regulator-always-on;
32 };
33
34 reg_3p3v: regulator@1 {
35 compatible = "regulator-fixed";
36 reg = <1>;
37 regulator-name = "3P3V";
38 regulator-min-microvolt = <3300000>;
39 regulator-max-microvolt = <3300000>;
40 regulator-always-on;
41 };
42
43 reg_usb_otg_vbus: regulator@2 {
44 compatible = "regulator-fixed";
45 reg = <2>;
46 regulator-name = "usb_otg_vbus";
47 regulator-min-microvolt = <5000000>;
48 regulator-max-microvolt = <5000000>;
49 gpio = <&gpio3 22 0>;
50 enable-active-high;
51 };
52 };
53
54 gpio-keys {
55 compatible = "gpio-keys";
56 pinctrl-names = "default";
57 pinctrl-0 = <&pinctrl_gpio_keys>;
58
59 power {
60 label = "Power Button";
61 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
62 linux,code = <KEY_POWER>;
63 gpio-key,wakeup;
64 };
65
66 menu {
67 label = "Menu";
68 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
69 linux,code = <KEY_MENU>;
70 };
71
72 home {
73 label = "Home";
74 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
75 linux,code = <KEY_HOME>;
76 };
77
78 back {
79 label = "Back";
80 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
81 linux,code = <KEY_BACK>;
82 };
83
84 volume-up {
85 label = "Volume Up";
86 gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
87 linux,code = <KEY_VOLUMEUP>;
88 };
89
90 volume-down {
91 label = "Volume Down";
92 gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
93 linux,code = <KEY_VOLUMEDOWN>;
94 };
95 };
96
97 sound {
98 compatible = "fsl,imx6q-sabrelite-sgtl5000",
99 "fsl,imx-audio-sgtl5000";
100 model = "imx6q-sabrelite-sgtl5000";
101 ssi-controller = <&ssi1>;
102 audio-codec = <&codec>;
103 audio-routing =
104 "MIC_IN", "Mic Jack",
105 "Mic Jack", "Mic Bias",
106 "Headphone Jack", "HP_OUT";
107 mux-int-port = <1>;
108 mux-ext-port = <4>;
109 };
110
111 backlight_lcd {
112 compatible = "pwm-backlight";
113 pwms = <&pwm1 0 5000000>;
114 brightness-levels = <0 4 8 16 32 64 128 255>;
115 default-brightness-level = <7>;
116 power-supply = <&reg_3p3v>;
117 status = "okay";
118 };
119
120 backlight_lvds {
121 compatible = "pwm-backlight";
122 pwms = <&pwm4 0 5000000>;
123 brightness-levels = <0 4 8 16 32 64 128 255>;
124 default-brightness-level = <7>;
125 power-supply = <&reg_3p3v>;
126 status = "okay";
127 };
128};
129
130&audmux {
131 pinctrl-names = "default";
132 pinctrl-0 = <&pinctrl_audmux>;
133 status = "okay";
134};
135
136&ecspi1 {
137 fsl,spi-num-chipselects = <1>;
138 cs-gpios = <&gpio3 19 0>;
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_ecspi1>;
141 status = "okay";
142
143 flash: m25p80@0 {
144 compatible = "sst,sst25vf016b";
145 spi-max-frequency = <20000000>;
146 reg = <0>;
147 };
148};
149
150&fec {
151 pinctrl-names = "default";
152 pinctrl-0 = <&pinctrl_enet>;
153 phy-mode = "rgmii";
154 phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
155 txen-skew-ps = <0>;
156 txc-skew-ps = <3000>;
157 rxdv-skew-ps = <0>;
158 rxc-skew-ps = <3000>;
159 rxd0-skew-ps = <0>;
160 rxd1-skew-ps = <0>;
161 rxd2-skew-ps = <0>;
162 rxd3-skew-ps = <0>;
163 txd0-skew-ps = <0>;
164 txd1-skew-ps = <0>;
165 txd2-skew-ps = <0>;
166 txd3-skew-ps = <0>;
167 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
168 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
169 status = "okay";
170};
171
172&i2c1 {
173 clock-frequency = <100000>;
174 pinctrl-names = "default";
175 pinctrl-0 = <&pinctrl_i2c1>;
176 status = "okay";
177
178 codec: sgtl5000@0a {
179 compatible = "fsl,sgtl5000";
180 reg = <0x0a>;
181 clocks = <&clks 201>;
182 VDDA-supply = <&reg_2p5v>;
183 VDDIO-supply = <&reg_3p3v>;
184 };
185};
186
187&iomuxc {
188 pinctrl-names = "default";
189 pinctrl-0 = <&pinctrl_hog>;
190
191 imx6q-sabrelite {
192 pinctrl_hog: hoggrp {
193 fsl,pins = <
194 /* SGTL5000 sys_mclk */
195 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
196 >;
197 };
198
199 pinctrl_audmux: audmuxgrp {
200 fsl,pins = <
201 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
202 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
203 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
204 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
205 >;
206 };
207
208 pinctrl_ecspi1: ecspi1grp {
209 fsl,pins = <
210 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
211 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
212 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
213 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
214 >;
215 };
216
217 pinctrl_enet: enetgrp {
218 fsl,pins = <
219 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
220 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
221 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
222 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
223 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
224 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
225 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
226 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
227 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
228 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
229 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
230 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
231 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
232 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
233 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
234 /* Phy reset */
235 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0
236 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
237 >;
238 };
239
240 pinctrl_gpio_keys: gpio_keysgrp {
241 fsl,pins = <
242 /* Power Button */
243 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
244 /* Menu Button */
245 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
246 /* Home Button */
247 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
248 /* Back Button */
249 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
250 /* Volume Up Button */
251 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
252 /* Volume Down Button */
253 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
254 >;
255 };
256
257 pinctrl_i2c1: i2c1grp {
258 fsl,pins = <
259 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
260 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
261 >;
262 };
263
264 pinctrl_pwm1: pwm1grp {
265 fsl,pins = <
266 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
267 >;
268 };
269
270 pinctrl_pwm3: pwm3grp {
271 fsl,pins = <
272 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
273 >;
274 };
275
276 pinctrl_pwm4: pwm4grp {
277 fsl,pins = <
278 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
279 >;
280 };
281
282 pinctrl_uart1: uart1grp {
283 fsl,pins = <
284 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
285 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
286 >;
287 };
288
289 pinctrl_uart2: uart2grp {
290 fsl,pins = <
291 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
292 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
293 >;
294 };
295
296 pinctrl_usbotg: usbotggrp {
297 fsl,pins = <
298 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
299 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
300 /* power enable, high active */
301 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
302 >;
303 };
304
305 pinctrl_usdhc3: usdhc3grp {
306 fsl,pins = <
307 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
308 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
309 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
310 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
311 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
312 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
313 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
314 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
315 >;
316 };
317
318 pinctrl_usdhc4: usdhc4grp {
319 fsl,pins = <
320 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
321 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
322 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
323 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
324 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
325 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
326 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
327 >;
328 };
329 };
330};
331
332&ldb {
333 status = "okay";
334
335 lvds-channel@0 {
336 fsl,data-mapping = "spwg";
337 fsl,data-width = <18>;
338 status = "okay";
339
340 display-timings {
341 native-mode = <&timing0>;
342 timing0: hsd100pxn1 {
343 clock-frequency = <65000000>;
344 hactive = <1024>;
345 vactive = <768>;
346 hback-porch = <220>;
347 hfront-porch = <40>;
348 vback-porch = <21>;
349 vfront-porch = <7>;
350 hsync-len = <60>;
351 vsync-len = <10>;
352 };
353 };
354 };
355};
356
357&pcie {
358 status = "okay";
359};
360
361&pwm1 {
362 pinctrl-names = "default";
363 pinctrl-0 = <&pinctrl_pwm1>;
364 status = "okay";
365};
366
367&pwm3 {
368 pinctrl-names = "default";
369 pinctrl-0 = <&pinctrl_pwm3>;
370 status = "okay";
371};
372
373&pwm4 {
374 pinctrl-names = "default";
375 pinctrl-0 = <&pinctrl_pwm4>;
376 status = "okay";
377};
378
379&ssi1 {
380 fsl,mode = "i2s-slave";
381 status = "okay";
382};
383
384&uart1 {
385 pinctrl-names = "default";
386 pinctrl-0 = <&pinctrl_uart1>;
387 status = "okay";
388};
389
390&uart2 {
391 pinctrl-names = "default";
392 pinctrl-0 = <&pinctrl_uart2>;
393 status = "okay";
394};
395
396&usbh1 {
397 status = "okay";
398};
399
400&usbotg {
401 vbus-supply = <&reg_usb_otg_vbus>;
402 pinctrl-names = "default";
403 pinctrl-0 = <&pinctrl_usbotg>;
404 disable-over-current;
405 status = "okay";
406};
407
408&usdhc3 {
409 pinctrl-names = "default";
410 pinctrl-0 = <&pinctrl_usdhc3>;
411 cd-gpios = <&gpio7 0 0>;
412 wp-gpios = <&gpio7 1 0>;
413 vmmc-supply = <&reg_3p3v>;
414 status = "okay";
415};
416
417&usdhc4 {
418 pinctrl-names = "default";
419 pinctrl-0 = <&pinctrl_usdhc4>;
420 cd-gpios = <&gpio2 6 0>;
421 vmmc-supply = <&reg_3p3v>;
422 status = "okay";
423};
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 06:09:43 -0500