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Diffstat (limited to 'arch/arm/boot/dts/imx6q-sabrelite.dts')
-rw-r--r--arch/arm/boot/dts/imx6q-sabrelite.dts31
1 files changed, 23 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index 72f30f3e6171..d152328285a1 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -46,15 +46,20 @@
46 46
47 iomuxc@020e0000 { 47 iomuxc@020e0000 {
48 pinctrl-names = "default"; 48 pinctrl-names = "default";
49 pinctrl-0 = <&pinctrl_gpio_hog>; 49 pinctrl-0 = <&pinctrl_hog>;
50 50
51 gpios { 51 hog {
52 pinctrl_gpio_hog: gpiohog { 52 pinctrl_hog: hoggrp {
53 fsl,pins = < 53 fsl,pins = <
54 144 0x80000000 /* MX6Q_PAD_EIM_D22__GPIO_3_22 */ 54 1450 0x80000000 /* MX6Q_PAD_NANDF_D6__GPIO_2_6 */
55 121 0x80000000 /* MX6Q_PAD_EIM_D19__GPIO_3_19 */ 55 1458 0x80000000 /* MX6Q_PAD_NANDF_D7__GPIO_2_7 */
56 953 0x80000000 /* MX6Q_PAD_GPIO_0__CCM_CLKO */ 56 121 0x80000000 /* MX6Q_PAD_EIM_D19__GPIO_3_19 */
57 >; 57 144 0x80000000 /* MX6Q_PAD_EIM_D22__GPIO_3_22 */
58 152 0x80000000 /* MX6Q_PAD_EIM_D23__GPIO_3_23 */
59 1262 0x80000000 /* MX6Q_PAD_SD3_DAT5__GPIO_7_0 */
60 1270 0x1f0b0 /* MX6Q_PAD_SD3_DAT4__GPIO_7_1 */
61 953 0x80000000 /* MX6Q_PAD_GPIO_0__CCM_CLKO */
62 >;
58 }; 63 };
59 }; 64 };
60 }; 65 };
@@ -63,6 +68,9 @@
63 aips-bus@02100000 { /* AIPS2 */ 68 aips-bus@02100000 { /* AIPS2 */
64 usb@02184000 { /* USB OTG */ 69 usb@02184000 { /* USB OTG */
65 vbus-supply = <&reg_usb_otg_vbus>; 70 vbus-supply = <&reg_usb_otg_vbus>;
71 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_usbotg_1>;
73 disable-over-current;
66 status = "okay"; 74 status = "okay";
67 }; 75 };
68 76
@@ -71,12 +79,16 @@
71 }; 79 };
72 80
73 ethernet@02188000 { 81 ethernet@02188000 {
82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_enet_1>;
74 phy-mode = "rgmii"; 84 phy-mode = "rgmii";
75 phy-reset-gpios = <&gpio3 23 0>; 85 phy-reset-gpios = <&gpio3 23 0>;
76 status = "okay"; 86 status = "okay";
77 }; 87 };
78 88
79 usdhc@02198000 { /* uSDHC3 */ 89 usdhc@02198000 { /* uSDHC3 */
90 pinctrl-names = "default";
91 pinctrl-0 = <&pinctrl_usdhc3_2>;
80 cd-gpios = <&gpio7 0 0>; 92 cd-gpios = <&gpio7 0 0>;
81 wp-gpios = <&gpio7 1 0>; 93 wp-gpios = <&gpio7 1 0>;
82 vmmc-supply = <&reg_3p3v>; 94 vmmc-supply = <&reg_3p3v>;
@@ -84,6 +96,8 @@
84 }; 96 };
85 97
86 usdhc@0219c000 { /* uSDHC4 */ 98 usdhc@0219c000 { /* uSDHC4 */
99 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_usdhc4_2>;
87 cd-gpios = <&gpio2 6 0>; 101 cd-gpios = <&gpio2 6 0>;
88 wp-gpios = <&gpio2 7 0>; 102 wp-gpios = <&gpio2 7 0>;
89 vmmc-supply = <&reg_3p3v>; 103 vmmc-supply = <&reg_3p3v>;
@@ -99,7 +113,7 @@
99 uart2: serial@021e8000 { 113 uart2: serial@021e8000 {
100 status = "okay"; 114 status = "okay";
101 pinctrl-names = "default"; 115 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_serial2_1>; 116 pinctrl-0 = <&pinctrl_uart2_1>;
103 }; 117 };
104 118
105 i2c@021a0000 { /* I2C1 */ 119 i2c@021a0000 { /* I2C1 */
@@ -111,6 +125,7 @@
111 codec: sgtl5000@0a { 125 codec: sgtl5000@0a {
112 compatible = "fsl,sgtl5000"; 126 compatible = "fsl,sgtl5000";
113 reg = <0x0a>; 127 reg = <0x0a>;
128 clocks = <&clks 169>;
114 VDDA-supply = <&reg_2p5v>; 129 VDDA-supply = <&reg_2p5v>;
115 VDDIO-supply = <&reg_3p3v>; 130 VDDIO-supply = <&reg_3p3v>;
116 }; 131 };