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Diffstat (limited to 'arch/arm/boot/dts/imx53.dtsi')
-rw-r--r--arch/arm/boot/dts/imx53.dtsi56
1 files changed, 51 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 569aa9f2c4ed..4307e80b2d2e 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -15,11 +15,6 @@
15 15
16/ { 16/ {
17 aliases { 17 aliases {
18 serial0 = &uart1;
19 serial1 = &uart2;
20 serial2 = &uart3;
21 serial3 = &uart4;
22 serial4 = &uart5;
23 gpio0 = &gpio1; 18 gpio0 = &gpio1;
24 gpio1 = &gpio2; 19 gpio1 = &gpio2;
25 gpio2 = &gpio3; 20 gpio2 = &gpio3;
@@ -30,6 +25,24 @@
30 i2c0 = &i2c1; 25 i2c0 = &i2c1;
31 i2c1 = &i2c2; 26 i2c1 = &i2c2;
32 i2c2 = &i2c3; 27 i2c2 = &i2c3;
28 serial0 = &uart1;
29 serial1 = &uart2;
30 serial2 = &uart3;
31 serial3 = &uart4;
32 serial4 = &uart5;
33 spi0 = &ecspi1;
34 spi1 = &ecspi2;
35 spi2 = &cspi;
36 };
37
38 cpus {
39 #address-cells = <1>;
40 #size-cells = <0>;
41 cpu@0 {
42 device_type = "cpu";
43 compatible = "arm,cortex-a8";
44 reg = <0x0>;
45 };
33 }; 46 };
34 47
35 tzic: tz-interrupt-controller@0fffc000 { 48 tzic: tz-interrupt-controller@0fffc000 {
@@ -140,6 +153,9 @@
140 reg = <0x50014000 0x4000>; 153 reg = <0x50014000 0x4000>;
141 interrupts = <30>; 154 interrupts = <30>;
142 clocks = <&clks 49>; 155 clocks = <&clks 49>;
156 dmas = <&sdma 24 1 0>,
157 <&sdma 25 1 0>;
158 dma-names = "rx", "tx";
143 fsl,fifo-depth = <15>; 159 fsl,fifo-depth = <15>;
144 fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */ 160 fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */
145 status = "disabled"; 161 status = "disabled";
@@ -957,6 +973,13 @@
957 reg = <0x60000000 0x10000000>; 973 reg = <0x60000000 0x10000000>;
958 ranges; 974 ranges;
959 975
976 iim: iim@63f98000 {
977 compatible = "fsl,imx53-iim", "fsl,imx27-iim";
978 reg = <0x63f98000 0x4000>;
979 interrupts = <69>;
980 clocks = <&clks 107>;
981 };
982
960 uart5: serial@63f90000 { 983 uart5: serial@63f90000 {
961 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 984 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
962 reg = <0x63f90000 0x4000>; 985 reg = <0x63f90000 0x4000>;
@@ -990,6 +1013,7 @@
990 interrupts = <6>; 1013 interrupts = <6>;
991 clocks = <&clks 56>, <&clks 56>; 1014 clocks = <&clks 56>, <&clks 56>;
992 clock-names = "ipg", "ahb"; 1015 clock-names = "ipg", "ahb";
1016 #dma-cells = <3>;
993 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; 1017 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
994 }; 1018 };
995 1019
@@ -1029,6 +1053,9 @@
1029 reg = <0x63fcc000 0x4000>; 1053 reg = <0x63fcc000 0x4000>;
1030 interrupts = <29>; 1054 interrupts = <29>;
1031 clocks = <&clks 48>; 1055 clocks = <&clks 48>;
1056 dmas = <&sdma 28 0 0>,
1057 <&sdma 29 0 0>;
1058 dma-names = "rx", "tx";
1032 fsl,fifo-depth = <15>; 1059 fsl,fifo-depth = <15>;
1033 fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */ 1060 fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */
1034 status = "disabled"; 1061 status = "disabled";
@@ -1053,6 +1080,9 @@
1053 reg = <0x63fe8000 0x4000>; 1080 reg = <0x63fe8000 0x4000>;
1054 interrupts = <96>; 1081 interrupts = <96>;
1055 clocks = <&clks 50>; 1082 clocks = <&clks 50>;
1083 dmas = <&sdma 46 0 0>,
1084 <&sdma 47 0 0>;
1085 dma-names = "rx", "tx";
1056 fsl,fifo-depth = <15>; 1086 fsl,fifo-depth = <15>;
1057 fsl,ssi-dma-events = <47 46 45 44>; /* TX0 RX0 TX1 RX1 */ 1087 fsl,ssi-dma-events = <47 46 45 44>; /* TX0 RX0 TX1 RX1 */
1058 status = "disabled"; 1088 status = "disabled";
@@ -1076,6 +1106,22 @@
1076 crtcs = <&ipu 1>; 1106 crtcs = <&ipu 1>;
1077 status = "disabled"; 1107 status = "disabled";
1078 }; 1108 };
1109
1110 vpu: vpu@63ff4000 {
1111 compatible = "fsl,imx53-vpu";
1112 reg = <0x63ff4000 0x1000>;
1113 interrupts = <9>;
1114 clocks = <&clks 63>, <&clks 63>;
1115 clock-names = "per", "ahb";
1116 iram = <&ocram>;
1117 status = "disabled";
1118 };
1119 };
1120
1121 ocram: sram@f8000000 {
1122 compatible = "mmio-sram";
1123 reg = <0xf8000000 0x20000>;
1124 clocks = <&clks 186>;
1079 }; 1125 };
1080 }; 1126 };
1081}; 1127};