diff options
Diffstat (limited to 'arch/arm/boot/dts/imx51-babbage.dts')
-rw-r--r-- | arch/arm/boot/dts/imx51-babbage.dts | 374 |
1 files changed, 246 insertions, 128 deletions
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts index 9e9deb244b76..6bc3243a80d3 100644 --- a/arch/arm/boot/dts/imx51-babbage.dts +++ b/arch/arm/boot/dts/imx51-babbage.dts | |||
@@ -17,10 +17,28 @@ | |||
17 | model = "Freescale i.MX51 Babbage Board"; | 17 | model = "Freescale i.MX51 Babbage Board"; |
18 | compatible = "fsl,imx51-babbage", "fsl,imx51"; | 18 | compatible = "fsl,imx51-babbage", "fsl,imx51"; |
19 | 19 | ||
20 | chosen { | ||
21 | stdout-path = &uart1; | ||
22 | }; | ||
23 | |||
20 | memory { | 24 | memory { |
21 | reg = <0x90000000 0x20000000>; | 25 | reg = <0x90000000 0x20000000>; |
22 | }; | 26 | }; |
23 | 27 | ||
28 | clocks { | ||
29 | ckih1 { | ||
30 | clock-frequency = <22579200>; | ||
31 | }; | ||
32 | |||
33 | clk_26M: codec_clock { | ||
34 | compatible = "fixed-clock"; | ||
35 | reg=<0>; | ||
36 | #clock-cells = <0>; | ||
37 | clock-frequency = <26000000>; | ||
38 | gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; | ||
39 | }; | ||
40 | }; | ||
41 | |||
24 | display0: display@di0 { | 42 | display0: display@di0 { |
25 | compatible = "fsl,imx-parallel-display"; | 43 | compatible = "fsl,imx-parallel-display"; |
26 | interface-pix-fmt = "rgb24"; | 44 | interface-pix-fmt = "rgb24"; |
@@ -82,11 +100,13 @@ | |||
82 | 100 | ||
83 | gpio-keys { | 101 | gpio-keys { |
84 | compatible = "gpio-keys"; | 102 | compatible = "gpio-keys"; |
103 | pinctrl-names = "default"; | ||
104 | pinctrl-0 = <&pinctrl_gpio_keys>; | ||
85 | 105 | ||
86 | power { | 106 | power { |
87 | label = "Power Button"; | 107 | label = "Power Button"; |
88 | gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>; | 108 | gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>; |
89 | linux,code = <116>; /* KEY_POWER */ | 109 | linux,code = <KEY_POWER>; |
90 | gpio-key,wakeup; | 110 | gpio-key,wakeup; |
91 | }; | 111 | }; |
92 | }; | 112 | }; |
@@ -102,6 +122,36 @@ | |||
102 | }; | 122 | }; |
103 | }; | 123 | }; |
104 | 124 | ||
125 | regulators { | ||
126 | compatible = "simple-bus"; | ||
127 | #address-cells = <1>; | ||
128 | #size-cells = <0>; | ||
129 | |||
130 | reg_usbh1_vbus: regulator@0 { | ||
131 | compatible = "regulator-fixed"; | ||
132 | pinctrl-names = "default"; | ||
133 | pinctrl-0 = <&pinctrl_usbh1reg>; | ||
134 | reg = <0>; | ||
135 | regulator-name = "usbh1_vbus"; | ||
136 | regulator-min-microvolt = <5000000>; | ||
137 | regulator-max-microvolt = <5000000>; | ||
138 | gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>; | ||
139 | enable-active-high; | ||
140 | }; | ||
141 | |||
142 | reg_usbotg_vbus: regulator@1 { | ||
143 | compatible = "regulator-fixed"; | ||
144 | pinctrl-names = "default"; | ||
145 | pinctrl-0 = <&pinctrl_usbotgreg>; | ||
146 | reg = <1>; | ||
147 | regulator-name = "usbotg_vbus"; | ||
148 | regulator-min-microvolt = <5000000>; | ||
149 | regulator-max-microvolt = <5000000>; | ||
150 | gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; | ||
151 | enable-active-high; | ||
152 | }; | ||
153 | }; | ||
154 | |||
105 | sound { | 155 | sound { |
106 | compatible = "fsl,imx51-babbage-sgtl5000", | 156 | compatible = "fsl,imx51-babbage-sgtl5000", |
107 | "fsl,imx-audio-sgtl5000"; | 157 | "fsl,imx-audio-sgtl5000"; |
@@ -116,41 +166,23 @@ | |||
116 | mux-ext-port = <3>; | 166 | mux-ext-port = <3>; |
117 | }; | 167 | }; |
118 | 168 | ||
119 | clocks { | 169 | usbphy { |
120 | ckih1 { | 170 | #address-cells = <1>; |
121 | clock-frequency = <22579200>; | 171 | #size-cells = <0>; |
122 | }; | 172 | compatible = "simple-bus"; |
123 | 173 | ||
124 | clk_26M: codec_clock { | 174 | usbh1phy: usbh1phy@0 { |
125 | compatible = "fixed-clock"; | 175 | compatible = "usb-nop-xceiv"; |
126 | reg=<0>; | 176 | reg = <0>; |
127 | #clock-cells = <0>; | 177 | clocks = <&clks IMX5_CLK_DUMMY>; |
128 | clock-frequency = <26000000>; | 178 | clock-names = "main_clk"; |
129 | gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; | ||
130 | }; | 179 | }; |
131 | }; | 180 | }; |
132 | }; | 181 | }; |
133 | 182 | ||
134 | &esdhc1 { | 183 | &audmux { |
135 | pinctrl-names = "default"; | ||
136 | pinctrl-0 = <&pinctrl_esdhc1>; | ||
137 | fsl,cd-controller; | ||
138 | fsl,wp-controller; | ||
139 | status = "okay"; | ||
140 | }; | ||
141 | |||
142 | &esdhc2 { | ||
143 | pinctrl-names = "default"; | ||
144 | pinctrl-0 = <&pinctrl_esdhc2>; | ||
145 | cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; | ||
146 | wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; | ||
147 | status = "okay"; | ||
148 | }; | ||
149 | |||
150 | &uart3 { | ||
151 | pinctrl-names = "default"; | 184 | pinctrl-names = "default"; |
152 | pinctrl-0 = <&pinctrl_uart3>; | 185 | pinctrl-0 = <&pinctrl_audmux>; |
153 | fsl,uart-has-rtscts; | ||
154 | status = "okay"; | 186 | status = "okay"; |
155 | }; | 187 | }; |
156 | 188 | ||
@@ -163,9 +195,9 @@ | |||
163 | status = "okay"; | 195 | status = "okay"; |
164 | 196 | ||
165 | pmic: mc13892@0 { | 197 | pmic: mc13892@0 { |
166 | #address-cells = <1>; | ||
167 | #size-cells = <0>; | ||
168 | compatible = "fsl,mc13892"; | 198 | compatible = "fsl,mc13892"; |
199 | pinctrl-names = "default"; | ||
200 | pinctrl-0 = <&pinctrl_pmic>; | ||
169 | spi-max-frequency = <6000000>; | 201 | spi-max-frequency = <6000000>; |
170 | spi-cs-high; | 202 | spi-cs-high; |
171 | reg = <0>; | 203 | reg = <0>; |
@@ -280,6 +312,53 @@ | |||
280 | }; | 312 | }; |
281 | }; | 313 | }; |
282 | 314 | ||
315 | &esdhc1 { | ||
316 | pinctrl-names = "default"; | ||
317 | pinctrl-0 = <&pinctrl_esdhc1>; | ||
318 | fsl,cd-controller; | ||
319 | fsl,wp-controller; | ||
320 | status = "okay"; | ||
321 | }; | ||
322 | |||
323 | &esdhc2 { | ||
324 | pinctrl-names = "default"; | ||
325 | pinctrl-0 = <&pinctrl_esdhc2>; | ||
326 | cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; | ||
327 | wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; | ||
328 | status = "okay"; | ||
329 | }; | ||
330 | |||
331 | &fec { | ||
332 | pinctrl-names = "default"; | ||
333 | pinctrl-0 = <&pinctrl_fec>; | ||
334 | phy-mode = "mii"; | ||
335 | phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; | ||
336 | phy-reset-duration = <1>; | ||
337 | status = "okay"; | ||
338 | }; | ||
339 | |||
340 | &i2c1 { | ||
341 | pinctrl-names = "default"; | ||
342 | pinctrl-0 = <&pinctrl_i2c1>; | ||
343 | status = "okay"; | ||
344 | }; | ||
345 | |||
346 | &i2c2 { | ||
347 | pinctrl-names = "default"; | ||
348 | pinctrl-0 = <&pinctrl_i2c2>; | ||
349 | status = "okay"; | ||
350 | |||
351 | sgtl5000: codec@0a { | ||
352 | compatible = "fsl,sgtl5000"; | ||
353 | pinctrl-names = "default"; | ||
354 | pinctrl-0 = <&pinctrl_clkcodec>; | ||
355 | reg = <0x0a>; | ||
356 | clocks = <&clk_26M>; | ||
357 | VDDA-supply = <&vdig_reg>; | ||
358 | VDDIO-supply = <&vvideo_reg>; | ||
359 | }; | ||
360 | }; | ||
361 | |||
283 | &ipu_di0_disp0 { | 362 | &ipu_di0_disp0 { |
284 | remote-endpoint = <&display0_in>; | 363 | remote-endpoint = <&display0_in>; |
285 | }; | 364 | }; |
@@ -288,29 +367,74 @@ | |||
288 | remote-endpoint = <&display1_in>; | 367 | remote-endpoint = <&display1_in>; |
289 | }; | 368 | }; |
290 | 369 | ||
370 | &kpp { | ||
371 | pinctrl-names = "default"; | ||
372 | pinctrl-0 = <&pinctrl_kpp>; | ||
373 | linux,keymap = < | ||
374 | MATRIX_KEY(0, 0, KEY_UP) | ||
375 | MATRIX_KEY(0, 1, KEY_DOWN) | ||
376 | MATRIX_KEY(0, 2, KEY_VOLUMEDOWN) | ||
377 | MATRIX_KEY(0, 3, KEY_HOME) | ||
378 | MATRIX_KEY(1, 0, KEY_RIGHT) | ||
379 | MATRIX_KEY(1, 1, KEY_LEFT) | ||
380 | MATRIX_KEY(1, 2, KEY_ENTER) | ||
381 | MATRIX_KEY(1, 3, KEY_VOLUMEUP) | ||
382 | MATRIX_KEY(2, 0, KEY_F6) | ||
383 | MATRIX_KEY(2, 1, KEY_F8) | ||
384 | MATRIX_KEY(2, 2, KEY_F9) | ||
385 | MATRIX_KEY(2, 3, KEY_F10) | ||
386 | MATRIX_KEY(3, 0, KEY_F1) | ||
387 | MATRIX_KEY(3, 1, KEY_F2) | ||
388 | MATRIX_KEY(3, 2, KEY_F3) | ||
389 | MATRIX_KEY(3, 3, KEY_POWER) | ||
390 | >; | ||
391 | status = "okay"; | ||
392 | }; | ||
393 | |||
291 | &ssi2 { | 394 | &ssi2 { |
292 | fsl,mode = "i2s-slave"; | 395 | fsl,mode = "i2s-slave"; |
293 | status = "okay"; | 396 | status = "okay"; |
294 | }; | 397 | }; |
295 | 398 | ||
296 | &iomuxc { | 399 | &uart1 { |
297 | pinctrl-names = "default"; | 400 | pinctrl-names = "default"; |
298 | pinctrl-0 = <&pinctrl_hog>; | 401 | pinctrl-0 = <&pinctrl_uart1>; |
402 | fsl,uart-has-rtscts; | ||
403 | status = "okay"; | ||
404 | }; | ||
299 | 405 | ||
300 | imx51-babbage { | 406 | &uart2 { |
301 | pinctrl_hog: hoggrp { | 407 | pinctrl-names = "default"; |
302 | fsl,pins = < | 408 | pinctrl-0 = <&pinctrl_uart2>; |
303 | MX51_PAD_GPIO1_0__SD1_CD 0x20d5 | 409 | status = "okay"; |
304 | MX51_PAD_GPIO1_1__SD1_WP 0x20d5 | 410 | }; |
305 | MX51_PAD_GPIO1_5__GPIO1_5 0x100 | 411 | |
306 | MX51_PAD_GPIO1_6__GPIO1_6 0x100 | 412 | &uart3 { |
307 | MX51_PAD_EIM_A27__GPIO2_21 0x5 | 413 | pinctrl-names = "default"; |
308 | MX51_PAD_CSPI1_SS0__GPIO4_24 0x85 | 414 | pinctrl-0 = <&pinctrl_uart3>; |
309 | MX51_PAD_CSPI1_SS1__GPIO4_25 0x85 | 415 | fsl,uart-has-rtscts; |
310 | MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000 | 416 | status = "okay"; |
311 | >; | 417 | }; |
312 | }; | 418 | |
419 | &usbh1 { | ||
420 | pinctrl-names = "default"; | ||
421 | pinctrl-0 = <&pinctrl_usbh1>; | ||
422 | vbus-supply = <®_usbh1_vbus>; | ||
423 | fsl,usbphy = <&usbh1phy>; | ||
424 | phy_type = "ulpi"; | ||
425 | status = "okay"; | ||
426 | }; | ||
313 | 427 | ||
428 | &usbotg { | ||
429 | dr_mode = "otg"; | ||
430 | disable-over-current; | ||
431 | phy_type = "utmi_wide"; | ||
432 | vbus-supply = <®_usbotg_vbus>; | ||
433 | status = "okay"; | ||
434 | }; | ||
435 | |||
436 | &iomuxc { | ||
437 | imx51-babbage { | ||
314 | pinctrl_audmux: audmuxgrp { | 438 | pinctrl_audmux: audmuxgrp { |
315 | fsl,pins = < | 439 | fsl,pins = < |
316 | MX51_PAD_AUD3_BB_TXD__AUD3_TXD 0x80000000 | 440 | MX51_PAD_AUD3_BB_TXD__AUD3_TXD 0x80000000 |
@@ -320,11 +444,19 @@ | |||
320 | >; | 444 | >; |
321 | }; | 445 | }; |
322 | 446 | ||
447 | pinctrl_clkcodec: clkcodecgrp { | ||
448 | fsl,pins = < | ||
449 | MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000 | ||
450 | >; | ||
451 | }; | ||
452 | |||
323 | pinctrl_ecspi1: ecspi1grp { | 453 | pinctrl_ecspi1: ecspi1grp { |
324 | fsl,pins = < | 454 | fsl,pins = < |
325 | MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185 | 455 | MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185 |
326 | MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185 | 456 | MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185 |
327 | MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185 | 457 | MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185 |
458 | MX51_PAD_CSPI1_SS0__GPIO4_24 0x85 /* CS0 */ | ||
459 | MX51_PAD_CSPI1_SS1__GPIO4_25 0x85 /* CS1 */ | ||
328 | >; | 460 | >; |
329 | }; | 461 | }; |
330 | 462 | ||
@@ -336,6 +468,8 @@ | |||
336 | MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5 | 468 | MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5 |
337 | MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5 | 469 | MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5 |
338 | MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5 | 470 | MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5 |
471 | MX51_PAD_GPIO1_0__SD1_CD 0x20d5 | ||
472 | MX51_PAD_GPIO1_1__SD1_WP 0x20d5 | ||
339 | >; | 473 | >; |
340 | }; | 474 | }; |
341 | 475 | ||
@@ -347,29 +481,38 @@ | |||
347 | MX51_PAD_SD2_DATA1__SD2_DATA1 0x20d5 | 481 | MX51_PAD_SD2_DATA1__SD2_DATA1 0x20d5 |
348 | MX51_PAD_SD2_DATA2__SD2_DATA2 0x20d5 | 482 | MX51_PAD_SD2_DATA2__SD2_DATA2 0x20d5 |
349 | MX51_PAD_SD2_DATA3__SD2_DATA3 0x20d5 | 483 | MX51_PAD_SD2_DATA3__SD2_DATA3 0x20d5 |
484 | MX51_PAD_GPIO1_5__GPIO1_5 0x100 /* WP */ | ||
485 | MX51_PAD_GPIO1_6__GPIO1_6 0x100 /* CD */ | ||
350 | >; | 486 | >; |
351 | }; | 487 | }; |
352 | 488 | ||
353 | pinctrl_fec: fecgrp { | 489 | pinctrl_fec: fecgrp { |
354 | fsl,pins = < | 490 | fsl,pins = < |
355 | MX51_PAD_EIM_EB2__FEC_MDIO 0x80000000 | 491 | MX51_PAD_EIM_EB2__FEC_MDIO 0x000001f5 |
356 | MX51_PAD_EIM_EB3__FEC_RDATA1 0x80000000 | 492 | MX51_PAD_EIM_EB3__FEC_RDATA1 0x00000085 |
357 | MX51_PAD_EIM_CS2__FEC_RDATA2 0x80000000 | 493 | MX51_PAD_EIM_CS2__FEC_RDATA2 0x00000085 |
358 | MX51_PAD_EIM_CS3__FEC_RDATA3 0x80000000 | 494 | MX51_PAD_EIM_CS3__FEC_RDATA3 0x00000085 |
359 | MX51_PAD_EIM_CS4__FEC_RX_ER 0x80000000 | 495 | MX51_PAD_EIM_CS4__FEC_RX_ER 0x00000180 |
360 | MX51_PAD_EIM_CS5__FEC_CRS 0x80000000 | 496 | MX51_PAD_EIM_CS5__FEC_CRS 0x00000180 |
361 | MX51_PAD_NANDF_RB2__FEC_COL 0x80000000 | 497 | MX51_PAD_NANDF_RB2__FEC_COL 0x00000180 |
362 | MX51_PAD_NANDF_RB3__FEC_RX_CLK 0x80000000 | 498 | MX51_PAD_NANDF_RB3__FEC_RX_CLK 0x00000180 |
363 | MX51_PAD_NANDF_D9__FEC_RDATA0 0x80000000 | 499 | MX51_PAD_NANDF_D9__FEC_RDATA0 0x00002180 |
364 | MX51_PAD_NANDF_D8__FEC_TDATA0 0x80000000 | 500 | MX51_PAD_NANDF_D8__FEC_TDATA0 0x00002004 |
365 | MX51_PAD_NANDF_CS2__FEC_TX_ER 0x80000000 | 501 | MX51_PAD_NANDF_CS2__FEC_TX_ER 0x00002004 |
366 | MX51_PAD_NANDF_CS3__FEC_MDC 0x80000000 | 502 | MX51_PAD_NANDF_CS3__FEC_MDC 0x00002004 |
367 | MX51_PAD_NANDF_CS4__FEC_TDATA1 0x80000000 | 503 | MX51_PAD_NANDF_CS4__FEC_TDATA1 0x00002004 |
368 | MX51_PAD_NANDF_CS5__FEC_TDATA2 0x80000000 | 504 | MX51_PAD_NANDF_CS5__FEC_TDATA2 0x00002004 |
369 | MX51_PAD_NANDF_CS6__FEC_TDATA3 0x80000000 | 505 | MX51_PAD_NANDF_CS6__FEC_TDATA3 0x00002004 |
370 | MX51_PAD_NANDF_CS7__FEC_TX_EN 0x80000000 | 506 | MX51_PAD_NANDF_CS7__FEC_TX_EN 0x00002004 |
371 | MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK 0x80000000 | 507 | MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK 0x00002180 |
372 | MX51_PAD_EIM_A20__GPIO2_14 0x85 /* Reset */ | 508 | MX51_PAD_NANDF_D11__FEC_RX_DV 0x000020a4 |
509 | MX51_PAD_EIM_A20__GPIO2_14 0x00000085 /* Phy Reset */ | ||
510 | >; | ||
511 | }; | ||
512 | |||
513 | pinctrl_gpio_keys: gpiokeysgrp { | ||
514 | fsl,pins = < | ||
515 | MX51_PAD_EIM_A27__GPIO2_21 0x5 | ||
373 | >; | 516 | >; |
374 | }; | 517 | }; |
375 | 518 | ||
@@ -379,6 +522,13 @@ | |||
379 | >; | 522 | >; |
380 | }; | 523 | }; |
381 | 524 | ||
525 | pinctrl_i2c1: i2c1grp { | ||
526 | fsl,pins = < | ||
527 | MX51_PAD_EIM_D19__I2C1_SCL 0x400001ed | ||
528 | MX51_PAD_EIM_D16__I2C1_SDA 0x400001ed | ||
529 | >; | ||
530 | }; | ||
531 | |||
382 | pinctrl_i2c2: i2c2grp { | 532 | pinctrl_i2c2: i2c2grp { |
383 | fsl,pins = < | 533 | fsl,pins = < |
384 | MX51_PAD_KEY_COL4__I2C2_SCL 0x400001ed | 534 | MX51_PAD_KEY_COL4__I2C2_SCL 0x400001ed |
@@ -455,6 +605,12 @@ | |||
455 | >; | 605 | >; |
456 | }; | 606 | }; |
457 | 607 | ||
608 | pinctrl_pmic: pmicgrp { | ||
609 | fsl,pins = < | ||
610 | MX51_PAD_GPIO1_8__GPIO1_8 0xe5 /* IRQ */ | ||
611 | >; | ||
612 | }; | ||
613 | |||
458 | pinctrl_uart1: uart1grp { | 614 | pinctrl_uart1: uart1grp { |
459 | fsl,pins = < | 615 | fsl,pins = < |
460 | MX51_PAD_UART1_RXD__UART1_RXD 0x1c5 | 616 | MX51_PAD_UART1_RXD__UART1_RXD 0x1c5 |
@@ -479,71 +635,33 @@ | |||
479 | MX51_PAD_EIM_D24__UART3_CTS 0x1c5 | 635 | MX51_PAD_EIM_D24__UART3_CTS 0x1c5 |
480 | >; | 636 | >; |
481 | }; | 637 | }; |
482 | }; | ||
483 | }; | ||
484 | 638 | ||
485 | &uart1 { | 639 | pinctrl_usbh1: usbh1grp { |
486 | pinctrl-names = "default"; | 640 | fsl,pins = < |
487 | pinctrl-0 = <&pinctrl_uart1>; | 641 | MX51_PAD_USBH1_CLK__USBH1_CLK 0x80000000 |
488 | fsl,uart-has-rtscts; | 642 | MX51_PAD_USBH1_DIR__USBH1_DIR 0x80000000 |
489 | status = "okay"; | 643 | MX51_PAD_USBH1_NXT__USBH1_NXT 0x80000000 |
490 | }; | 644 | MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x80000000 |
491 | 645 | MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x80000000 | |
492 | &uart2 { | 646 | MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x80000000 |
493 | pinctrl-names = "default"; | 647 | MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x80000000 |
494 | pinctrl-0 = <&pinctrl_uart2>; | 648 | MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x80000000 |
495 | status = "okay"; | 649 | MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x80000000 |
496 | }; | 650 | MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x80000000 |
651 | MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x80000000 | ||
652 | >; | ||
653 | }; | ||
497 | 654 | ||
498 | &i2c2 { | 655 | pinctrl_usbh1reg: usbh1reggrp { |
499 | pinctrl-names = "default"; | 656 | fsl,pins = < |
500 | pinctrl-0 = <&pinctrl_i2c2>; | 657 | MX51_PAD_EIM_D21__GPIO2_5 0x85 |
501 | status = "okay"; | 658 | >; |
659 | }; | ||
502 | 660 | ||
503 | sgtl5000: codec@0a { | 661 | pinctrl_usbotgreg: usbotgreggrp { |
504 | compatible = "fsl,sgtl5000"; | 662 | fsl,pins = < |
505 | reg = <0x0a>; | 663 | MX51_PAD_GPIO1_7__GPIO1_7 0x85 |
506 | clocks = <&clk_26M>; | 664 | >; |
507 | VDDA-supply = <&vdig_reg>; | 665 | }; |
508 | VDDIO-supply = <&vvideo_reg>; | ||
509 | }; | 666 | }; |
510 | }; | 667 | }; |
511 | |||
512 | &audmux { | ||
513 | pinctrl-names = "default"; | ||
514 | pinctrl-0 = <&pinctrl_audmux>; | ||
515 | status = "okay"; | ||
516 | }; | ||
517 | |||
518 | &fec { | ||
519 | pinctrl-names = "default"; | ||
520 | pinctrl-0 = <&pinctrl_fec>; | ||
521 | phy-mode = "mii"; | ||
522 | phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; | ||
523 | phy-reset-duration = <1>; | ||
524 | status = "okay"; | ||
525 | }; | ||
526 | |||
527 | &kpp { | ||
528 | pinctrl-names = "default"; | ||
529 | pinctrl-0 = <&pinctrl_kpp>; | ||
530 | linux,keymap = < | ||
531 | MATRIX_KEY(0, 0, KEY_UP) | ||
532 | MATRIX_KEY(0, 1, KEY_DOWN) | ||
533 | MATRIX_KEY(0, 2, KEY_VOLUMEDOWN) | ||
534 | MATRIX_KEY(0, 3, KEY_HOME) | ||
535 | MATRIX_KEY(1, 0, KEY_RIGHT) | ||
536 | MATRIX_KEY(1, 1, KEY_LEFT) | ||
537 | MATRIX_KEY(1, 2, KEY_ENTER) | ||
538 | MATRIX_KEY(1, 3, KEY_VOLUMEUP) | ||
539 | MATRIX_KEY(2, 0, KEY_F6) | ||
540 | MATRIX_KEY(2, 1, KEY_F8) | ||
541 | MATRIX_KEY(2, 2, KEY_F9) | ||
542 | MATRIX_KEY(2, 3, KEY_F10) | ||
543 | MATRIX_KEY(3, 0, KEY_F1) | ||
544 | MATRIX_KEY(3, 1, KEY_F2) | ||
545 | MATRIX_KEY(3, 2, KEY_F3) | ||
546 | MATRIX_KEY(3, 3, KEY_POWER) | ||
547 | >; | ||
548 | status = "okay"; | ||
549 | }; | ||