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Diffstat (limited to 'arch/arm/boot/dts/exynos5440.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos5440.dtsi67
1 files changed, 42 insertions, 25 deletions
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 9a99755920c0..48cc96aa0b5f 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -16,6 +16,12 @@
16 16
17 interrupt-parent = <&gic>; 17 interrupt-parent = <&gic>;
18 18
19 clock: clock-controller@0x160000 {
20 compatible = "samsung,exynos5440-clock";
21 reg = <0x160000 0x1000>;
22 #clock-cells = <1>;
23 };
24
19 gic:interrupt-controller@2E0000 { 25 gic:interrupt-controller@2E0000 {
20 compatible = "arm,cortex-a15-gic"; 26 compatible = "arm,cortex-a15-gic";
21 #interrupt-cells = <3>; 27 #interrupt-cells = <3>;
@@ -24,55 +30,51 @@
24 }; 30 };
25 31
26 cpus { 32 cpus {
33 #address-cells = <1>;
34 #size-cells = <0>;
35
27 cpu@0 { 36 cpu@0 {
28 compatible = "arm,cortex-a15"; 37 compatible = "arm,cortex-a15";
29 timer { 38 reg = <0>;
30 compatible = "arm,armv7-timer";
31 interrupts = <1 13 0xf08>;
32 clock-frequency = <1000000>;
33 };
34 }; 39 };
35 cpu@1 { 40 cpu@1 {
36 compatible = "arm,cortex-a15"; 41 compatible = "arm,cortex-a15";
37 timer { 42 reg = <1>;
38 compatible = "arm,armv7-timer";
39 interrupts = <1 14 0xf08>;
40 clock-frequency = <1000000>;
41 };
42 }; 43 };
43 cpu@2 { 44 cpu@2 {
44 compatible = "arm,cortex-a15"; 45 compatible = "arm,cortex-a15";
45 timer { 46 reg = <2>;
46 compatible = "arm,armv7-timer";
47 interrupts = <1 14 0xf08>;
48 clock-frequency = <1000000>;
49 };
50 }; 47 };
51 cpu@3 { 48 cpu@3 {
52 compatible = "arm,cortex-a15"; 49 compatible = "arm,cortex-a15";
53 timer { 50 reg = <3>;
54 compatible = "arm,armv7-timer";
55 interrupts = <1 14 0xf08>;
56 clock-frequency = <1000000>;
57 };
58 }; 51 };
59 }; 52 };
60 53
61 common { 54 timer {
62 compatible = "samsung,exynos5440"; 55 compatible = "arm,cortex-a15-timer",
63 56 "arm,armv7-timer";
57 interrupts = <1 13 0xf08>,
58 <1 14 0xf08>,
59 <1 11 0xf08>,
60 <1 10 0xf08>;
61 clock-frequency = <50000000>;
64 }; 62 };
65 63
66 serial@B0000 { 64 serial@B0000 {
67 compatible = "samsung,exynos4210-uart"; 65 compatible = "samsung,exynos4210-uart";
68 reg = <0xB0000 0x1000>; 66 reg = <0xB0000 0x1000>;
69 interrupts = <0 2 0>; 67 interrupts = <0 2 0>;
68 clocks = <&clock 21>, <&clock 21>;
69 clock-names = "uart", "clk_uart_baud0";
70 }; 70 };
71 71
72 serial@C0000 { 72 serial@C0000 {
73 compatible = "samsung,exynos4210-uart"; 73 compatible = "samsung,exynos4210-uart";
74 reg = <0xC0000 0x1000>; 74 reg = <0xC0000 0x1000>;
75 interrupts = <0 3 0>; 75 interrupts = <0 3 0>;
76 clocks = <&clock 21>, <&clock 21>;
77 clock-names = "uart", "clk_uart_baud0";
76 }; 78 };
77 79
78 spi { 80 spi {
@@ -83,6 +85,8 @@
83 rx-dma-channel = <&pdma0 4>; /* preliminary */ 85 rx-dma-channel = <&pdma0 4>; /* preliminary */
84 #address-cells = <1>; 86 #address-cells = <1>;
85 #size-cells = <0>; 87 #size-cells = <0>;
88 clocks = <&clock 21>, <&clock 16>;
89 clock-names = "spi", "spi_busclk0";
86 }; 90 };
87 91
88 pinctrl { 92 pinctrl {
@@ -110,25 +114,31 @@
110 }; 114 };
111 115
112 i2c@F0000 { 116 i2c@F0000 {
113 compatible = "samsung,s3c2440-i2c"; 117 compatible = "samsung,exynos5440-i2c";
114 reg = <0xF0000 0x1000>; 118 reg = <0xF0000 0x1000>;
115 interrupts = <0 5 0>; 119 interrupts = <0 5 0>;
116 #address-cells = <1>; 120 #address-cells = <1>;
117 #size-cells = <0>; 121 #size-cells = <0>;
122 clocks = <&clock 21>;
123 clock-names = "i2c";
118 }; 124 };
119 125
120 i2c@100000 { 126 i2c@100000 {
121 compatible = "samsung,s3c2440-i2c"; 127 compatible = "samsung,exynos5440-i2c";
122 reg = <0x100000 0x1000>; 128 reg = <0x100000 0x1000>;
123 interrupts = <0 6 0>; 129 interrupts = <0 6 0>;
124 #address-cells = <1>; 130 #address-cells = <1>;
125 #size-cells = <0>; 131 #size-cells = <0>;
132 clocks = <&clock 21>;
133 clock-names = "i2c";
126 }; 134 };
127 135
128 watchdog { 136 watchdog {
129 compatible = "samsung,s3c2410-wdt"; 137 compatible = "samsung,s3c2410-wdt";
130 reg = <0x110000 0x1000>; 138 reg = <0x110000 0x1000>;
131 interrupts = <0 1 0>; 139 interrupts = <0 1 0>;
140 clocks = <&clock 21>;
141 clock-names = "watchdog";
132 }; 142 };
133 143
134 amba { 144 amba {
@@ -142,6 +152,8 @@
142 compatible = "arm,pl330", "arm,primecell"; 152 compatible = "arm,pl330", "arm,primecell";
143 reg = <0x120000 0x1000>; 153 reg = <0x120000 0x1000>;
144 interrupts = <0 34 0>; 154 interrupts = <0 34 0>;
155 clocks = <&clock 21>;
156 clock-names = "apb_pclk";
145 #dma-cells = <1>; 157 #dma-cells = <1>;
146 #dma-channels = <8>; 158 #dma-channels = <8>;
147 #dma-requests = <32>; 159 #dma-requests = <32>;
@@ -151,6 +163,8 @@
151 compatible = "arm,pl330", "arm,primecell"; 163 compatible = "arm,pl330", "arm,primecell";
152 reg = <0x121000 0x1000>; 164 reg = <0x121000 0x1000>;
153 interrupts = <0 35 0>; 165 interrupts = <0 35 0>;
166 clocks = <&clock 21>;
167 clock-names = "apb_pclk";
154 #dma-cells = <1>; 168 #dma-cells = <1>;
155 #dma-channels = <8>; 169 #dma-channels = <8>;
156 #dma-requests = <32>; 170 #dma-requests = <32>;
@@ -161,5 +175,8 @@
161 compatible = "samsung,s3c6410-rtc"; 175 compatible = "samsung,s3c6410-rtc";
162 reg = <0x130000 0x1000>; 176 reg = <0x130000 0x1000>;
163 interrupts = <0 17 0>, <0 16 0>; 177 interrupts = <0 17 0>, <0 16 0>;
178 clocks = <&clock 21>;
179 clock-names = "rtc";
180 status = "disabled";
164 }; 181 };
165}; 182};