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Diffstat (limited to 'arch/arm/boot/dts/exynos5420.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi10
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index b3d2d53820e3..f67b23f303c3 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -221,7 +221,7 @@
221 compatible = "samsung,exynos4210-mct"; 221 compatible = "samsung,exynos4210-mct";
222 reg = <0x101C0000 0x800>; 222 reg = <0x101C0000 0x800>;
223 interrupt-controller; 223 interrupt-controller;
224 #interrups-cells = <1>; 224 #interrupt-cells = <1>;
225 interrupt-parent = <&mct_map>; 225 interrupt-parent = <&mct_map>;
226 interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>, 226 interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>,
227 <8>, <9>, <10>, <11>; 227 <8>, <9>, <10>, <11>;
@@ -251,6 +251,8 @@
251 compatible = "samsung,exynos4210-pd"; 251 compatible = "samsung,exynos4210-pd";
252 reg = <0x10044000 0x20>; 252 reg = <0x10044000 0x20>;
253 #power-domain-cells = <0>; 253 #power-domain-cells = <0>;
254 clocks = <&clock CLK_GSCL0>, <&clock CLK_GSCL1>;
255 clock-names = "asb0", "asb1";
254 }; 256 };
255 257
256 isp_pd: power-domain@10044020 { 258 isp_pd: power-domain@10044020 {
@@ -283,9 +285,11 @@
283 <&clock CLK_MOUT_SW_ACLK300>, 285 <&clock CLK_MOUT_SW_ACLK300>,
284 <&clock CLK_MOUT_USER_ACLK300_DISP1>, 286 <&clock CLK_MOUT_USER_ACLK300_DISP1>,
285 <&clock CLK_MOUT_SW_ACLK400>, 287 <&clock CLK_MOUT_SW_ACLK400>,
286 <&clock CLK_MOUT_USER_ACLK400_DISP1>; 288 <&clock CLK_MOUT_USER_ACLK400_DISP1>,
289 <&clock CLK_FIMD1>, <&clock CLK_MIXER>;
287 clock-names = "oscclk", "pclk0", "clk0", 290 clock-names = "oscclk", "pclk0", "clk0",
288 "pclk1", "clk1", "pclk2", "clk2"; 291 "pclk1", "clk1", "pclk2", "clk2",
292 "asb0", "asb1";
289 }; 293 };
290 294
291 pinctrl_0: pinctrl@13400000 { 295 pinctrl_0: pinctrl@13400000 {