1 files changed, 16 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index f516da9e8b3a..720836205546 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -431,18 +431,34 @@
 
                 fimc_0: fimc@11800000 {
                         status = "okay";
+                        assigned-clocks = <&clock CLK_MOUT_FIMC0>,
+                                        <&clock CLK_SCLK_FIMC0>;
+                        assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
+                        assigned-clock-rates = <0>, <160000000>;
                 };
 
                 fimc_1: fimc@11810000 {
                         status = "okay";
+                        assigned-clocks = <&clock CLK_MOUT_FIMC1>,
+                                        <&clock CLK_SCLK_FIMC1>;
+                        assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
+                        assigned-clock-rates = <0>, <160000000>;
                 };
 
                 fimc_2: fimc@11820000 {
                         status = "okay";
+                        assigned-clocks = <&clock CLK_MOUT_FIMC2>,
+                                        <&clock CLK_SCLK_FIMC2>;
+                        assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
+                        assigned-clock-rates = <0>, <160000000>;
                 };
 
                 fimc_3: fimc@11830000 {
                         status = "okay";
+                        assigned-clocks = <&clock CLK_MOUT_FIMC3>,
+                                        <&clock CLK_SCLK_FIMC3>;
+                        assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
+                        assigned-clock-rates = <0>, <160000000>;
                 };
         };
 };